blob: e2f1102003d20a7cb4e0ccaeeab348ce82c7d087 [file] [log] [blame]
Masahiro Yamada5894ca02014-10-03 19:21:06 +09001/*
2 * Copyright (C) 2012-2014 Panasonic Corporation
3 * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef __PH1_XXX_H
9#define __PH1_XXX_H
10
11/*
12 * Support Card Select
13 *
14 * CONFIG_PFC_MICRO_SUPPORT_CARD - Original Micro Support Card made by PFC.
15 * CONFIG_DCC_MICRO_SUPPORT_CARD - DCC version Micro Support Card.
16 * CPLD is re-programmed for ARIMA board compatibility.
17 * No define - No support card.
18 */
19
20#if 0
21#define CONFIG_PFC_MICRO_SUPPORT_CARD
22#else
23#define CONFIG_DCC_MICRO_SUPPORT_CARD
24#endif
25
26/*
27 * Serial Configuration
28 * SoC UART : enable CONFIG_UNIPHIER_SERIAL
29 * On-board UART: enable CONFIG_SYS_NS16550_SERIAL
30 */
Masahiro Yamadaff247b72014-10-23 22:26:11 +090031#if 0
Masahiro Yamada5894ca02014-10-03 19:21:06 +090032#define CONFIG_SYS_NS16550_SERIAL
33#endif
34
Masahiro Yamada5894ca02014-10-03 19:21:06 +090035#define CONFIG_SMC911X
36
37#define CONFIG_DDR_NUM_CH0 1
38#define CONFIG_DDR_NUM_CH1 1
39
Masahiro Yamada5894ca02014-10-03 19:21:06 +090040/* #define CONFIG_DDR_STANDARD */
41
42/*
43 * Memory Size & Mapping
44 */
45/* Physical start address of SDRAM */
46#define CONFIG_SDRAM0_BASE 0x80000000
47#define CONFIG_SDRAM0_SIZE 0x10000000
48#define CONFIG_SDRAM1_BASE 0x90000000
49#define CONFIG_SDRAM1_SIZE 0x10000000
50
51#define CONFIG_SPL_TEXT_BASE 0x40000
52
53#include "uniphier-common.h"
54
55#endif /* __PH1_XXX_H */