Simon Glass | 623b638 | 2014-10-13 23:42:00 -0600 | [diff] [blame] | 1 | Soft SPI |
| 2 | |
| 3 | The soft SPI bus implementation allows the use of GPIO pins to simulate a |
| 4 | SPI bus. No SPI host is required for this to work. The down-side is that the |
| 5 | performance will typically be much lower than a real SPI bus. |
| 6 | |
| 7 | The soft SPI node requires the following properties: |
| 8 | |
| 9 | compatible: "u-boot,soft-spi" |
| 10 | soft_spi_cs: GPIO number to use for SPI chip select (output) |
| 11 | soft_spi_sclk: GPIO number to use for SPI clock (output) |
| 12 | soft_spi_mosi: GPIO number to use for SPI MOSI line (output) |
| 13 | soft_spi_miso GPIO number to use for SPI MISO line (input) |
| 14 | spi-delay-us: Number of microseconds of delay between each CS transition |
| 15 | |
| 16 | The GPIOs should be specified as required by the GPIO controller referenced. |
| 17 | The first cell holds the phandle of the controller and the second cell |
| 18 | typically holds the GPIO number. |
| 19 | |
| 20 | |
| 21 | Example: |
| 22 | |
| 23 | soft-spi { |
| 24 | compatible = "u-boot,soft-spi"; |
| 25 | cs-gpio = <&gpio 235 0>; /* Y43 */ |
| 26 | sclk-gpio = <&gpio 225 0>; /* Y31 */ |
| 27 | mosi-gpio = <&gpio 227 0>; /* Y33 */ |
| 28 | miso-gpio = <&gpio 224 0>; /* Y30 */ |
| 29 | spi-delay-us = <1>; |
| 30 | #address-cells = <1>; |
| 31 | #size-cells = <0>; |
| 32 | cs@0 { |
| 33 | }; |
| 34 | }; |