Heiko Schocher | 3b5df50 | 2015-06-29 09:10:48 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007-2008 |
| 3 | * Stelian Pop <stelian@popies.net> |
| 4 | * Lead Tech Design <www.leadtechdesign.com> |
| 5 | * |
| 6 | * Achim Ehrlich <aehrlich@taskit.de> |
| 7 | * taskit GmbH <www.taskit.de> |
| 8 | * |
| 9 | * (C) Copyright 2012- |
| 10 | * Markus Hubig <mhubig@imko.de> |
| 11 | * IMKO GmbH <www.imko.de> |
| 12 | * (C) Copyright 2014 |
| 13 | * Heiko Schocher <hs@denx.de> |
| 14 | * DENX Software Engineering GmbH |
| 15 | * |
| 16 | * SPDX-License-Identifier: GPL-2.0+ |
| 17 | */ |
| 18 | |
| 19 | #include <common.h> |
| 20 | #include <asm/io.h> |
| 21 | #include <asm/arch/at91sam9_sdramc.h> |
| 22 | #include <asm/arch/at91sam9260_matrix.h> |
| 23 | #include <asm/arch/at91sam9_smc.h> |
| 24 | #include <asm/arch/at91_common.h> |
| 25 | #include <asm/arch/at91_pmc.h> |
| 26 | #include <asm/arch/at91_spi.h> |
| 27 | #include <spi.h> |
| 28 | #include <asm/arch/gpio.h> |
| 29 | #include <watchdog.h> |
| 30 | #ifdef CONFIG_MACB |
| 31 | # include <net.h> |
| 32 | # include <netdev.h> |
| 33 | #endif |
| 34 | |
| 35 | DECLARE_GLOBAL_DATA_PTR; |
| 36 | |
| 37 | static void smartweb_nand_hw_init(void) |
| 38 | { |
| 39 | struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; |
| 40 | struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; |
| 41 | unsigned long csa; |
| 42 | |
| 43 | /* Assign CS3 to NAND/SmartMedia Interface */ |
| 44 | csa = readl(&matrix->ebicsa); |
| 45 | csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA; |
| 46 | writel(csa, &matrix->ebicsa); |
| 47 | |
| 48 | /* Configure SMC CS3 for NAND/SmartMedia */ |
| 49 | writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | |
| 50 | AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), |
| 51 | &smc->cs[3].setup); |
| 52 | writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | |
| 53 | AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), |
| 54 | &smc->cs[3].pulse); |
| 55 | writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), |
| 56 | &smc->cs[3].cycle); |
| 57 | writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | |
| 58 | AT91_SMC_MODE_TDF_CYCLE(2), |
| 59 | &smc->cs[3].mode); |
| 60 | |
| 61 | /* Configure RDY/BSY */ |
| 62 | at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); |
| 63 | |
| 64 | /* Enable NandFlash */ |
| 65 | at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); |
| 66 | } |
| 67 | |
| 68 | #ifdef CONFIG_MACB |
| 69 | static void smartweb_macb_hw_init(void) |
| 70 | { |
| 71 | struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; |
| 72 | |
| 73 | /* Enable the PHY Chip via PA26 on the Stamp 2 Adaptor */ |
| 74 | at91_set_gpio_output(AT91_PIN_PA26, 0); |
| 75 | |
| 76 | /* |
| 77 | * Disable pull-up on: |
| 78 | * RXDV (PA17) => PHY normal mode (not Test mode) |
| 79 | * ERX0 (PA14) => PHY ADDR0 |
| 80 | * ERX1 (PA15) => PHY ADDR1 |
| 81 | * ERX2 (PA25) => PHY ADDR2 |
| 82 | * ERX3 (PA26) => PHY ADDR3 |
| 83 | * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0 |
| 84 | * |
| 85 | * PHY has internal pull-down |
| 86 | */ |
| 87 | writel(pin_to_mask(AT91_PIN_PA14) | |
| 88 | pin_to_mask(AT91_PIN_PA15) | |
| 89 | pin_to_mask(AT91_PIN_PA17) | |
| 90 | pin_to_mask(AT91_PIN_PA25) | |
| 91 | pin_to_mask(AT91_PIN_PA26) | |
| 92 | pin_to_mask(AT91_PIN_PA28), |
| 93 | &pioa->pudr); |
| 94 | |
| 95 | at91_phy_reset(); |
| 96 | |
| 97 | /* Re-enable pull-up */ |
| 98 | writel(pin_to_mask(AT91_PIN_PA14) | |
| 99 | pin_to_mask(AT91_PIN_PA15) | |
| 100 | pin_to_mask(AT91_PIN_PA17) | |
| 101 | pin_to_mask(AT91_PIN_PA25) | |
| 102 | pin_to_mask(AT91_PIN_PA26) | |
| 103 | pin_to_mask(AT91_PIN_PA28), |
| 104 | &pioa->puer); |
| 105 | |
| 106 | /* Initialize EMAC=MACB hardware */ |
| 107 | at91_macb_hw_init(); |
| 108 | } |
| 109 | #endif /* CONFIG_MACB */ |
| 110 | |
| 111 | int board_early_init_f(void) |
| 112 | { |
| 113 | /* enable this here, as we have SPL without serial support */ |
| 114 | at91_seriald_hw_init(); |
| 115 | return 0; |
| 116 | } |
| 117 | |
| 118 | int board_init(void) |
| 119 | { |
| 120 | /* Adress of boot parameters */ |
| 121 | gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; |
| 122 | |
| 123 | smartweb_nand_hw_init(); |
| 124 | #ifdef CONFIG_MACB |
| 125 | smartweb_macb_hw_init(); |
| 126 | #endif |
| 127 | /* power LED red */ |
| 128 | at91_set_gpio_output(AT91_PIN_PC6, 0); |
| 129 | at91_set_gpio_output(AT91_PIN_PC7, 1); |
| 130 | /* alarm LED off */ |
| 131 | at91_set_gpio_output(AT91_PIN_PC8, 0); |
| 132 | at91_set_gpio_output(AT91_PIN_PC9, 0); |
| 133 | /* prog LED red */ |
| 134 | at91_set_gpio_output(AT91_PIN_PC10, 0); |
| 135 | at91_set_gpio_output(AT91_PIN_PC11, 1); |
| 136 | |
| 137 | return 0; |
| 138 | } |
| 139 | |
| 140 | int dram_init(void) |
| 141 | { |
| 142 | gd->ram_size = get_ram_size( |
| 143 | (void *)CONFIG_SYS_SDRAM_BASE, |
| 144 | CONFIG_SYS_SDRAM_SIZE); |
| 145 | return 0; |
| 146 | } |
| 147 | |
| 148 | #ifdef CONFIG_MACB |
| 149 | int board_eth_init(bd_t *bis) |
| 150 | { |
| 151 | return macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00); |
| 152 | } |
| 153 | #endif /* CONFIG_MACB */ |
| 154 | |
| 155 | #if defined(CONFIG_SPL_BUILD) |
| 156 | #include <spl.h> |
| 157 | #include <nand.h> |
| 158 | #include <spi_flash.h> |
| 159 | |
| 160 | void matrix_init(void) |
| 161 | { |
| 162 | struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX; |
| 163 | |
| 164 | writel((readl(&mat->scfg[3]) & (~AT91_MATRIX_SLOT_CYCLE)) |
| 165 | | AT91_MATRIX_SLOT_CYCLE_(0x40), |
| 166 | &mat->scfg[3]); |
| 167 | } |
| 168 | |
| 169 | void spl_board_init(void) |
| 170 | { |
| 171 | at91_set_gpio_output(AT91_PIN_PC6, 1); |
| 172 | at91_set_gpio_output(AT91_PIN_PC7, 1); |
| 173 | /* alarm LED orange */ |
| 174 | at91_set_gpio_output(AT91_PIN_PC8, 1); |
| 175 | at91_set_gpio_output(AT91_PIN_PC9, 1); |
| 176 | /* prog LED red */ |
| 177 | at91_set_gpio_output(AT91_PIN_PC10, 0); |
| 178 | at91_set_gpio_output(AT91_PIN_PC11, 1); |
| 179 | |
| 180 | smartweb_nand_hw_init(); |
| 181 | at91_set_gpio_input(AT91_PIN_PA28, 1); |
| 182 | at91_set_gpio_input(AT91_PIN_PA29, 1); |
| 183 | |
| 184 | /* check if both button are pressed */ |
| 185 | if (at91_get_gpio_value(AT91_PIN_PA28) == 0 && |
| 186 | at91_get_gpio_value(AT91_PIN_PA29) == 0) { |
| 187 | debug("Recovery button pressed\n"); |
| 188 | nand_init(); |
| 189 | spl_nand_erase_one(0, 0); |
| 190 | } |
| 191 | } |
| 192 | |
| 193 | #define SDRAM_BASE_CONF (AT91_SDRAMC_NC_9 | AT91_SDRAMC_NR_13 \ |
| 194 | | AT91_SDRAMC_CAS_2 \ |
| 195 | | AT91_SDRAMC_NB_4 | AT91_SDRAMC_DBW_32 \ |
| 196 | | AT91_SDRAMC_TWR_VAL(2) | AT91_SDRAMC_TRC_VAL(7) \ |
| 197 | | AT91_SDRAMC_TRP_VAL(2) | AT91_SDRAMC_TRCD_VAL(2) \ |
| 198 | | AT91_SDRAMC_TRAS_VAL(5) | AT91_SDRAMC_TXSR_VAL(8)) |
| 199 | |
| 200 | void mem_init(void) |
| 201 | { |
| 202 | struct at91_matrix *ma = (struct at91_matrix *)ATMEL_BASE_MATRIX; |
| 203 | struct at91_port *port = (struct at91_port *)ATMEL_BASE_PIOC; |
| 204 | struct sdramc_reg setting; |
| 205 | |
| 206 | setting.cr = SDRAM_BASE_CONF; |
| 207 | setting.mdr = AT91_SDRAMC_MD_SDRAM; |
| 208 | setting.tr = (CONFIG_SYS_MASTER_CLOCK * 7) / 1000000; |
| 209 | |
| 210 | /* |
| 211 | * I write here directly in this register, because this |
| 212 | * approach is smaller than calling at91_set_a_periph() in a |
| 213 | * for loop. This saved me 96 bytes. |
| 214 | */ |
| 215 | writel(0xffff0000, &port->pdr); |
| 216 | |
| 217 | writel(readl(&ma->ebicsa) | AT91_MATRIX_CS1A_SDRAMC, &ma->ebicsa); |
| 218 | sdramc_initialize(ATMEL_BASE_CS1, &setting); |
| 219 | } |
| 220 | #endif |