Stefan Roese | 98f99e9 | 2013-04-02 10:37:04 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2012-2013 Stefan Roese <sr@denx.de> |
| 3 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 4 | * SPDX-License-Identifier: GPL-2.0+ |
Stefan Roese | 98f99e9 | 2013-04-02 10:37:04 +0200 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | MEMORY |
| 8 | { |
| 9 | sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, |
| 10 | LENGTH = CONFIG_SPL_BSS_MAX_SIZE |
| 11 | flash : ORIGIN = CONFIG_SPL_TEXT_BASE, |
| 12 | LENGTH = CONFIG_SYS_SPL_MAX_LEN |
| 13 | } |
| 14 | |
| 15 | OUTPUT_ARCH(powerpc) |
| 16 | ENTRY(_start) |
| 17 | SECTIONS |
| 18 | { |
| 19 | #ifdef CONFIG_440 |
| 20 | .bootpg 0xfffff000 : |
| 21 | { |
| 22 | arch/powerpc/cpu/ppc4xx/start.o (.bootpg) |
| 23 | |
| 24 | /* |
| 25 | * PPC440 board need a board specific object with the |
| 26 | * TLB definitions. This needs to get included right after |
| 27 | * start.o, since the first shadow TLB only covers 4k |
| 28 | * of address space. |
| 29 | */ |
| 30 | CONFIG_BOARDDIR/init.o (.bootpg) |
| 31 | } > flash |
| 32 | #endif |
| 33 | |
| 34 | .resetvec 0xFFFFFFFC : |
| 35 | { |
| 36 | KEEP(*(.resetvec)) |
| 37 | } > flash |
| 38 | |
| 39 | .text : |
| 40 | { |
| 41 | __start = .; |
| 42 | arch/powerpc/cpu/ppc4xx/start.o (.text) |
| 43 | CONFIG_BOARDDIR/init.o (.text) |
| 44 | *(.text*) |
| 45 | } > flash |
| 46 | |
| 47 | . = ALIGN(4); |
| 48 | .data : { *(SORT_BY_ALIGNMENT(.data*)) } > flash |
| 49 | |
| 50 | . = ALIGN(4); |
| 51 | .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } > flash |
| 52 | |
| 53 | .bss : |
| 54 | { |
| 55 | . = ALIGN(4); |
| 56 | __bss_start = .; |
| 57 | *(.bss*) |
| 58 | . = ALIGN(4); |
| 59 | __bss_end = .; |
| 60 | } > sdram |
| 61 | } |