| Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Chander Kashyap | a2ac68f | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2013 Samsung Electronics |
| 4 | * |
| Chander Kashyap | a2ac68f | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 5 | * Configuration settings for the SAMSUNG Arndale board. |
| 6 | */ |
| 7 | |
| 8 | #ifndef __CONFIG_ARNDALE_H |
| 9 | #define __CONFIG_ARNDALE_H |
| 10 | |
| Ian Campbell | e6825e0 | 2014-11-09 10:44:32 +0000 | [diff] [blame] | 11 | #define EXYNOS_FDTFILE_SETTING \ |
| 12 | "fdtfile=exynos5250-arndale.dtb\0" |
| 13 | |
| Simon Glass | f94de73 | 2014-10-07 22:01:48 -0600 | [diff] [blame] | 14 | #include "exynos5250-common.h" |
| Simon Glass | bf637ea | 2015-08-03 08:19:29 -0600 | [diff] [blame] | 15 | #include <configs/exynos5-common.h> |
| Chander Kashyap | a2ac68f | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 16 | |
| Chander Kashyap | a2ac68f | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 17 | /* MMC SPL */ |
| Rajeshwari Birje | e106bd9 | 2013-12-26 09:44:24 +0530 | [diff] [blame] | 18 | #define CONFIG_EXYNOS_SPL |
| Chander Kashyap | a2ac68f | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 19 | |
| 20 | /* Miscellaneous configurable options */ |
| Chander Kashyap | a2ac68f | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 21 | #define CONFIG_IRAM_STACK 0x02050000 |
| 22 | |
| 23 | #define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK |
| 24 | |
| Andre Przywara | fafbc6c | 2014-08-01 13:35:44 +0200 | [diff] [blame] | 25 | #define CONFIG_S5P_PA_SYSRAM 0x02020000 |
| 26 | #define CONFIG_SMP_PEN_ADDR CONFIG_S5P_PA_SYSRAM |
| 27 | |
| 28 | /* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */ |
| 29 | #define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000 |
| 30 | |
| Chander Kashyap | a2ac68f | 2013-08-21 10:38:56 +0530 | [diff] [blame] | 31 | #endif /* __CONFIG_H */ |