| wdenk | 161961b | 2002-03-09 23:21:25 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2001 |
| 3 | * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #ifndef _W7O_H_ |
| 25 | #define _W7O_H_ |
| 26 | #include <config.h> |
| 27 | |
| Wolfgang Denk | 0c8721a | 2005-09-23 11:05:55 +0200 | [diff] [blame] | 28 | /* AMCC 405GP PowerPC GPIO registers */ |
| 29 | #define PPC405GP_GPIO0_OR 0xef600700L /* GPIO Output */ |
| 30 | #define PPC405GP_GPIO0_TCR 0xef600704L /* GPIO Three-State Control */ |
| 31 | #define PPC405GP_GPIO0_ODR 0xef600718L /* GPIO Open Drain */ |
| 32 | #define PPC405GP_GPIO0_IR 0xef60071cL /* GPIO Input */ |
| wdenk | 161961b | 2002-03-09 23:21:25 +0000 | [diff] [blame] | 33 | |
| Wolfgang Denk | 0c8721a | 2005-09-23 11:05:55 +0200 | [diff] [blame] | 34 | /* AMCC 405GP DCRs */ |
| wdenk | 161961b | 2002-03-09 23:21:25 +0000 | [diff] [blame] | 35 | #define CPC0_CR0 0xb1 /* Chip control register 0 */ |
| 36 | |
| 37 | /* LMG FPGA <=> CPU GPIO signals */ |
| 38 | #define LMG_XCV_INIT 0x10000000L |
| 39 | #define LMG_XCV_PROG 0x04000000L |
| 40 | #define LMG_XCV_DONE 0x00400000L |
| 41 | #define LMG_XCV_CNFG_0 0x08000000L |
| 42 | #define LMG_XCV_IRQ_0 0x0L |
| 43 | |
| 44 | /* LMC FPGA <=> CPU GPIO signals */ |
| 45 | #define LMC_XCV_INIT 0x00800000L |
| 46 | #define LMC_XCV_PROG 0x40000000L |
| 47 | #define LMC_XCV_DONE 0x01000000L |
| 48 | #define LMC_XCV_CNFG_0 0x00004000L /* Shared with IRQ 0 */ |
| 49 | #define LMC_XCV_CNFG_1 0x00002000L /* Shared with IRQ 1 */ |
| 50 | #define LMC_XCV_CNFG_2 0x00001000L /* Shared with IRQ 2 */ |
| 51 | #define LMC_XCV_IRQ_0 0x00080000L /* Shared with GPIO 17 */ |
| 52 | #define LMC_XCV_IRQ_1 0x00040000L /* Shared with GPIO 18 */ |
| 53 | #define LMC_XCV_IRQ_3 0x00020000L /* Shared tiwht GPIO 19 */ |
| 54 | |
| 55 | |
| 56 | /* |
| 57 | * Setup FPGA <=> GPIO mappings |
| 58 | */ |
| 59 | #if defined(CONFIG_W7OLMG) |
| 60 | # define GPIO_XCV_INIT LMG_XCV_INIT |
| 61 | # define GPIO_XCV_PROG LMG_XCV_PROG |
| 62 | # define GPIO_XCV_DONE LMG_XCV_DONE |
| 63 | # define GPIO_XCV_CNFG LMG_XCV_CNFG_0 |
| 64 | # define GPIO_XCV_IRQ LMG_XCV_IRQ_0 |
| 65 | # define GPIO_GPIO_1 0x40000000L |
| 66 | # define GPIO_GPIO_6 0x02000000L |
| 67 | # define GPIO_GPIO_7 0x01000000L |
| 68 | # define GPIO_GPIO_8 0x00800000L |
| 69 | #elif defined(CONFIG_W7OLMC) |
| 70 | # define GPIO_XCV_INIT LMC_XCV_INIT |
| 71 | # define GPIO_XCV_PROG LMC_XCV_PROG |
| 72 | # define GPIO_XCV_DONE LMC_XCV_DONE |
| 73 | # define GPIO_XCV_CNFG LMC_XCV_CNFG_0 |
| 74 | # define GPIO_XCV_IRQ LMC_XCV_IRQ_0 |
| 75 | #else |
| 76 | # error "Unknown W7O board configuration" |
| 77 | #endif |
| 78 | |
| 79 | /* Power On Self Tests */ |
| 80 | extern void post2(void); |
| 81 | extern int test_led(void); |
| 82 | extern int test_sdram(unsigned long size); |
| 83 | extern void test_fpga(unsigned short *daddr); |
| 84 | |
| 85 | /* FGPA */ |
| 86 | extern int init_fpga(void); |
| 87 | |
| 88 | /* Misc */ |
| 89 | extern int temp_uart_init(void); |
| 90 | extern void init_fsboot(void); |
| 91 | |
| 92 | #endif /* _W7O_H_ */ |