blob: eee1db49eedbfe54ddcb668f33365ec7d16be9a0 [file] [log] [blame]
Stefan Roeseb0f80b92015-01-19 11:33:42 +01001/*
2 * (C) Copyright 2002
3 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
4 *
5 * (C) Copyright 2010
6 * Texas Instruments, <www.ti.com>
7 * Aneesh V <aneesh@ti.com>
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
13 LENGTH = CONFIG_SPL_MAX_SIZE }
14MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
15 LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
16
17OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
18OUTPUT_ARCH(arm)
19ENTRY(_start)
20SECTIONS
21{
22 .text :
23 {
24 __start = .;
25 arch/arm/cpu/armv7/start.o (.text*)
26 *(.text*)
27 *(.vectors)
28 } >.sram
29
30 . = ALIGN(4);
31 .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
32
33 . = ALIGN(4);
34 .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
35
36 . = ALIGN(4);
37 .u_boot_list : {
38 KEEP(*(SORT(.u_boot_list*_i2c_*)));
39 } >.sram
40
41 . = ALIGN(4);
42 __image_copy_end = .;
43
44 .end :
45 {
46 *(.__end)
47 }
48
49 .bss :
50 {
51 . = ALIGN(4);
52 __bss_start = .;
53 *(.bss*)
54 . = ALIGN(4);
55 __bss_end = .;
56 } >.sdram
57}