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gerrit.cesnet.cz / github / trini / u-boot / 732f01aabf53ae97aff9acb92a43c6b3838e6c92 / . / drivers / pinctrl / starfive / pinctrl-jh7110-aon.c
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Kuan Lim Lee732f01a2023-03-29 11:42:15 +0800[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Pinctrl / GPIO driver for StarFive JH7110 SoC
4 *
5 * Copyright (C) 2022 StarFive Technology Co., Ltd.
6 * Author: Lee Kuan Lim <kuanlim.lee@starfivetech.com>
7 * Author: Jianlong Huang <jianlong.huang@starfivetech.com>
8 */
9
10#include <dm/read.h>
11#include <dm/device_compat.h>
12#include <linux/io.h>
13
14#include <dt-bindings/pinctrl/pinctrl-starfive-jh7110.h>
15#include "pinctrl-starfive.h"
16
17#define JH7110_AON_NGPIO 4
18#define JH7110_AON_GC_BASE 64
19
20/* registers */
21#define JH7110_AON_DOEN 0x0
22#define JH7110_AON_DOUT 0x4
23#define JH7110_AON_GPI 0x8
24#define JH7110_AON_GPIOIN 0x2c
25
26#define JH7110_AON_GPIOEN 0xc
27#define JH7110_AON_GPIOIS 0x10
28#define JH7110_AON_GPIOIC 0x14
29#define JH7110_AON_GPIOIBE 0x18
30#define JH7110_AON_GPIOIEV 0x1c
31#define JH7110_AON_GPIOIE 0x20
32#define JH7110_AON_GPIORIS 0x28
33#define JH7110_AON_GPIOMIS 0x28
34
35#define AON_GPO_PDA_0_5_CFG 0x30
36
37static int jh7110_aon_set_one_pin_mux(struct udevice *dev, unsigned int pin,
38 unsigned int din, u32 dout,
39 u32 doen, u32 func)
40{
41 struct starfive_pinctrl_priv *priv = dev_get_priv(dev);
42
43 if (pin < priv->info->ngpios && func == 0)
44 starfive_set_gpiomux(dev, pin, din, dout, doen);
45
46 return 0;
47}
48
49static int jh7110_aon_get_padcfg_base(struct udevice *dev,
50 unsigned int pin)
51{
52 if (pin < PAD_GMAC0_MDC)
53 return AON_GPO_PDA_0_5_CFG;
54
55 return -1;
56}
57
58static void jh7110_aon_init_hw(struct udevice *dev)
59{
60 struct starfive_pinctrl_priv *priv = dev_get_priv(dev);
61
62 /* mask all GPIO interrupts */
63 writel(0, priv->base + JH7110_AON_GPIOIE);
64 /* clear edge interrupt flags */
65 writel(0, priv->base + JH7110_AON_GPIOIC);
66 writel(0x0f, priv->base + JH7110_AON_GPIOIC);
67 /* enable GPIO interrupts */
68 writel(1, priv->base + JH7110_AON_GPIOEN);
69}
70
71const struct starfive_pinctrl_soc_info jh7110_aon_pinctrl_info = {
72 /* pin conf */
73 .set_one_pinmux = jh7110_aon_set_one_pin_mux,
74 .get_padcfg_base = jh7110_aon_get_padcfg_base,
75
76 /* gpio dout/doen/din/gpioinput register */
77 .dout_reg_base = JH7110_AON_DOUT,
78 .dout_mask = GENMASK(3, 0),
79 .doen_reg_base = JH7110_AON_DOEN,
80 .doen_mask = GENMASK(2, 0),
81 .gpi_reg_base = JH7110_AON_GPI,
82 .gpi_mask = GENMASK(3, 0),
83 .gpioin_reg_base = JH7110_AON_GPIOIN,
84
85 /* gpio */
86 .gpio_bank_name = "RGPIO",
87 .ngpios = JH7110_AON_NGPIO,
88 .gpio_init_hw = jh7110_aon_init_hw,
89};
90
91static int jh7110_aon_pinctrl_probe(struct udevice *dev)
92{
93 struct starfive_pinctrl_soc_info *info =
94 (struct starfive_pinctrl_soc_info *)dev_get_driver_data(dev);
95
96 return starfive_pinctrl_probe(dev, info);
97}
98
99static const struct udevice_id jh7110_aon_pinctrl_ids[] = {
100 /* JH7110 aon pinctrl */
101 { .compatible = "starfive,jh7110-aon-pinctrl",
102 .data = (ulong)&jh7110_aon_pinctrl_info, },
103 { /* sentinel */ }
104};
105
106U_BOOT_DRIVER(jh7110_aon_pinctrl) = {
107 .name = "jh7110-aon-pinctrl",
108 .id = UCLASS_PINCTRL,
109 .of_match = jh7110_aon_pinctrl_ids,
110 .priv_auto = sizeof(struct starfive_pinctrl_priv),
111 .ops = &starfive_pinctrl_ops,
112 .probe = jh7110_aon_pinctrl_probe,
113};