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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#include <common.h>
26
27#define FLASH_BANK_SIZE 0x800000
28#define MAIN_SECT_SIZE 0x20000
29#define PARAM_SECT_SIZE 0x4000
30
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020031flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
wdenkc6097192002-11-03 00:24:07 +000032
33
34/*-----------------------------------------------------------------------
35 */
36
wdenke86e5a02004-10-17 21:12:06 +000037ulong flash_init (void)
wdenkc6097192002-11-03 00:24:07 +000038{
wdenke86e5a02004-10-17 21:12:06 +000039 int i, j;
40 ulong size = 0;
wdenkc6097192002-11-03 00:24:07 +000041
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020042 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
wdenke86e5a02004-10-17 21:12:06 +000043 ulong flashbase = 0;
wdenkc6097192002-11-03 00:24:07 +000044
wdenke86e5a02004-10-17 21:12:06 +000045 flash_info[i].flash_id =
46 (INTEL_MANUFACT & FLASH_VENDMASK) |
47 (INTEL_ID_28F320B3T & FLASH_TYPEMASK);
48 flash_info[i].size = FLASH_BANK_SIZE;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020049 flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
50 memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
wdenke86e5a02004-10-17 21:12:06 +000051 if (i == 0)
52 flashbase = PHYS_FLASH_1;
53 else if (i == 1)
54 flashbase = PHYS_FLASH_2;
55 else
56 panic ("configured too many flash banks!\n");
57 for (j = 0; j < flash_info[i].sector_count; j++) {
58 if (j <= 7) {
59 flash_info[i].start[j] =
60 flashbase + j * PARAM_SECT_SIZE;
61 } else {
62 flash_info[i].start[j] =
63 flashbase + (j - 7) * MAIN_SECT_SIZE;
64 }
wdenkc6097192002-11-03 00:24:07 +000065 }
wdenke86e5a02004-10-17 21:12:06 +000066 size += flash_info[i].size;
wdenkc6097192002-11-03 00:24:07 +000067 }
wdenkc6097192002-11-03 00:24:07 +000068
wdenke86e5a02004-10-17 21:12:06 +000069 /* Protect monitor and environment sectors
70 */
71 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020072 CONFIG_SYS_FLASH_BASE,
73 CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
wdenke86e5a02004-10-17 21:12:06 +000074 &flash_info[0]);
wdenkc6097192002-11-03 00:24:07 +000075
wdenke86e5a02004-10-17 21:12:06 +000076 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020077 CONFIG_ENV_ADDR,
78 CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
wdenkc6097192002-11-03 00:24:07 +000079
wdenke86e5a02004-10-17 21:12:06 +000080 return size;
81}
wdenkc6097192002-11-03 00:24:07 +000082
wdenke86e5a02004-10-17 21:12:06 +000083/*-----------------------------------------------------------------------
84 */
85void flash_print_info (flash_info_t * info)
86{
87 int i;
88
89 switch (info->flash_id & FLASH_VENDMASK) {
90 case (INTEL_MANUFACT & FLASH_VENDMASK):
91 printf ("Intel: ");
92 break;
93 default:
94 printf ("Unknown Vendor ");
95 break;
96 }
97
98 switch (info->flash_id & FLASH_TYPEMASK) {
99 case (INTEL_ID_28F320B3T & FLASH_TYPEMASK):
100 printf ("28F320F3B (16Mbit)\n");
101 break;
102 default:
103 printf ("Unknown Chip Type\n");
104 goto Done;
105 break;
106 }
107
108 printf (" Size: %ld MB in %d Sectors\n",
109 info->size >> 20, info->sector_count);
110
111 printf (" Sector Start Addresses:");
112 for (i = 0; i < info->sector_count; i++) {
113 if ((i % 5) == 0) {
114 printf ("\n ");
115 }
116 printf (" %08lX%s", info->start[i],
117 info->protect[i] ? " (RO)" : " ");
118 }
119 printf ("\n");
120
121 Done:;
122}
123
124/*-----------------------------------------------------------------------
125 */
126
127int flash_erase (flash_info_t * info, int s_first, int s_last)
128{
129 int flag, prot, sect;
130 int rc = ERR_OK;
Graeme Russa60d1e52011-07-15 23:31:37 +0000131 ulong start;
wdenke86e5a02004-10-17 21:12:06 +0000132
133 if (info->flash_id == FLASH_UNKNOWN)
134 return ERR_UNKNOWN_FLASH_TYPE;
135
136 if ((s_first < 0) || (s_first > s_last)) {
137 return ERR_INVAL;
138 }
139
140 if ((info->flash_id & FLASH_VENDMASK) !=
141 (INTEL_MANUFACT & FLASH_VENDMASK)) {
142 return ERR_UNKNOWN_FLASH_VENDOR;
143 }
144
145 prot = 0;
146 for (sect = s_first; sect <= s_last; ++sect) {
147 if (info->protect[sect]) {
148 prot++;
149 }
150 }
151 if (prot)
152 return ERR_PROTECTED;
153
154 /*
155 * Disable interrupts which might cause a timeout
156 * here. Remember that our exception vectors are
157 * at address 0 in the flash, and we don't want a
158 * (ticker) exception to happen while the flash
159 * chip is in programming mode.
160 */
161 flag = disable_interrupts ();
162
163 /* Start erase on unprotected sectors */
164 for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
165
166 printf ("Erasing sector %2d ... ", sect);
167
168 /* arm simple, non interrupt dependent timer */
Graeme Russa60d1e52011-07-15 23:31:37 +0000169 start = get_timer(0);
wdenke86e5a02004-10-17 21:12:06 +0000170
171 if (info->protect[sect] == 0) { /* not protected */
172 vu_long *addr = (vu_long *) (info->start[sect]);
173
174 *addr = 0x00200020; /* erase setup */
175 *addr = 0x00D000D0; /* erase confirm */
176
177 while ((*addr & 0x00800080) != 0x00800080) {
Graeme Russa60d1e52011-07-15 23:31:37 +0000178 if (get_timer(start) >
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200179 CONFIG_SYS_FLASH_ERASE_TOUT) {
wdenke86e5a02004-10-17 21:12:06 +0000180 *addr = 0x00B000B0; /* suspend erase */
181 *addr = 0x00FF00FF; /* reset to read mode */
182 rc = ERR_TIMOUT;
183 goto outahere;
184 }
185 }
186
187 *addr = 0x00FF00FF; /* reset to read mode */
188 }
189 printf ("ok.\n");
190 }
191 if (ctrlc ())
192 printf ("User Interrupt!\n");
193
194 outahere:
195
196 /* allow flash to settle - wait 10 ms */
197 udelay_masked (10000);
198
199 if (flag)
200 enable_interrupts ();
201
202 return rc;
wdenkc6097192002-11-03 00:24:07 +0000203}
204
205/*-----------------------------------------------------------------------
206 * Copy memory to flash
207 */
208
wdenke86e5a02004-10-17 21:12:06 +0000209static int write_word (flash_info_t * info, ulong dest, ulong data)
wdenkc6097192002-11-03 00:24:07 +0000210{
wdenke86e5a02004-10-17 21:12:06 +0000211 vu_long *addr = (vu_long *) dest;
212 ulong barf;
213 int rc = ERR_OK;
214 int flag;
Graeme Russa60d1e52011-07-15 23:31:37 +0000215 ulong start;
wdenkc6097192002-11-03 00:24:07 +0000216
wdenke86e5a02004-10-17 21:12:06 +0000217 /* Check if Flash is (sufficiently) erased
218 */
219 if ((*addr & data) != data)
220 return ERR_NOT_ERASED;
wdenkc6097192002-11-03 00:24:07 +0000221
wdenke86e5a02004-10-17 21:12:06 +0000222 /*
223 * Disable interrupts which might cause a timeout
224 * here. Remember that our exception vectors are
225 * at address 0 in the flash, and we don't want a
226 * (ticker) exception to happen while the flash
227 * chip is in programming mode.
228 */
229 flag = disable_interrupts ();
wdenkc6097192002-11-03 00:24:07 +0000230
wdenke86e5a02004-10-17 21:12:06 +0000231 /* clear status register command */
232 *addr = 0x00500050;
wdenkc6097192002-11-03 00:24:07 +0000233
wdenke86e5a02004-10-17 21:12:06 +0000234 /* program set-up command */
235 *addr = 0x00400040;
wdenkc6097192002-11-03 00:24:07 +0000236
wdenke86e5a02004-10-17 21:12:06 +0000237 /* latch address/data */
238 *addr = data;
wdenkc6097192002-11-03 00:24:07 +0000239
wdenke86e5a02004-10-17 21:12:06 +0000240 /* arm simple, non interrupt dependent timer */
Graeme Russa60d1e52011-07-15 23:31:37 +0000241 start = get_timer(0);
wdenkc6097192002-11-03 00:24:07 +0000242
wdenke86e5a02004-10-17 21:12:06 +0000243 /* read status register command */
244 *addr = 0x00700070;
wdenkc6097192002-11-03 00:24:07 +0000245
wdenke86e5a02004-10-17 21:12:06 +0000246 /* wait while polling the status register */
247 while ((*addr & 0x00800080) != 0x00800080) {
Graeme Russa60d1e52011-07-15 23:31:37 +0000248 if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
wdenke86e5a02004-10-17 21:12:06 +0000249 rc = ERR_TIMOUT;
250 /* suspend program command */
251 *addr = 0x00B000B0;
252 goto outahere;
253 }
254
255 if (*addr & 0x003A003A) { /* check for error */
256 barf = *addr;
257 if (barf & 0x003A0000) {
258 barf >>= 16;
259 } else {
260 barf &= 0x0000003A;
261 }
262 printf ("\nFlash write error %02lx at address %08lx\n", barf, (unsigned long) dest);
263 if (barf & 0x0002) {
264 printf ("Block locked, not erased.\n");
265 rc = ERR_NOT_ERASED;
266 goto outahere;
267 }
268 if (barf & 0x0010) {
269 printf ("Programming error.\n");
270 rc = ERR_PROG_ERROR;
271 goto outahere;
272 }
273 if (barf & 0x0008) {
274 printf ("Vpp Low error.\n");
275 rc = ERR_PROG_ERROR;
276 goto outahere;
277 }
278 rc = ERR_PROG_ERROR;
279 goto outahere;
280 }
wdenkc6097192002-11-03 00:24:07 +0000281 }
282
wdenkc6097192002-11-03 00:24:07 +0000283
wdenke86e5a02004-10-17 21:12:06 +0000284 outahere:
285 /* read array command */
286 *addr = 0x00FF00FF;
wdenkc6097192002-11-03 00:24:07 +0000287
wdenke86e5a02004-10-17 21:12:06 +0000288 if (flag)
289 enable_interrupts ();
wdenkc6097192002-11-03 00:24:07 +0000290
wdenke86e5a02004-10-17 21:12:06 +0000291 return rc;
wdenkc6097192002-11-03 00:24:07 +0000292}
293
294/*-----------------------------------------------------------------------
295 * Copy memory to flash.
296 */
297
wdenke86e5a02004-10-17 21:12:06 +0000298int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
wdenkc6097192002-11-03 00:24:07 +0000299{
wdenke86e5a02004-10-17 21:12:06 +0000300 ulong cp, wp, data;
301 int l;
302 int i, rc;
wdenkc6097192002-11-03 00:24:07 +0000303
wdenke86e5a02004-10-17 21:12:06 +0000304 wp = (addr & ~3); /* get lower word aligned address */
wdenkc6097192002-11-03 00:24:07 +0000305
wdenke86e5a02004-10-17 21:12:06 +0000306 /*
307 * handle unaligned start bytes
308 */
309 if ((l = addr - wp) != 0) {
310 data = 0;
311 for (i = 0, cp = wp; i < l; ++i, ++cp) {
312 data = (data >> 8) | (*(uchar *) cp << 24);
313 }
314 for (; i < 4 && cnt > 0; ++i) {
315 data = (data >> 8) | (*src++ << 24);
316 --cnt;
317 ++cp;
318 }
319 for (; cnt == 0 && i < 4; ++i, ++cp) {
320 data = (data >> 8) | (*(uchar *) cp << 24);
321 }
322
323 if ((rc = write_word (info, wp, data)) != 0) {
324 return (rc);
325 }
326 wp += 4;
327 }
328
329 /*
330 * handle word aligned part
331 */
332 while (cnt >= 4) {
333 data = *((vu_long *) src);
334 if ((rc = write_word (info, wp, data)) != 0) {
335 return (rc);
336 }
337 src += 4;
338 wp += 4;
339 cnt -= 4;
340 }
341
342 if (cnt == 0) {
343 return ERR_OK;
344 }
345
346 /*
347 * handle unaligned tail bytes
348 */
wdenkc6097192002-11-03 00:24:07 +0000349 data = 0;
wdenke86e5a02004-10-17 21:12:06 +0000350 for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
351 data = (data >> 8) | (*src++ << 24);
352 --cnt;
wdenkc6097192002-11-03 00:24:07 +0000353 }
wdenke86e5a02004-10-17 21:12:06 +0000354 for (; i < 4; ++i, ++cp) {
355 data = (data >> 8) | (*(uchar *) cp << 24);
wdenkc6097192002-11-03 00:24:07 +0000356 }
357
wdenke86e5a02004-10-17 21:12:06 +0000358 return write_word (info, wp, data);
wdenkc6097192002-11-03 00:24:07 +0000359}