blob: 9b8744e5d8bfd96eb139d48cac6f91822a5d3b15 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00002/*
3 * (C) Copyright 2001
4 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
wdenkc6097192002-11-03 00:24:07 +00005 */
6
7/*
8 * This provides a bit-banged interface to the ethernet MII management
9 * channel.
10 */
11
Simon Glassc74c8e62015-04-05 16:07:39 -060012#include <dm.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060013#include <log.h>
wdenkc6097192002-11-03 00:24:07 +000014#include <miiphy.h>
Andy Fleming5f184712011-04-08 02:10:27 -050015#include <phy.h>
Simon Glassc05ed002020-05-10 11:40:11 -060016#include <linux/delay.h>
wdenkc6097192002-11-03 00:24:07 +000017
Marian Balakowicz63ff0042005-10-28 22:30:33 +020018#include <asm/types.h>
19#include <linux/list.h>
20#include <malloc.h>
21#include <net.h>
22
23/* local debug macro */
Marian Balakowicz63ff0042005-10-28 22:30:33 +020024#undef MII_DEBUG
25
26#undef debug
27#ifdef MII_DEBUG
Andy Fleming16a53232011-04-07 14:38:35 -050028#define debug(fmt, args...) printf(fmt, ##args)
Marian Balakowicz63ff0042005-10-28 22:30:33 +020029#else
Andy Fleming16a53232011-04-07 14:38:35 -050030#define debug(fmt, args...)
Marian Balakowicz63ff0042005-10-28 22:30:33 +020031#endif /* MII_DEBUG */
32
Marian Balakowicz63ff0042005-10-28 22:30:33 +020033static struct list_head mii_devs;
34static struct mii_dev *current_mii;
35
Mike Frysinger0daac972010-07-27 18:35:09 -040036/*
37 * Lookup the mii_dev struct by the registered device name.
38 */
Andy Fleming5f184712011-04-08 02:10:27 -050039struct mii_dev *miiphy_get_dev_by_name(const char *devname)
Mike Frysinger0daac972010-07-27 18:35:09 -040040{
41 struct list_head *entry;
42 struct mii_dev *dev;
43
44 if (!devname) {
45 printf("NULL device name!\n");
46 return NULL;
47 }
48
49 list_for_each(entry, &mii_devs) {
50 dev = list_entry(entry, struct mii_dev, link);
51 if (strcmp(dev->name, devname) == 0)
52 return dev;
53 }
54
Mike Frysinger0daac972010-07-27 18:35:09 -040055 return NULL;
56}
57
Marian Balakowicz63ff0042005-10-28 22:30:33 +020058/*****************************************************************************
59 *
Marian Balakowiczd9785c12005-11-30 18:06:04 +010060 * Initialize global data. Need to be called before any other miiphy routine.
61 */
Mike Frysinger5700bb62010-07-27 18:35:08 -040062void miiphy_init(void)
Marian Balakowiczd9785c12005-11-30 18:06:04 +010063{
Andy Fleming16a53232011-04-07 14:38:35 -050064 INIT_LIST_HEAD(&mii_devs);
Larry Johnson298035d2007-10-31 11:21:29 -050065 current_mii = NULL;
Marian Balakowiczd9785c12005-11-30 18:06:04 +010066}
67
Andy Fleming5f184712011-04-08 02:10:27 -050068struct mii_dev *mdio_alloc(void)
69{
70 struct mii_dev *bus;
71
72 bus = malloc(sizeof(*bus));
73 if (!bus)
74 return bus;
75
76 memset(bus, 0, sizeof(*bus));
77
78 /* initalize mii_dev struct fields */
79 INIT_LIST_HEAD(&bus->link);
80
81 return bus;
82}
83
Bin Mengcb6baca2015-10-07 21:32:37 -070084void mdio_free(struct mii_dev *bus)
85{
86 free(bus);
87}
88
Andy Fleming5f184712011-04-08 02:10:27 -050089int mdio_register(struct mii_dev *bus)
90{
Peng Fand39449b2015-11-24 17:03:47 +080091 if (!bus || !bus->read || !bus->write)
Andy Fleming5f184712011-04-08 02:10:27 -050092 return -1;
93
94 /* check if we have unique name */
95 if (miiphy_get_dev_by_name(bus->name)) {
96 printf("mdio_register: non unique device name '%s'\n",
97 bus->name);
98 return -1;
99 }
100
101 /* add it to the list */
102 list_add_tail(&bus->link, &mii_devs);
103
104 if (!current_mii)
105 current_mii = bus;
106
107 return 0;
108}
109
Michal Simek79e2a6a2016-12-08 10:06:26 +0100110int mdio_register_seq(struct mii_dev *bus, int seq)
111{
112 int ret;
113
114 /* Setup a unique name for each mdio bus */
115 ret = snprintf(bus->name, MDIO_NAME_LEN, "eth%d", seq);
116 if (ret < 0)
117 return ret;
118
119 return mdio_register(bus);
120}
121
Bin Mengcb6baca2015-10-07 21:32:37 -0700122int mdio_unregister(struct mii_dev *bus)
123{
124 if (!bus)
125 return 0;
126
127 /* delete it from the list */
128 list_del(&bus->link);
129
130 if (current_mii == bus)
131 current_mii = NULL;
132
133 return 0;
134}
135
Andy Fleming5f184712011-04-08 02:10:27 -0500136void mdio_list_devices(void)
137{
138 struct list_head *entry;
139
140 list_for_each(entry, &mii_devs) {
141 int i;
142 struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
143
144 printf("%s:\n", bus->name);
145
146 for (i = 0; i < PHY_MAX_ADDR; i++) {
147 struct phy_device *phydev = bus->phymap[i];
148
149 if (phydev) {
Michal Simek15a2acd2016-11-16 08:41:01 +0100150 printf("%x - %s", i, phydev->drv->name);
Andy Fleming5f184712011-04-08 02:10:27 -0500151
152 if (phydev->dev)
153 printf(" <--> %s\n", phydev->dev->name);
154 else
155 printf("\n");
156 }
157 }
158 }
159}
160
Mike Frysinger5700bb62010-07-27 18:35:08 -0400161int miiphy_set_current_dev(const char *devname)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200162{
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200163 struct mii_dev *dev;
164
Andy Fleming5f184712011-04-08 02:10:27 -0500165 dev = miiphy_get_dev_by_name(devname);
Mike Frysinger0daac972010-07-27 18:35:09 -0400166 if (dev) {
167 current_mii = dev;
168 return 0;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200169 }
170
Andy Fleming5f184712011-04-08 02:10:27 -0500171 printf("No such device: %s\n", devname);
172
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200173 return 1;
174}
175
Andy Fleming5f184712011-04-08 02:10:27 -0500176struct mii_dev *mdio_get_current_dev(void)
177{
178 return current_mii;
179}
180
Pankaj Bansal9215bb12018-09-18 15:46:48 +0530181struct list_head *mdio_get_list_head(void)
182{
183 return &mii_devs;
184}
185
Andy Fleming5f184712011-04-08 02:10:27 -0500186struct phy_device *mdio_phydev_for_ethname(const char *ethname)
187{
188 struct list_head *entry;
189 struct mii_dev *bus;
190
191 list_for_each(entry, &mii_devs) {
192 int i;
193 bus = list_entry(entry, struct mii_dev, link);
194
195 for (i = 0; i < PHY_MAX_ADDR; i++) {
196 if (!bus->phymap[i] || !bus->phymap[i]->dev)
197 continue;
198
199 if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
200 return bus->phymap[i];
201 }
202 }
203
204 printf("%s is not a known ethernet\n", ethname);
205 return NULL;
206}
207
Mike Frysinger5700bb62010-07-27 18:35:08 -0400208const char *miiphy_get_current_dev(void)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200209{
210 if (current_mii)
211 return current_mii->name;
212
213 return NULL;
214}
215
Mike Frysingerede16ea2010-07-27 18:35:10 -0400216static struct mii_dev *miiphy_get_active_dev(const char *devname)
217{
218 /* If the current mii is the one we want, return it */
219 if (current_mii)
220 if (strcmp(current_mii->name, devname) == 0)
221 return current_mii;
222
223 /* Otherwise, set the active one to the one we want */
224 if (miiphy_set_current_dev(devname))
225 return NULL;
226 else
227 return current_mii;
228}
229
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200230/*****************************************************************************
231 *
232 * Read to variable <value> from the PHY attached to device <devname>,
233 * use PHY address <addr> and register <reg>.
234 *
Andy Fleming1cdabc42011-10-31 09:46:13 -0500235 * This API is deprecated. Use phy_read on a phy_device found via phy_connect
236 *
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200237 * Returns:
238 * 0 on success
239 */
Wolfgang Denkf915c932011-12-07 08:35:14 +0100240int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson298035d2007-10-31 11:21:29 -0500241 unsigned short *value)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200242{
Andy Fleming5f184712011-04-08 02:10:27 -0500243 struct mii_dev *bus;
Anatolij Gustschind67d5d52011-04-30 02:17:44 +0000244 int ret;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200245
Andy Fleming5f184712011-04-08 02:10:27 -0500246 bus = miiphy_get_active_dev(devname);
Anatolij Gustschind67d5d52011-04-30 02:17:44 +0000247 if (!bus)
Andy Fleming5f184712011-04-08 02:10:27 -0500248 return 1;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200249
Anatolij Gustschind67d5d52011-04-30 02:17:44 +0000250 ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
251 if (ret < 0)
252 return 1;
253
254 *value = (unsigned short)ret;
255 return 0;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200256}
257
258/*****************************************************************************
259 *
260 * Write <value> to the PHY attached to device <devname>,
261 * use PHY address <addr> and register <reg>.
262 *
Andy Fleming1cdabc42011-10-31 09:46:13 -0500263 * This API is deprecated. Use phy_write on a phy_device found by phy_connect
264 *
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200265 * Returns:
266 * 0 on success
267 */
Wolfgang Denkf915c932011-12-07 08:35:14 +0100268int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson298035d2007-10-31 11:21:29 -0500269 unsigned short value)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200270{
Andy Fleming5f184712011-04-08 02:10:27 -0500271 struct mii_dev *bus;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200272
Andy Fleming5f184712011-04-08 02:10:27 -0500273 bus = miiphy_get_active_dev(devname);
274 if (bus)
275 return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200276
Mike Frysinger0daac972010-07-27 18:35:09 -0400277 return 1;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200278}
279
280/*****************************************************************************
281 *
282 * Print out list of registered MII capable devices.
283 */
Andy Fleming16a53232011-04-07 14:38:35 -0500284void miiphy_listdev(void)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200285{
286 struct list_head *entry;
287 struct mii_dev *dev;
288
Andy Fleming16a53232011-04-07 14:38:35 -0500289 puts("MII devices: ");
290 list_for_each(entry, &mii_devs) {
291 dev = list_entry(entry, struct mii_dev, link);
292 printf("'%s' ", dev->name);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200293 }
Andy Fleming16a53232011-04-07 14:38:35 -0500294 puts("\n");
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200295
296 if (current_mii)
Andy Fleming16a53232011-04-07 14:38:35 -0500297 printf("Current device: '%s'\n", current_mii->name);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200298}
299
wdenkc6097192002-11-03 00:24:07 +0000300/*****************************************************************************
301 *
302 * Read the OUI, manufacture's model number, and revision number.
303 *
304 * OUI: 22 bits (unsigned int)
305 * Model: 6 bits (unsigned char)
306 * Revision: 4 bits (unsigned char)
307 *
Andy Fleming1cdabc42011-10-31 09:46:13 -0500308 * This API is deprecated.
309 *
wdenkc6097192002-11-03 00:24:07 +0000310 * Returns:
311 * 0 on success
312 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400313int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
wdenkc6097192002-11-03 00:24:07 +0000314 unsigned char *model, unsigned char *rev)
315{
316 unsigned int reg = 0;
wdenk8bf3b002003-12-06 23:20:41 +0000317 unsigned short tmp;
wdenkc6097192002-11-03 00:24:07 +0000318
Andy Fleming16a53232011-04-07 14:38:35 -0500319 if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
320 debug("PHY ID register 2 read failed\n");
321 return -1;
wdenkc6097192002-11-03 00:24:07 +0000322 }
wdenk8bf3b002003-12-06 23:20:41 +0000323 reg = tmp;
wdenkc6097192002-11-03 00:24:07 +0000324
Andy Fleming16a53232011-04-07 14:38:35 -0500325 debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
Shinya Kuribayashi26c7bab2008-01-19 10:25:59 +0900326
wdenkc6097192002-11-03 00:24:07 +0000327 if (reg == 0xFFFF) {
328 /* No physical device present at this address */
Andy Fleming16a53232011-04-07 14:38:35 -0500329 return -1;
wdenkc6097192002-11-03 00:24:07 +0000330 }
331
Andy Fleming16a53232011-04-07 14:38:35 -0500332 if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
333 debug("PHY ID register 1 read failed\n");
334 return -1;
wdenkc6097192002-11-03 00:24:07 +0000335 }
wdenk8bf3b002003-12-06 23:20:41 +0000336 reg |= tmp << 16;
Andy Fleming16a53232011-04-07 14:38:35 -0500337 debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
Shinya Kuribayashi26c7bab2008-01-19 10:25:59 +0900338
Larry Johnson298035d2007-10-31 11:21:29 -0500339 *oui = (reg >> 10);
340 *model = (unsigned char)((reg >> 4) & 0x0000003F);
341 *rev = (unsigned char)(reg & 0x0000000F);
Andy Fleming16a53232011-04-07 14:38:35 -0500342 return 0;
wdenkc6097192002-11-03 00:24:07 +0000343}
344
Andy Fleming5f184712011-04-08 02:10:27 -0500345#ifndef CONFIG_PHYLIB
wdenkc6097192002-11-03 00:24:07 +0000346/*****************************************************************************
347 *
348 * Reset the PHY.
Andy Fleming1cdabc42011-10-31 09:46:13 -0500349 *
350 * This API is deprecated. Use PHYLIB.
351 *
wdenkc6097192002-11-03 00:24:07 +0000352 * Returns:
353 * 0 on success
354 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400355int miiphy_reset(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000356{
357 unsigned short reg;
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100358 int timeout = 500;
wdenkc6097192002-11-03 00:24:07 +0000359
Andy Fleming16a53232011-04-07 14:38:35 -0500360 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
361 debug("PHY status read failed\n");
362 return -1;
Wolfgang Denkf89920c2005-08-12 23:15:53 +0200363 }
Andy Fleming16a53232011-04-07 14:38:35 -0500364 if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
365 debug("PHY reset failed\n");
366 return -1;
wdenkc6097192002-11-03 00:24:07 +0000367 }
Tom Rini16199a82022-03-18 08:38:26 -0400368#if CONFIG_PHY_RESET_DELAY > 0
Andy Fleming16a53232011-04-07 14:38:35 -0500369 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
wdenk5653fc32004-02-08 22:55:38 +0000370#endif
wdenkc6097192002-11-03 00:24:07 +0000371 /*
372 * Poll the control register for the reset bit to go to 0 (it is
373 * auto-clearing). This should happen within 0.5 seconds per the
374 * IEEE spec.
375 */
wdenkc6097192002-11-03 00:24:07 +0000376 reg = 0x8000;
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100377 while (((reg & 0x8000) != 0) && timeout--) {
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500378 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100379 debug("PHY status read failed\n");
380 return -1;
wdenkc6097192002-11-03 00:24:07 +0000381 }
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100382 udelay(1000);
wdenkc6097192002-11-03 00:24:07 +0000383 }
384 if ((reg & 0x8000) == 0) {
Andy Fleming16a53232011-04-07 14:38:35 -0500385 return 0;
wdenkc6097192002-11-03 00:24:07 +0000386 } else {
Andy Fleming16a53232011-04-07 14:38:35 -0500387 puts("PHY reset timed out\n");
388 return -1;
wdenkc6097192002-11-03 00:24:07 +0000389 }
Andy Fleming16a53232011-04-07 14:38:35 -0500390 return 0;
wdenkc6097192002-11-03 00:24:07 +0000391}
Andy Fleming5f184712011-04-08 02:10:27 -0500392#endif /* !PHYLIB */
wdenkc6097192002-11-03 00:24:07 +0000393
wdenkc6097192002-11-03 00:24:07 +0000394/*****************************************************************************
395 *
Larry Johnson71bc6e62007-11-01 08:46:50 -0500396 * Determine the ethernet speed (10/100/1000). Return 10 on error.
wdenkc6097192002-11-03 00:24:07 +0000397 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400398int miiphy_speed(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000399{
Dongpo Li8c83c032016-08-22 21:03:29 +0800400 u16 bmcr, anlpar, adv;
wdenkc6097192002-11-03 00:24:07 +0000401
wdenk6fb6af62004-03-23 23:20:24 +0000402#if defined(CONFIG_PHY_GIGE)
Larry Johnson71bc6e62007-11-01 08:46:50 -0500403 u16 btsr;
404
405 /*
406 * Check for 1000BASE-X. If it is supported, then assume that the speed
407 * is 1000.
408 */
Andy Fleming16a53232011-04-07 14:38:35 -0500409 if (miiphy_is_1000base_x(devname, addr))
Larry Johnson71bc6e62007-11-01 08:46:50 -0500410 return _1000BASET;
Andy Fleming16a53232011-04-07 14:38:35 -0500411
Larry Johnson71bc6e62007-11-01 08:46:50 -0500412 /*
413 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
414 */
415 /* Check for 1000BASE-T. */
Andy Fleming16a53232011-04-07 14:38:35 -0500416 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
417 printf("PHY 1000BT status");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500418 goto miiphy_read_failed;
419 }
420 if (btsr != 0xFFFF &&
Andy Fleming16a53232011-04-07 14:38:35 -0500421 (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
Larry Johnson71bc6e62007-11-01 08:46:50 -0500422 return _1000BASET;
wdenk6fb6af62004-03-23 23:20:24 +0000423#endif /* CONFIG_PHY_GIGE */
wdenk855a4962004-03-14 18:23:55 +0000424
wdenka56bd922004-06-06 23:13:55 +0000425 /* Check Basic Management Control Register first. */
Andy Fleming16a53232011-04-07 14:38:35 -0500426 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
427 printf("PHY speed");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500428 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000429 }
wdenka56bd922004-06-06 23:13:55 +0000430 /* Check if auto-negotiation is on. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500431 if (bmcr & BMCR_ANENABLE) {
wdenka56bd922004-06-06 23:13:55 +0000432 /* Get auto-negotiation results. */
Andy Fleming16a53232011-04-07 14:38:35 -0500433 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
434 printf("PHY AN speed");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500435 goto miiphy_read_failed;
wdenka56bd922004-06-06 23:13:55 +0000436 }
Dongpo Li8c83c032016-08-22 21:03:29 +0800437
438 if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
439 puts("PHY AN adv speed");
440 goto miiphy_read_failed;
441 }
442 return ((anlpar & adv) & LPA_100) ? _100BASET : _10BASET;
wdenka56bd922004-06-06 23:13:55 +0000443 }
444 /* Get speed from basic control settings. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500445 return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
wdenka56bd922004-06-06 23:13:55 +0000446
Michael Zaidman5f841952010-02-28 16:28:25 +0200447miiphy_read_failed:
Andy Fleming16a53232011-04-07 14:38:35 -0500448 printf(" read failed, assuming 10BASE-T\n");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500449 return _10BASET;
wdenkc6097192002-11-03 00:24:07 +0000450}
451
wdenkc6097192002-11-03 00:24:07 +0000452/*****************************************************************************
453 *
Larry Johnson71bc6e62007-11-01 08:46:50 -0500454 * Determine full/half duplex. Return half on error.
wdenkc6097192002-11-03 00:24:07 +0000455 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400456int miiphy_duplex(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000457{
Dongpo Li8c83c032016-08-22 21:03:29 +0800458 u16 bmcr, anlpar, adv;
wdenkc6097192002-11-03 00:24:07 +0000459
wdenk6fb6af62004-03-23 23:20:24 +0000460#if defined(CONFIG_PHY_GIGE)
Larry Johnson71bc6e62007-11-01 08:46:50 -0500461 u16 btsr;
462
463 /* Check for 1000BASE-X. */
Andy Fleming16a53232011-04-07 14:38:35 -0500464 if (miiphy_is_1000base_x(devname, addr)) {
Larry Johnson71bc6e62007-11-01 08:46:50 -0500465 /* 1000BASE-X */
Andy Fleming16a53232011-04-07 14:38:35 -0500466 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
467 printf("1000BASE-X PHY AN duplex");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500468 goto miiphy_read_failed;
469 }
470 }
471 /*
472 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
473 */
474 /* Check for 1000BASE-T. */
Andy Fleming16a53232011-04-07 14:38:35 -0500475 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
476 printf("PHY 1000BT status");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500477 goto miiphy_read_failed;
478 }
479 if (btsr != 0xFFFF) {
480 if (btsr & PHY_1000BTSR_1000FD) {
481 return FULL;
482 } else if (btsr & PHY_1000BTSR_1000HD) {
483 return HALF;
wdenk855a4962004-03-14 18:23:55 +0000484 }
485 }
wdenk6fb6af62004-03-23 23:20:24 +0000486#endif /* CONFIG_PHY_GIGE */
wdenk855a4962004-03-14 18:23:55 +0000487
wdenka56bd922004-06-06 23:13:55 +0000488 /* Check Basic Management Control Register first. */
Andy Fleming16a53232011-04-07 14:38:35 -0500489 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
490 puts("PHY duplex");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500491 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000492 }
wdenka56bd922004-06-06 23:13:55 +0000493 /* Check if auto-negotiation is on. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500494 if (bmcr & BMCR_ANENABLE) {
wdenka56bd922004-06-06 23:13:55 +0000495 /* Get auto-negotiation results. */
Andy Fleming16a53232011-04-07 14:38:35 -0500496 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
497 puts("PHY AN duplex");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500498 goto miiphy_read_failed;
wdenka56bd922004-06-06 23:13:55 +0000499 }
Dongpo Li8c83c032016-08-22 21:03:29 +0800500
501 if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
502 puts("PHY AN adv duplex");
503 goto miiphy_read_failed;
504 }
505 return ((anlpar & adv) & (LPA_10FULL | LPA_100FULL)) ?
Larry Johnson71bc6e62007-11-01 08:46:50 -0500506 FULL : HALF;
wdenka56bd922004-06-06 23:13:55 +0000507 }
508 /* Get speed from basic control settings. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500509 return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
wdenka56bd922004-06-06 23:13:55 +0000510
Michael Zaidman5f841952010-02-28 16:28:25 +0200511miiphy_read_failed:
Andy Fleming16a53232011-04-07 14:38:35 -0500512 printf(" read failed, assuming half duplex\n");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500513 return HALF;
514}
515
516/*****************************************************************************
517 *
518 * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
519 * 1000BASE-T, or on error.
520 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400521int miiphy_is_1000base_x(const char *devname, unsigned char addr)
Larry Johnson71bc6e62007-11-01 08:46:50 -0500522{
523#if defined(CONFIG_PHY_GIGE)
524 u16 exsr;
525
Andy Fleming16a53232011-04-07 14:38:35 -0500526 if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
527 printf("PHY extended status read failed, assuming no "
Larry Johnson71bc6e62007-11-01 08:46:50 -0500528 "1000BASE-X\n");
529 return 0;
530 }
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500531 return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
Larry Johnson71bc6e62007-11-01 08:46:50 -0500532#else
533 return 0;
534#endif
wdenkc6097192002-11-03 00:24:07 +0000535}
536
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200537#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
wdenkfc3e2162003-10-08 22:33:00 +0000538/*****************************************************************************
539 *
540 * Determine link status
541 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400542int miiphy_link(const char *devname, unsigned char addr)
wdenkfc3e2162003-10-08 22:33:00 +0000543{
544 unsigned short reg;
545
wdenka3d991b2004-04-15 21:48:45 +0000546 /* dummy read; needed to latch some phys */
Andy Fleming16a53232011-04-07 14:38:35 -0500547 (void)miiphy_read(devname, addr, MII_BMSR, &reg);
548 if (miiphy_read(devname, addr, MII_BMSR, &reg)) {
549 puts("MII_BMSR read failed, assuming no link\n");
550 return 0;
wdenkfc3e2162003-10-08 22:33:00 +0000551 }
552
553 /* Determine if a link is active */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500554 if ((reg & BMSR_LSTATUS) != 0) {
Andy Fleming16a53232011-04-07 14:38:35 -0500555 return 1;
wdenkfc3e2162003-10-08 22:33:00 +0000556 } else {
Andy Fleming16a53232011-04-07 14:38:35 -0500557 return 0;
wdenkfc3e2162003-10-08 22:33:00 +0000558 }
559}
560#endif