blob: 39a774ad83ce13c246bbf8ea417e8c904fd10bdb [file] [log] [blame]
Beniamino Galvanibfcef282016-05-08 08:30:16 +02001/*
2 * Copyright (c) 2016 Andreas Färber
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
Heiner Kallweita3b02a12017-04-12 20:28:36 +020043#include "meson-gx.dtsi"
Beniamino Galvanidd838402016-08-16 11:49:48 +020044#include <dt-bindings/gpio/meson-gxbb-gpio.h>
45#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
Heiner Kallweita3b02a12017-04-12 20:28:36 +020046#include <dt-bindings/clock/gxbb-clkc.h>
47#include <dt-bindings/clock/gxbb-aoclkc.h>
48#include <dt-bindings/reset/gxbb-aoclkc.h>
Beniamino Galvanibfcef282016-05-08 08:30:16 +020049
50/ {
51 compatible = "amlogic,meson-gxbb";
Beniamino Galvanibfcef282016-05-08 08:30:16 +020052
53 soc {
Heiner Kallweita3b02a12017-04-12 20:28:36 +020054 usb0_phy: phy@c0000000 {
55 compatible = "amlogic,meson-gxbb-usb2-phy";
56 #phy-cells = <0>;
57 reg = <0x0 0xc0000000 0x0 0x20>;
58 resets = <&reset RESET_USB_OTG>;
59 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
60 clock-names = "usb_general", "usb";
61 status = "disabled";
62 };
63
64 usb1_phy: phy@c0000020 {
65 compatible = "amlogic,meson-gxbb-usb2-phy";
66 #phy-cells = <0>;
67 reg = <0x0 0xc0000020 0x0 0x20>;
68 resets = <&reset RESET_USB_OTG>;
69 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
70 clock-names = "usb_general", "usb";
71 status = "disabled";
72 };
73
74 usb0: usb@c9000000 {
75 compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
76 reg = <0x0 0xc9000000 0x0 0x40000>;
77 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
78 clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
79 clock-names = "otg";
80 phys = <&usb0_phy>;
81 phy-names = "usb2-phy";
82 dr_mode = "host";
83 status = "disabled";
84 };
85
86 usb1: usb@c9100000 {
87 compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
88 reg = <0x0 0xc9100000 0x0 0x40000>;
89 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
90 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
91 clock-names = "otg";
92 phys = <&usb1_phy>;
93 phy-names = "usb2-phy";
94 dr_mode = "host";
95 status = "disabled";
96 };
97 };
98};
99
100&cbus {
101 spifc: spi@8c80 {
102 compatible = "amlogic,meson-gxbb-spifc";
103 reg = <0x0 0x08c80 0x0 0x80>;
104 #address-cells = <1>;
105 #size-cells = <0>;
106 clocks = <&clkc CLKID_SPI>;
107 status = "disabled";
108 };
109};
110
111&ethmac {
112 clocks = <&clkc CLKID_ETH>,
113 <&clkc CLKID_FCLK_DIV2>,
114 <&clkc CLKID_MPLL2>;
115 clock-names = "stmmaceth", "clkin0", "clkin1";
116};
117
118&aobus {
119 pinctrl_aobus: pinctrl@14 {
120 compatible = "amlogic,meson-gxbb-aobus-pinctrl";
Beniamino Galvanibfcef282016-05-08 08:30:16 +0200121 #address-cells = <2>;
122 #size-cells = <2>;
123 ranges;
124
Heiner Kallweita3b02a12017-04-12 20:28:36 +0200125 gpio_ao: bank@14 {
126 reg = <0x0 0x00014 0x0 0x8>,
127 <0x0 0x0002c 0x0 0x4>,
128 <0x0 0x00024 0x0 0x8>;
129 reg-names = "mux", "pull", "gpio";
130 gpio-controller;
131 #gpio-cells = <2>;
132 };
Beniamino Galvanibfcef282016-05-08 08:30:16 +0200133
Heiner Kallweita3b02a12017-04-12 20:28:36 +0200134 uart_ao_a_pins: uart_ao_a {
135 mux {
136 groups = "uart_tx_ao_a", "uart_rx_ao_a";
137 function = "uart_ao";
Beniamino Galvanidd838402016-08-16 11:49:48 +0200138 };
Beniamino Galvanibfcef282016-05-08 08:30:16 +0200139 };
140
Heiner Kallweita3b02a12017-04-12 20:28:36 +0200141 uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
142 mux {
143 groups = "uart_cts_ao_a",
144 "uart_rts_ao_a";
145 function = "uart_ao";
Beniamino Galvanibfcef282016-05-08 08:30:16 +0200146 };
147 };
148
Heiner Kallweita3b02a12017-04-12 20:28:36 +0200149 uart_ao_b_pins: uart_ao_b {
150 mux {
151 groups = "uart_tx_ao_b", "uart_rx_ao_b";
152 function = "uart_ao_b";
Beniamino Galvanidd838402016-08-16 11:49:48 +0200153 };
154 };
155
Heiner Kallweita3b02a12017-04-12 20:28:36 +0200156 uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
157 mux {
158 groups = "uart_cts_ao_b",
159 "uart_rts_ao_b";
160 function = "uart_ao_b";
Beniamino Galvanidd838402016-08-16 11:49:48 +0200161 };
162 };
163
Heiner Kallweita3b02a12017-04-12 20:28:36 +0200164 remote_input_ao_pins: remote_input_ao {
165 mux {
166 groups = "remote_input_ao";
167 function = "remote_input_ao";
168 };
Beniamino Galvanibfcef282016-05-08 08:30:16 +0200169 };
Beniamino Galvanidd838402016-08-16 11:49:48 +0200170
Heiner Kallweita3b02a12017-04-12 20:28:36 +0200171 i2c_ao_pins: i2c_ao {
172 mux {
173 groups = "i2c_sck_ao",
174 "i2c_sda_ao";
175 function = "i2c_ao";
176 };
177 };
178
179 pwm_ao_a_3_pins: pwm_ao_a_3 {
180 mux {
181 groups = "pwm_ao_a_3";
182 function = "pwm_ao_a_3";
183 };
184 };
185
186 pwm_ao_a_6_pins: pwm_ao_a_6 {
187 mux {
188 groups = "pwm_ao_a_6";
189 function = "pwm_ao_a_6";
190 };
191 };
192
193 pwm_ao_a_12_pins: pwm_ao_a_12 {
194 mux {
195 groups = "pwm_ao_a_12";
196 function = "pwm_ao_a_12";
197 };
198 };
199
200 pwm_ao_b_pins: pwm_ao_b {
201 mux {
202 groups = "pwm_ao_b";
203 function = "pwm_ao_b";
204 };
Beniamino Galvanidd838402016-08-16 11:49:48 +0200205 };
Beniamino Galvanibfcef282016-05-08 08:30:16 +0200206 };
Heiner Kallweita3b02a12017-04-12 20:28:36 +0200207
208 clkc_AO: clock-controller@040 {
209 compatible = "amlogic,gxbb-aoclkc";
210 reg = <0x0 0x00040 0x0 0x4>;
211 #clock-cells = <1>;
212 #reset-cells = <1>;
213 };
214
215 pwm_ab_AO: pwm@550 {
216 compatible = "amlogic,meson-gxbb-pwm";
217 reg = <0x0 0x0550 0x0 0x10>;
218 #pwm-cells = <3>;
219 status = "disabled";
220 };
221
222 i2c_AO: i2c@500 {
223 compatible = "amlogic,meson-gxbb-i2c";
224 reg = <0x0 0x500 0x0 0x20>;
225 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
226 clocks = <&clkc CLKID_AO_I2C>;
227 #address-cells = <1>;
228 #size-cells = <0>;
229 status = "disabled";
230 };
231};
232
233&periphs {
234 pinctrl_periphs: pinctrl@4b0 {
235 compatible = "amlogic,meson-gxbb-periphs-pinctrl";
236 #address-cells = <2>;
237 #size-cells = <2>;
238 ranges;
239
240 gpio: bank@4b0 {
241 reg = <0x0 0x004b0 0x0 0x28>,
242 <0x0 0x004e8 0x0 0x14>,
243 <0x0 0x00120 0x0 0x14>,
244 <0x0 0x00430 0x0 0x40>;
245 reg-names = "mux", "pull", "pull-enable", "gpio";
246 gpio-controller;
247 #gpio-cells = <2>;
248 };
249
250 emmc_pins: emmc {
251 mux {
252 groups = "emmc_nand_d07",
253 "emmc_cmd",
254 "emmc_clk",
255 "emmc_ds";
256 function = "emmc";
257 };
258 };
259
260 nor_pins: nor {
261 mux {
262 groups = "nor_d",
263 "nor_q",
264 "nor_c",
265 "nor_cs";
266 function = "nor";
267 };
268 };
269
270 sdcard_pins: sdcard {
271 mux {
272 groups = "sdcard_d0",
273 "sdcard_d1",
274 "sdcard_d2",
275 "sdcard_d3",
276 "sdcard_cmd",
277 "sdcard_clk";
278 function = "sdcard";
279 };
280 };
281
282 sdio_pins: sdio {
283 mux {
284 groups = "sdio_d0",
285 "sdio_d1",
286 "sdio_d2",
287 "sdio_d3",
288 "sdio_cmd",
289 "sdio_clk";
290 function = "sdio";
291 };
292 };
293
294 sdio_irq_pins: sdio_irq {
295 mux {
296 groups = "sdio_irq";
297 function = "sdio";
298 };
299 };
300
301 uart_a_pins: uart_a {
302 mux {
303 groups = "uart_tx_a",
304 "uart_rx_a";
305 function = "uart_a";
306 };
307 };
308
309 uart_a_cts_rts_pins: uart_a_cts_rts {
310 mux {
311 groups = "uart_cts_a",
312 "uart_rts_a";
313 function = "uart_a";
314 };
315 };
316
317 uart_b_pins: uart_b {
318 mux {
319 groups = "uart_tx_b",
320 "uart_rx_b";
321 function = "uart_b";
322 };
323 };
324
325 uart_b_cts_rts_pins: uart_b_cts_rts {
326 mux {
327 groups = "uart_cts_b",
328 "uart_rts_b";
329 function = "uart_b";
330 };
331 };
332
333 uart_c_pins: uart_c {
334 mux {
335 groups = "uart_tx_c",
336 "uart_rx_c";
337 function = "uart_c";
338 };
339 };
340
341 uart_c_cts_rts_pins: uart_c_cts_rts {
342 mux {
343 groups = "uart_cts_c",
344 "uart_rts_c";
345 function = "uart_c";
346 };
347 };
348
349 i2c_a_pins: i2c_a {
350 mux {
351 groups = "i2c_sck_a",
352 "i2c_sda_a";
353 function = "i2c_a";
354 };
355 };
356
357 i2c_b_pins: i2c_b {
358 mux {
359 groups = "i2c_sck_b",
360 "i2c_sda_b";
361 function = "i2c_b";
362 };
363 };
364
365 i2c_c_pins: i2c_c {
366 mux {
367 groups = "i2c_sck_c",
368 "i2c_sda_c";
369 function = "i2c_c";
370 };
371 };
372
373 eth_rgmii_pins: eth-rgmii {
374 mux {
375 groups = "eth_mdio",
376 "eth_mdc",
377 "eth_clk_rx_clk",
378 "eth_rx_dv",
379 "eth_rxd0",
380 "eth_rxd1",
381 "eth_rxd2",
382 "eth_rxd3",
383 "eth_rgmii_tx_clk",
384 "eth_tx_en",
385 "eth_txd0",
386 "eth_txd1",
387 "eth_txd2",
388 "eth_txd3";
389 function = "eth";
390 };
391 };
392
393 eth_rmii_pins: eth-rmii {
394 mux {
395 groups = "eth_mdio",
396 "eth_mdc",
397 "eth_clk_rx_clk",
398 "eth_rx_dv",
399 "eth_rxd0",
400 "eth_rxd1",
401 "eth_tx_en",
402 "eth_txd0",
403 "eth_txd1";
404 function = "eth";
405 };
406 };
407
408 pwm_a_x_pins: pwm_a_x {
409 mux {
410 groups = "pwm_a_x";
411 function = "pwm_a_x";
412 };
413 };
414
415 pwm_a_y_pins: pwm_a_y {
416 mux {
417 groups = "pwm_a_y";
418 function = "pwm_a_y";
419 };
420 };
421
422 pwm_b_pins: pwm_b {
423 mux {
424 groups = "pwm_b";
425 function = "pwm_b";
426 };
427 };
428
429 pwm_d_pins: pwm_d {
430 mux {
431 groups = "pwm_d";
432 function = "pwm_d";
433 };
434 };
435
436 pwm_e_pins: pwm_e {
437 mux {
438 groups = "pwm_e";
439 function = "pwm_e";
440 };
441 };
442
443 pwm_f_x_pins: pwm_f_x {
444 mux {
445 groups = "pwm_f_x";
446 function = "pwm_f_x";
447 };
448 };
449
450 pwm_f_y_pins: pwm_f_y {
451 mux {
452 groups = "pwm_f_y";
453 function = "pwm_f_y";
454 };
455 };
456
457 hdmi_hpd_pins: hdmi_hpd {
458 mux {
459 groups = "hdmi_hpd";
460 function = "hdmi_hpd";
461 };
462 };
463
464 hdmi_i2c_pins: hdmi_i2c {
465 mux {
466 groups = "hdmi_sda", "hdmi_scl";
467 function = "hdmi_i2c";
468 };
469 };
470 };
471};
472
473&hiubus {
474 clkc: clock-controller@0 {
475 compatible = "amlogic,gxbb-clkc";
476 #clock-cells = <1>;
477 reg = <0x0 0x0 0x0 0x3db>;
478 };
479};
480
481&i2c_A {
482 clocks = <&clkc CLKID_I2C>;
483};
484
485&i2c_B {
486 clocks = <&clkc CLKID_I2C>;
487};
488
489&i2c_C {
490 clocks = <&clkc CLKID_I2C>;
491};
492
493&sd_emmc_a {
494 clocks = <&clkc CLKID_SD_EMMC_A>,
495 <&xtal>,
496 <&clkc CLKID_FCLK_DIV2>;
497 clock-names = "core", "clkin0", "clkin1";
498};
499
500&sd_emmc_b {
501 clocks = <&clkc CLKID_SD_EMMC_B>,
502 <&xtal>,
503 <&clkc CLKID_FCLK_DIV2>;
504 clock-names = "core", "clkin0", "clkin1";
505};
506
507&sd_emmc_c {
508 clocks = <&clkc CLKID_SD_EMMC_C>,
509 <&xtal>,
510 <&clkc CLKID_FCLK_DIV2>;
511 clock-names = "core", "clkin0", "clkin1";
512};
513
514&vpu {
515 compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
Beniamino Galvanibfcef282016-05-08 08:30:16 +0200516};