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Stephen Warren88077282013-01-29 16:37:36 +00001/*
2 * (C) Copyright 2012 Stephen Warren
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Stephen Warren88077282013-01-29 16:37:36 +00005 */
6
7#ifndef _BCM2835_MBOX_H
8#define _BCM2835_MBOX_H
9
10#include <linux/compiler.h>
11
12/*
13 * The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU")
14 * and the ARM CPU. The ARM CPU is often thought of as the main CPU.
15 * However, the VideoCore actually controls the initial SoC boot, and hides
16 * much of the hardware behind a protocol. This protocol is transported
17 * using the SoC's mailbox hardware module.
18 *
19 * The mailbox hardware supports passing 32-bit values back and forth.
20 * Presumably by software convention of the firmware, the bottom 4 bits of the
21 * value are used to indicate a logical channel, and the upper 28 bits are the
22 * actual payload. Various channels exist using these simple raw messages. See
23 * https://github.com/raspberrypi/firmware/wiki/Mailboxes for a list. As an
24 * example, the messages on the power management channel are a bitmask of
25 * devices whose power should be enabled.
26 *
27 * The property mailbox channel passes messages that contain the (16-byte
28 * aligned) ARM physical address of a memory buffer. This buffer is passed to
29 * the VC for processing, is modified in-place by the VC, and the address then
30 * passed back to the ARM CPU as the response mailbox message to indicate
31 * request completion. The buffers have a generic and extensible format; each
32 * buffer contains a standard header, a list of "tags", and a terminating zero
33 * entry. Each tag contains an ID indicating its type, and length fields for
34 * generic parsing. With some limitations, an arbitrary set of tags may be
35 * combined together into a single message buffer. This file defines structs
36 * representing the header and many individual tag layouts and IDs.
37 */
38
39/* Raw mailbox HW */
40
41#define BCM2835_MBOX_PHYSADDR 0x2000b880
42
43struct bcm2835_mbox_regs {
44 u32 read;
45 u32 rsvd0[5];
46 u32 status;
47 u32 config;
48 u32 write;
49};
50
51#define BCM2835_MBOX_STATUS_WR_FULL 0x80000000
52#define BCM2835_MBOX_STATUS_RD_EMPTY 0x40000000
53
54/* Lower 4-bits are channel ID */
55#define BCM2835_CHAN_MASK 0xf
56#define BCM2835_MBOX_PACK(chan, data) (((data) & (~BCM2835_CHAN_MASK)) | \
57 (chan & BCM2835_CHAN_MASK))
58#define BCM2835_MBOX_UNPACK_CHAN(val) ((val) & BCM2835_CHAN_MASK)
59#define BCM2835_MBOX_UNPACK_DATA(val) ((val) & (~BCM2835_CHAN_MASK))
60
61/* Property mailbox buffer structures */
62
63#define BCM2835_MBOX_PROP_CHAN 8
64
65/* All message buffers must start with this header */
66struct bcm2835_mbox_hdr {
67 u32 buf_size;
68 u32 code;
69};
70
71#define BCM2835_MBOX_REQ_CODE 0
72#define BCM2835_MBOX_RESP_CODE_SUCCESS 0x80000000
73
74#define BCM2835_MBOX_INIT_HDR(_m_) { \
75 memset((_m_), 0, sizeof(*(_m_))); \
76 (_m_)->hdr.buf_size = sizeof(*(_m_)); \
77 (_m_)->hdr.code = 0; \
78 (_m_)->end_tag = 0; \
79 }
80
81/*
82 * A message buffer contains a list of tags. Each tag must also start with
83 * a standardized header.
84 */
85struct bcm2835_mbox_tag_hdr {
86 u32 tag;
87 u32 val_buf_size;
88 u32 val_len;
89};
90
91#define BCM2835_MBOX_INIT_TAG(_t_, _id_) { \
92 (_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \
93 (_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \
94 (_t_)->tag_hdr.val_len = sizeof((_t_)->body.req); \
95 }
96
97#define BCM2835_MBOX_INIT_TAG_NO_REQ(_t_, _id_) { \
98 (_t_)->tag_hdr.tag = BCM2835_MBOX_TAG_##_id_; \
99 (_t_)->tag_hdr.val_buf_size = sizeof((_t_)->body); \
100 (_t_)->tag_hdr.val_len = 0; \
101 }
102
103/* When responding, the VC sets this bit in val_len to indicate a response */
104#define BCM2835_MBOX_TAG_VAL_LEN_RESPONSE 0x80000000
105
106/*
107 * Below we define the ID and struct for many possible tags. This header only
108 * defines individual tag structs, not entire message structs, since in
109 * general an arbitrary set of tags may be combined into a single message.
110 * Clients of the mbox API are expected to define their own overall message
111 * structures by combining the header, a set of tags, and a terminating
112 * entry. For example,
113 *
114 * struct msg {
115 * struct bcm2835_mbox_hdr hdr;
116 * struct bcm2835_mbox_tag_get_arm_mem get_arm_mem;
117 * ... perhaps other tags here ...
118 * u32 end_tag;
119 * };
120 */
121
Stephen Warren6fe78452014-11-18 21:40:21 -0700122#define BCM2835_MBOX_TAG_GET_BOARD_REV 0x00010002
123
124/*
125 * 0x2..0xf from:
126 * http://raspberryalphaomega.org.uk/2013/02/06/automatic-raspberry-pi-board-revision-detection-model-a-b1-and-b2/
127 * http://www.raspberrypi.org/forums/viewtopic.php?f=63&t=32733
128 * 0x10, 0x11 from swarren's testing
129 */
130#define BCM2835_BOARD_REV_B_I2C0_2 0x2
131#define BCM2835_BOARD_REV_B_I2C0_3 0x3
132#define BCM2835_BOARD_REV_B_I2C1_4 0x4
133#define BCM2835_BOARD_REV_B_I2C1_5 0x5
134#define BCM2835_BOARD_REV_B_I2C1_6 0x6
135#define BCM2835_BOARD_REV_A_7 0x7
136#define BCM2835_BOARD_REV_A_8 0x8
137#define BCM2835_BOARD_REV_A_9 0x9
138#define BCM2835_BOARD_REV_B_REV2_d 0xd
139#define BCM2835_BOARD_REV_B_REV2_e 0xe
140#define BCM2835_BOARD_REV_B_REV2_f 0xf
141#define BCM2835_BOARD_REV_B_PLUS 0x10
142#define BCM2835_BOARD_REV_CM 0x11
143
144struct bcm2835_mbox_tag_get_board_rev {
145 struct bcm2835_mbox_tag_hdr tag_hdr;
146 union {
147 struct {
148 } req;
149 struct {
150 u32 rev;
151 } resp;
152 } body;
153};
154
Stephen Warren4f80a062014-09-26 20:51:39 -0600155#define BCM2835_MBOX_TAG_GET_MAC_ADDRESS 0x00010003
156
157struct bcm2835_mbox_tag_get_mac_address {
158 struct bcm2835_mbox_tag_hdr tag_hdr;
159 union {
160 struct {
161 } req;
162 struct {
163 u8 mac[6];
164 u8 pad[2];
165 } resp;
166 } body;
167};
168
Stephen Warren88077282013-01-29 16:37:36 +0000169#define BCM2835_MBOX_TAG_GET_ARM_MEMORY 0x00010005
170
171struct bcm2835_mbox_tag_get_arm_mem {
172 struct bcm2835_mbox_tag_hdr tag_hdr;
173 union {
174 struct {
175 } req;
176 struct {
177 u32 mem_base;
178 u32 mem_size;
179 } resp;
180 } body;
181};
182
Stephen Warrenf66f2aa2014-01-13 19:50:11 -0700183#define BCM2835_MBOX_POWER_DEVID_SDHCI 0
184#define BCM2835_MBOX_POWER_DEVID_UART0 1
185#define BCM2835_MBOX_POWER_DEVID_UART1 2
186#define BCM2835_MBOX_POWER_DEVID_USB_HCD 3
187#define BCM2835_MBOX_POWER_DEVID_I2C0 4
188#define BCM2835_MBOX_POWER_DEVID_I2C1 5
189#define BCM2835_MBOX_POWER_DEVID_I2C2 6
190#define BCM2835_MBOX_POWER_DEVID_SPI 7
191#define BCM2835_MBOX_POWER_DEVID_CCP2TX 8
192
Stephen Warren5e77a742014-02-05 20:42:25 -0700193#define BCM2835_MBOX_POWER_STATE_RESP_ON (1 << 0)
Stephen Warrenf66f2aa2014-01-13 19:50:11 -0700194/* Device doesn't exist */
195#define BCM2835_MBOX_POWER_STATE_RESP_NODEV (1 << 1)
196
197#define BCM2835_MBOX_TAG_GET_POWER_STATE 0x00020001
198
199struct bcm2835_mbox_tag_get_power_state {
200 struct bcm2835_mbox_tag_hdr tag_hdr;
201 union {
202 struct {
203 u32 device_id;
204 } req;
205 struct {
206 u32 device_id;
207 u32 state;
208 } resp;
209 } body;
210};
211
212#define BCM2835_MBOX_TAG_SET_POWER_STATE 0x00028001
213
214#define BCM2835_MBOX_SET_POWER_STATE_REQ_ON (1 << 0)
215#define BCM2835_MBOX_SET_POWER_STATE_REQ_WAIT (1 << 1)
216
217struct bcm2835_mbox_tag_set_power_state {
218 struct bcm2835_mbox_tag_hdr tag_hdr;
219 union {
220 struct {
221 u32 device_id;
222 u32 state;
223 } req;
224 struct {
225 u32 device_id;
226 u32 state;
227 } resp;
228 } body;
229};
230
Stephen Warren131a1e62013-01-29 16:37:42 +0000231#define BCM2835_MBOX_TAG_GET_CLOCK_RATE 0x00030002
232
233#define BCM2835_MBOX_CLOCK_ID_EMMC 1
234#define BCM2835_MBOX_CLOCK_ID_UART 2
235#define BCM2835_MBOX_CLOCK_ID_ARM 3
236#define BCM2835_MBOX_CLOCK_ID_CORE 4
237#define BCM2835_MBOX_CLOCK_ID_V3D 5
238#define BCM2835_MBOX_CLOCK_ID_H264 6
239#define BCM2835_MBOX_CLOCK_ID_ISP 7
240#define BCM2835_MBOX_CLOCK_ID_SDRAM 8
241#define BCM2835_MBOX_CLOCK_ID_PIXEL 9
242#define BCM2835_MBOX_CLOCK_ID_PWM 10
243
244struct bcm2835_mbox_tag_get_clock_rate {
245 struct bcm2835_mbox_tag_hdr tag_hdr;
246 union {
247 struct {
248 u32 clock_id;
249 } req;
250 struct {
251 u32 clock_id;
252 u32 rate_hz;
253 } resp;
254 } body;
255};
256
Stephen Warren88077282013-01-29 16:37:36 +0000257#define BCM2835_MBOX_TAG_ALLOCATE_BUFFER 0x00040001
258
259struct bcm2835_mbox_tag_allocate_buffer {
260 struct bcm2835_mbox_tag_hdr tag_hdr;
261 union {
262 struct {
263 u32 alignment;
264 } req;
265 struct {
266 u32 fb_address;
267 u32 fb_size;
268 } resp;
269 } body;
270};
271
272#define BCM2835_MBOX_TAG_RELEASE_BUFFER 0x00048001
273
274struct bcm2835_mbox_tag_release_buffer {
275 struct bcm2835_mbox_tag_hdr tag_hdr;
276 union {
277 struct {
278 } req;
279 struct {
280 } resp;
281 } body;
282};
283
284#define BCM2835_MBOX_TAG_BLANK_SCREEN 0x00040002
285
286struct bcm2835_mbox_tag_blank_screen {
287 struct bcm2835_mbox_tag_hdr tag_hdr;
288 union {
289 struct {
290 /* bit 0 means on, other bots reserved */
291 u32 state;
292 } req;
293 struct {
294 u32 state;
295 } resp;
296 } body;
297};
298
299/* Physical means output signal */
300#define BCM2835_MBOX_TAG_GET_PHYSICAL_W_H 0x00040003
301#define BCM2835_MBOX_TAG_TEST_PHYSICAL_W_H 0x00044003
302#define BCM2835_MBOX_TAG_SET_PHYSICAL_W_H 0x00048003
303
304struct bcm2835_mbox_tag_physical_w_h {
305 struct bcm2835_mbox_tag_hdr tag_hdr;
306 union {
307 /* req not used for get */
308 struct {
309 u32 width;
310 u32 height;
311 } req;
312 struct {
313 u32 width;
314 u32 height;
315 } resp;
316 } body;
317};
318
319/* Virtual means display buffer */
320#define BCM2835_MBOX_TAG_GET_VIRTUAL_W_H 0x00040004
321#define BCM2835_MBOX_TAG_TEST_VIRTUAL_W_H 0x00044004
322#define BCM2835_MBOX_TAG_SET_VIRTUAL_W_H 0x00048004
323
324struct bcm2835_mbox_tag_virtual_w_h {
325 struct bcm2835_mbox_tag_hdr tag_hdr;
326 union {
327 /* req not used for get */
328 struct {
329 u32 width;
330 u32 height;
331 } req;
332 struct {
333 u32 width;
334 u32 height;
335 } resp;
336 } body;
337};
338
339#define BCM2835_MBOX_TAG_GET_DEPTH 0x00040005
340#define BCM2835_MBOX_TAG_TEST_DEPTH 0x00044005
341#define BCM2835_MBOX_TAG_SET_DEPTH 0x00048005
342
343struct bcm2835_mbox_tag_depth {
344 struct bcm2835_mbox_tag_hdr tag_hdr;
345 union {
346 /* req not used for get */
347 struct {
348 u32 bpp;
349 } req;
350 struct {
351 u32 bpp;
352 } resp;
353 } body;
354};
355
356#define BCM2835_MBOX_TAG_GET_PIXEL_ORDER 0x00040006
357#define BCM2835_MBOX_TAG_TEST_PIXEL_ORDER 0x00044005
358#define BCM2835_MBOX_TAG_SET_PIXEL_ORDER 0x00048006
359
360#define BCM2835_MBOX_PIXEL_ORDER_BGR 0
361#define BCM2835_MBOX_PIXEL_ORDER_RGB 1
362
363struct bcm2835_mbox_tag_pixel_order {
364 struct bcm2835_mbox_tag_hdr tag_hdr;
365 union {
366 /* req not used for get */
367 struct {
368 u32 order;
369 } req;
370 struct {
371 u32 order;
372 } resp;
373 } body;
374};
375
376#define BCM2835_MBOX_TAG_GET_ALPHA_MODE 0x00040007
377#define BCM2835_MBOX_TAG_TEST_ALPHA_MODE 0x00044007
378#define BCM2835_MBOX_TAG_SET_ALPHA_MODE 0x00048007
379
380#define BCM2835_MBOX_ALPHA_MODE_0_OPAQUE 0
381#define BCM2835_MBOX_ALPHA_MODE_0_TRANSPARENT 1
382#define BCM2835_MBOX_ALPHA_MODE_IGNORED 2
383
384struct bcm2835_mbox_tag_alpha_mode {
385 struct bcm2835_mbox_tag_hdr tag_hdr;
386 union {
387 /* req not used for get */
388 struct {
389 u32 alpha;
390 } req;
391 struct {
392 u32 alpha;
393 } resp;
394 } body;
395};
396
397#define BCM2835_MBOX_TAG_GET_PITCH 0x00040008
398
399struct bcm2835_mbox_tag_pitch {
400 struct bcm2835_mbox_tag_hdr tag_hdr;
401 union {
402 struct {
403 } req;
404 struct {
405 u32 pitch;
406 } resp;
407 } body;
408};
409
410/* Offset of display window within buffer */
411#define BCM2835_MBOX_TAG_GET_VIRTUAL_OFFSET 0x00040009
412#define BCM2835_MBOX_TAG_TEST_VIRTUAL_OFFSET 0x00044009
413#define BCM2835_MBOX_TAG_SET_VIRTUAL_OFFSET 0x00048009
414
415struct bcm2835_mbox_tag_virtual_offset {
416 struct bcm2835_mbox_tag_hdr tag_hdr;
417 union {
418 /* req not used for get */
419 struct {
420 u32 x;
421 u32 y;
422 } req;
423 struct {
424 u32 x;
425 u32 y;
426 } resp;
427 } body;
428};
429
430#define BCM2835_MBOX_TAG_GET_OVERSCAN 0x0004000a
431#define BCM2835_MBOX_TAG_TEST_OVERSCAN 0x0004400a
432#define BCM2835_MBOX_TAG_SET_OVERSCAN 0x0004800a
433
434struct bcm2835_mbox_tag_overscan {
435 struct bcm2835_mbox_tag_hdr tag_hdr;
436 union {
437 /* req not used for get */
438 struct {
439 u32 top;
440 u32 bottom;
441 u32 left;
442 u32 right;
443 } req;
444 struct {
445 u32 top;
446 u32 bottom;
447 u32 left;
Andre Heidere2788af2013-10-22 22:27:20 +0200448 u32 right;
Stephen Warren88077282013-01-29 16:37:36 +0000449 } resp;
450 } body;
451};
452
453#define BCM2835_MBOX_TAG_GET_PALETTE 0x0004000b
454
455struct bcm2835_mbox_tag_get_palette {
456 struct bcm2835_mbox_tag_hdr tag_hdr;
457 union {
458 struct {
459 } req;
460 struct {
461 u32 data[1024];
462 } resp;
463 } body;
464};
465
466#define BCM2835_MBOX_TAG_TEST_PALETTE 0x0004400b
467
468struct bcm2835_mbox_tag_test_palette {
469 struct bcm2835_mbox_tag_hdr tag_hdr;
470 union {
471 struct {
472 u32 offset;
473 u32 num_entries;
474 u32 data[256];
475 } req;
476 struct {
477 u32 is_invalid;
478 } resp;
479 } body;
480};
481
482#define BCM2835_MBOX_TAG_SET_PALETTE 0x0004800b
483
484struct bcm2835_mbox_tag_set_palette {
485 struct bcm2835_mbox_tag_hdr tag_hdr;
486 union {
487 struct {
488 u32 offset;
489 u32 num_entries;
490 u32 data[256];
491 } req;
492 struct {
493 u32 is_invalid;
494 } resp;
495 } body;
496};
497
498/*
499 * Pass a raw u32 message to the VC, and receive a raw u32 back.
500 *
501 * Returns 0 for success, any other value for error.
502 */
503int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv);
504
505/*
506 * Pass a complete property-style buffer to the VC, and wait until it has
507 * been processed.
508 *
509 * This function expects a pointer to the mbox_hdr structure in an attempt
510 * to ensure some degree of type safety. However, some number of tags and
511 * a termination value are expected to immediately follow the header in
512 * memory, as required by the property protocol.
513 *
514 * Returns 0 for success, any other value for error.
515 */
516int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer);
517
518#endif