Gitiles
Code Review Sign In
gerrit.cesnet.cz / github / trini / u-boot / 6f6ea814ed12e44d6a803fd47a2cbdbf2915ce7f / . / include / configs / seaboard.h
blob: de19e38deb4ae7ad800c2007cc8d73f140dfa28e [file] [log] [blame]
Tom Warrenee4bbbc2011-01-27 10:58:08 +0000[diff] [blame]1/*
2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
27#include <asm/sizes.h>
Simon Glass649d0ff2012-04-02 13:19:03 +0000[diff] [blame]28
29/* LP0 suspend / resume */
Tom Warren29f3e3f2012-09-04 17:00:24 -0700[diff] [blame]30#define CONFIG_TEGRA_LP0
Simon Glass649d0ff2012-04-02 13:19:03 +0000[diff] [blame]31#define CONFIG_AES
32#define CONFIG_TEGRA_PMU
33#define CONFIG_TPS6586X_POWER
34#define CONFIG_TEGRA_CLOCK_SCALING
35
Allen Martin00a27492012-08-31 08:30:00 +0000[diff] [blame]36#include "tegra20-common.h"
Tom Warrenee4bbbc2011-01-27 10:58:08 +0000[diff] [blame]37
Simon Glassd9fdfe02012-02-27 10:52:53 +0000[diff] [blame]38/* Enable fdt support for Seaboard. Flash the image in u-boot-dtb.bin */
Allen Martin00a27492012-08-31 08:30:00 +0000[diff] [blame]39#define CONFIG_DEFAULT_DEVICE_TREE tegra20-seaboard
Simon Glassd9fdfe02012-02-27 10:52:53 +0000[diff] [blame]40#define CONFIG_OF_CONTROL
41#define CONFIG_OF_SEPARATE
42
Tom Warrenee4bbbc2011-01-27 10:58:08 +0000[diff] [blame]43/* High-level configuration options */
Allen Martin00a27492012-08-31 08:30:00 +0000[diff] [blame]44#define V_PROMPT "Tegra20 (SeaBoard) # "
Tom Warren29f3e3f2012-09-04 17:00:24 -0700[diff] [blame]45#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Seaboard"
Tom Warrenee4bbbc2011-01-27 10:58:08 +0000[diff] [blame]46
47/* Board-specific serial config */
48#define CONFIG_SERIAL_MULTI
Tom Warren29f3e3f2012-09-04 17:00:24 -0700[diff] [blame]49#define CONFIG_TEGRA_ENABLE_UARTD
Tom Warrenee4bbbc2011-01-27 10:58:08 +0000[diff] [blame]50#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
51
Simon Glassbf800882011-11-05 04:46:47 +0000[diff] [blame]52/* On Seaboard: GPIO_PI3 = Port I = 8, bit = 3 */
53#define CONFIG_UART_DISABLE_GPIO GPIO_PI3
54
Tom Warren05858732011-02-23 09:54:31 +0000[diff] [blame]55#define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD
Tom Warrenee4bbbc2011-01-27 10:58:08 +0000[diff] [blame]56
Tom Warren74652cf2011-04-14 12:18:06 +0000[diff] [blame]57#define CONFIG_BOARD_EARLY_INIT_F
Tom Warren83800952011-05-31 10:30:38 +0000[diff] [blame]58
Simon Glass905fe992012-02-03 15:14:00 +0000[diff] [blame]59/* I2C */
60#define CONFIG_TEGRA_I2C
61#define CONFIG_SYS_I2C_INIT_BOARD
62#define CONFIG_I2C_MULTI_BUS
63#define CONFIG_SYS_MAX_I2C_BUS 4
64#define CONFIG_SYS_I2C_SPEED 100000
65#define CONFIG_CMD_I2C
66
Tom Warren83800952011-05-31 10:30:38 +0000[diff] [blame]67/* SD/MMC */
68#define CONFIG_MMC
69#define CONFIG_GENERIC_MMC
Tom Warren3f82d892012-05-22 11:44:48 +0000[diff] [blame]70#define CONFIG_TEGRA_MMC
Tom Warren83800952011-05-31 10:30:38 +0000[diff] [blame]71#define CONFIG_CMD_MMC
72
73#define CONFIG_DOS_PARTITION
74#define CONFIG_EFI_PARTITION
75#define CONFIG_CMD_EXT2
76#define CONFIG_CMD_FAT
Simon Glass9dd79fd2011-11-05 04:46:48 +0000[diff] [blame]77
Stephen Warrenf9f2f122012-05-24 11:38:39 +0000[diff] [blame]78/* Environment in eMMC, at the end of 2nd "boot sector" */
79#define CONFIG_ENV_IS_IN_MMC
Stephen Warren573668a2012-07-30 10:55:45 +0000[diff] [blame]80#define CONFIG_ENV_OFFSET ((512 * 1024) - CONFIG_ENV_SIZE)
Stephen Warrenf9f2f122012-05-24 11:38:39 +0000[diff] [blame]81#define CONFIG_SYS_MMC_ENV_DEV 0
Stephen Warren573668a2012-07-30 10:55:45 +0000[diff] [blame]82#define CONFIG_SYS_MMC_ENV_PART 2
Simon Glassdb44ebd2012-02-27 10:52:52 +0000[diff] [blame]83
84/* USB Host support */
85#define CONFIG_USB_EHCI
86#define CONFIG_USB_EHCI_TEGRA
87#define CONFIG_USB_STORAGE
88#define CONFIG_CMD_USB
89
Stephen Warrendefd5e42012-05-16 06:36:12 +0000[diff] [blame]90/* USB networking support */
91#define CONFIG_USB_HOST_ETHER
Stephen Warrendefd5e42012-05-16 06:36:12 +0000[diff] [blame]92#define CONFIG_USB_ETHER_ASIX
93
94/* General networking support */
95#define CONFIG_CMD_NET
96#define CONFIG_CMD_DHCP
97
Simon Glass2cacf512012-04-17 09:01:37 +0000[diff] [blame]98/* Enable keyboard */
Tom Warren29f3e3f2012-09-04 17:00:24 -0700[diff] [blame]99#define CONFIG_TEGRA_KEYBOARD
Simon Glass2cacf512012-04-17 09:01:37 +0000[diff] [blame]100#define CONFIG_KEYBOARD
101
Tom Warren29f3e3f2012-09-04 17:00:24 -0700[diff] [blame]102#undef TEGRA_DEVICE_SETTINGS
103#define TEGRA_DEVICE_SETTINGS "stdin=serial,tegra-kbc\0" \
104 "stdout=serial\0" \
105 "stderr=serial\0"
Stephen Warrenbea26742012-05-16 06:21:00 +0000[diff] [blame]106
Tom Warren29f3e3f2012-09-04 17:00:24 -0700[diff] [blame]107#include "tegra-common-post.h"
Stephen Warrenbea26742012-05-16 06:21:00 +0000[diff] [blame]108
Simon Glass0dd84082012-07-29 20:53:30 +0000[diff] [blame]109/* NAND support */
110#define CONFIG_CMD_NAND
111#define CONFIG_TEGRA_NAND
112
113/* Max number of NAND devices */
114#define CONFIG_SYS_MAX_NAND_DEVICE 1
115
116/* Somewhat oddly, the NAND base address must be a config option */
Tom Warren29f3e3f2012-09-04 17:00:24 -0700[diff] [blame]117#define CONFIG_SYS_NAND_BASE NV_PA_NAND_BASE
Tom Warrenee4bbbc2011-01-27 10:58:08 +0000[diff] [blame]118#endif /* __CONFIG_H */