blob: e9babc6477e87b154e2834139c89f37b42814508 [file] [log] [blame]
Kumar Gala8e553132008-08-26 23:52:58 -05001/*
2 * Copyright 2008 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * Version 2 as published by the Free Software Foundation.
7 */
8
9#include <common.h>
Kumar Gala8e553132008-08-26 23:52:58 -050010
11#include <asm/fsl_ddr_sdram.h>
Haiying Wangdfb49102008-10-03 12:36:55 -040012#include <asm/fsl_ddr_dimm_params.h>
Kumar Gala8e553132008-08-26 23:52:58 -050013
Haiying Wangdfb49102008-10-03 12:36:55 -040014void fsl_ddr_board_options(memctl_options_t *popts,
15 dimm_params_t *pdimm,
16 unsigned int ctrl_num)
Kumar Gala8e553132008-08-26 23:52:58 -050017{
18 /*
19 * Factors to consider for CPO:
20 * - frequency
21 * - ddr1 vs. ddr2
22 */
23 popts->cpo_override = 0;
24
25 /*
26 * Factors to consider for write data delay:
27 * - number of DIMMs
28 *
29 * 1 = 1/4 clock delay
30 * 2 = 1/2 clock delay
31 * 3 = 3/4 clock delay
32 * 4 = 1 clock delay
33 * 5 = 5/4 clock delay
34 * 6 = 3/2 clock delay
35 */
36 popts->write_data_delay = 3;
37
38 /*
39 * Factors to consider for half-strength driver enable:
40 * - number of DIMMs installed
41 */
42 popts->half_strength_driver_enable = 0;
43}