blob: d737f1b330daee3425365bf8b1c9627597fc8200 [file] [log] [blame]
wdenk6f213472003-08-29 22:00:43 +00001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * (C) Copyright 2002
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
8 *
9 * (C) Copyright 2003
10 * Texas Instruments, <www.ti.com>
11 * Kshitij Gupta <Kshitij@ti.com>
12 *
13 * See file CREDITS for list of people who contributed to this
14 * project.
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 * MA 02111-1307 USA
30 */
31
32#include <common.h>
33#if defined(CONFIG_OMAP1610)
34#include <./configs/omap1510.h>
35#endif
36
37void flash__init (void);
38void ether__init (void);
39void set_muxconf_regs (void);
40void peripheral_power_enable (void);
41
42#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
43
44static inline void delay (unsigned long loops)
45{
46 __asm__ volatile ("1:\n"
47 "subs %0, %1, #1\n"
48 "bne 1b":"=r" (loops):"0" (loops));
49}
50
51/*
52 * Miscellaneous platform dependent initialisations
53 */
54
55int board_init (void)
56{
57 DECLARE_GLOBAL_DATA_PTR;
58
59 /* arch number of OMAP 1510-Board */
60 /* to be changed for OMAP 1610 Board */
61 gd->bd->bi_arch_number = 234;
62
63 /* adress of boot parameters */
64 gd->bd->bi_boot_params = 0x10000100;
65
66 /* Configure MUX settings */
67 set_muxconf_regs ();
68 peripheral_power_enable ();
69
70/* this speeds up your boot a quite a bit. However to make it
71 * work, you need make sure your kernel startup flush bug is fixed.
72 * ... rkw ...
73 */
74 icache_enable ();
75
76 flash__init ();
77 ether__init ();
78 return 0;
79}
80
81
82int misc_init_r (void)
83{
84 /* currently empty */
85 return (0);
86}
87
88/******************************
89 Routine:
90 Description:
91******************************/
92void flash__init (void)
93{
94#define EMIFS_GlB_Config_REG 0xfffecc0c
95 unsigned int regval;
96 regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG);
97 /* Turn off write protection for flash devices. */
98 regval = regval | 0x0001;
99 *((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval;
100}
101/*************************************************************
102 Routine:ether__init
103 Description: take the Ethernet controller out of reset and wait
104 for the EEPROM load to complete.
105*************************************************************/
106void ether__init (void)
107{
108#define ETH_CONTROL_REG 0x0400000b
109
110 *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
111 udelay (3);
112}
113
114/******************************
115 Routine:
116 Description:
117******************************/
118int dram_init (void)
119{
120 DECLARE_GLOBAL_DATA_PTR;
121
122 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
123 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
124
125 return 0;
126}
127
128/******************************************************
129 Routine: set_muxconf_regs
130 Description: Setting up the configuration Mux registers
131 specific to the hardware
132*******************************************************/
133void set_muxconf_regs (void)
134{
135 volatile unsigned int *MuxConfReg;
136 /* set each registers to its reset value; */
137 MuxConfReg =
138 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
139 /* setup for UART1 */
140 *MuxConfReg &= ~(0x02000000); /* bit 25 */
141 /* setup for UART2 */
142 *MuxConfReg &= ~(0x01000000); /* bit 24 */
143 /* Disable Uwire CS Hi-Z */
144 *MuxConfReg |= 0x08000000;
145 MuxConfReg =
146 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_3);
147 *MuxConfReg = 0x00000000;
148 MuxConfReg =
149 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_4);
150 *MuxConfReg = 0x00000000;
151 MuxConfReg =
152 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_5);
153 *MuxConfReg = 0x00000000;
154 MuxConfReg =
155 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_6);
156 /*setup mux for UART3 */
157 *MuxConfReg |= 0x00000001; /* bit3, 1, 0 (mux0 5,5,26) */
158 *MuxConfReg &= ~0x0000003e;
159 MuxConfReg =
160 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_7);
161 *MuxConfReg = 0x00000000;
162 MuxConfReg =
163 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_8);
164 /* Disable Uwire CS Hi-Z */
165 *MuxConfReg |= 0x00001200; /*bit 9 for CS0 12 for CS3 */
166 MuxConfReg =
167 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_9);
168 /* Need to turn on bits 21 and 12 in FUNC_MUX_CTRL_9 so the */
169 /* hardware will actually use TX and RTS based on bit 25 in */
170 /* FUNC_MUX_CTRL_0. I told you this thing was screwy! */
171 *MuxConfReg |= 0x00201000;
172 MuxConfReg =
173 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_A);
174 *MuxConfReg = 0x00000000;
175 MuxConfReg =
176 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_B);
177 *MuxConfReg = 0x00000000;
178 MuxConfReg =
179 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_C);
180 /* setup for UART2 */
181 /* Need to turn on bits 27 and 24 in FUNC_MUX_CTRL_C so the */
182 /* hardware will actually use TX and RTS based on bit 24 in */
183 /* FUNC_MUX_CTRL_0. */
184 *MuxConfReg |= 0x09000000;
185 MuxConfReg =
186 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_0);
187 *MuxConfReg = 0x00000000;
188 MuxConfReg =
189 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_1);
190 *MuxConfReg = 0x00000000;
191 /* mux setup for SD/MMC driver */
192 MuxConfReg =
193 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_2);
194 *MuxConfReg &= 0xFFFE0FFF;
195 MuxConfReg =
196 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_3);
197 *MuxConfReg = 0x00000000;
198 MuxConfReg =
199 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
200 /* bit 13 for MMC2 XOR_CLK */
201 *MuxConfReg &= ~(0x00002000);
202 /* bit 29 for UART 1 */
203 *MuxConfReg &= ~(0x00002000);
204 MuxConfReg =
205 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
206 /* Configure for USB. Turn on VBUS_CTRL and VBUS_MODE. */
207 *MuxConfReg |= 0x000C0000;
208 MuxConfReg =
209 (volatile unsigned int *) ((unsigned int)USB_TRANSCEIVER_CTRL);
210 *MuxConfReg &= ~(0x00000070);
211 *MuxConfReg &= ~(0x00000008);
212 *MuxConfReg |= 0x00000003;
213 *MuxConfReg |= 0x00000180;
214 MuxConfReg =
215 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
216 /* bit 17, software controls VBUS */
217 *MuxConfReg &= ~(0x00020000);
218 /* Enable USB 48 and 12M clocks */
219 *MuxConfReg |= 0x00000200;
220 *MuxConfReg &= ~(0x00000180);
221 /*2.75V for MMCSDIO1 */
222 MuxConfReg =
223 (volatile unsigned int *) ((unsigned int) VOLTAGE_CTRL_0);
224 *MuxConfReg = 0x00001FE7;
225 MuxConfReg =
226 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_0);
227 *MuxConfReg = 0x00000000;
228 MuxConfReg =
229 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_1);
230 *MuxConfReg = 0x00000000;
231 MuxConfReg =
232 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
233 *MuxConfReg = 0x00000000;
234 MuxConfReg =
235 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_3);
236 *MuxConfReg = 0x00000000;
237 MuxConfReg =
238 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_4);
239 *MuxConfReg = 0x00000000;
240 MuxConfReg =
241 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_4);
242 *MuxConfReg = 0x00000000;
243 /* Turn on UART2 48 MHZ clock */
244 MuxConfReg =
245 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
246 *MuxConfReg |= 0x40000000;
247 MuxConfReg =
248 (volatile unsigned int *) ((unsigned int) USB_OTG_CTRL);
249 /* setup for USB VBus detection OMAP161x */
250 *MuxConfReg |= 0x00040000; /* bit 18 */
251 MuxConfReg =
252 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
253 /* PullUps for SD/MMC driver */
254 *MuxConfReg |= ~(0xFFFE0FFF);
255 MuxConfReg =
256 (volatile unsigned int *) ((unsigned int)COMP_MODE_CTRL_0);
257 *MuxConfReg = COMP_MODE_ENABLE;
258}
259
260/******************************************************
261 Routine: peripheral_power_enable
262 Description: Enable the power for UART1
263*******************************************************/
264void peripheral_power_enable (void)
265{
266#define UART1_48MHZ_ENABLE ((unsigned short)0x0200)
267#define SW_CLOCK_REQUEST ((volatile unsigned short *)0xFFFE0834)
268
269 *SW_CLOCK_REQUEST |= UART1_48MHZ_ENABLE;
270}