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Jagannadha Sutradharudu Teki9e0802b2014-01-09 01:48:29 +05301/*
2 * Xilinx ZC770 XM013 board DTS
3 *
4 * Copyright (C) 2013 Xilinx, Inc.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8/dts-v1/;
9#include "zynq-7000.dtsi"
10
11/ {
Jagannadha Sutradharudu Teki9e0802b2014-01-09 01:48:29 +053012 compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000";
Michal Simek5c45b162015-07-22 11:36:32 +020013 model = "Xilinx Zynq";
Masahiro Yamada7d34c5d2014-05-15 20:37:54 +090014
Masahiro Yamada9f9d41b2014-05-15 20:37:55 +090015 aliases {
Michal Simek5c45b162015-07-22 11:36:32 +020016 ethernet0 = &gem1;
17 i2c0 = &i2c1;
Masahiro Yamada9f9d41b2014-05-15 20:37:55 +090018 serial0 = &uart0;
Michal Simek74720dc2016-04-07 13:08:35 +020019 spi0 = &qspi;
20 spi1 = &spi0;
Masahiro Yamada9f9d41b2014-05-15 20:37:55 +090021 };
22
Michal Simek5c45b162015-07-22 11:36:32 +020023 chosen {
Michal Simek936bbc52016-04-07 11:15:00 +020024 bootargs = "";
Michal Simek46919412016-01-12 13:56:44 +010025 stdout-path = "serial0:115200n8";
Masahiro Yamada7d34c5d2014-05-15 20:37:54 +090026 };
Michal Simek5c45b162015-07-22 11:36:32 +020027
Michal Simekf0600af2015-08-12 11:25:05 +020028 memory {
Michal Simek5c45b162015-07-22 11:36:32 +020029 device_type = "memory";
30 reg = <0x0 0x40000000>;
31 };
32};
33
Michal Simek5c45b162015-07-22 11:36:32 +020034&can1 {
35 status = "okay";
36};
37
38&gem1 {
39 status = "okay";
40 phy-mode = "rgmii-id";
41 phy-handle = <&ethernet_phy>;
42
43 ethernet_phy: ethernet-phy@7 {
44 reg = <7>;
45 };
46};
47
48&i2c1 {
49 status = "okay";
50 clock-frequency = <400000>;
51
52 si570: clock-generator@55 {
53 #clock-cells = <0>;
54 compatible = "silabs,si570";
55 temperature-stability = <50>;
56 reg = <0x55>;
57 factory-fout = <156250000>;
58 clock-frequency = <148500000>;
59 };
60};
61
Michal Simek74720dc2016-04-07 13:08:35 +020062&qspi {
63 status = "okay";
64};
65
Michal Simek7ebf67a2016-01-14 13:09:16 +010066&spi0 {
67 status = "okay";
68 num-cs = <4>;
69 is-decoded-cs = <0>;
70 eeprom: at25@0 {
71 at25,byte-len = <8192>;
72 at25,addr-mode = <2>;
73 at25,page-size = <32>;
74
75 compatible = "atmel,at25";
76 reg = <2>;
77 spi-max-frequency = <1000000>;
78 };
79};
80
Michal Simek5c45b162015-07-22 11:36:32 +020081&uart0 {
Simon Glass035c6b22015-10-17 19:41:24 -060082 u-boot,dm-pre-reloc;
Michal Simek5c45b162015-07-22 11:36:32 +020083 status = "okay";
Jagannadha Sutradharudu Teki9e0802b2014-01-09 01:48:29 +053084};