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Christian Gmeiner39d09732014-10-02 13:33:46 +02001/*
2 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
3 * Copyright (C) 2014 Bachmann electronic GmbH
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11#include "mx6_common.h"
Christian Gmeiner39d09732014-10-02 13:33:46 +020012
Christian Gmeiner39d09732014-10-02 13:33:46 +020013/* Size of malloc() pool */
14#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
15
16#define CONFIG_BOARD_EARLY_INIT_F
17#define CONFIG_MISC_INIT_R
Christian Gmeiner39d09732014-10-02 13:33:46 +020018
Christian Gmeiner39d09732014-10-02 13:33:46 +020019/* UART Configs */
20#define CONFIG_MXC_UART
21#define CONFIG_MXC_UART_BASE UART1_BASE
22
23/* SF Configs */
24#define CONFIG_CMD_SF
25#define CONFIG_SPI
Christian Gmeiner39d09732014-10-02 13:33:46 +020026#define CONFIG_SPI_FLASH_STMICRO
27#define CONFIG_SPI_FLASH_WINBOND
28#define CONFIG_SPI_FLASH_MACRONIX
29#define CONFIG_SPI_FLASH_SST
30#define CONFIG_MXC_SPI
31#define CONFIG_SF_DEFAULT_BUS 2
Christian Gmeiner2e3a1f42014-10-22 11:29:51 +020032#define CONFIG_SF_DEFAULT_CS 0
Christian Gmeiner39d09732014-10-02 13:33:46 +020033#define CONFIG_SF_DEFAULT_SPEED 25000000
34#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
35
36/* IO expander */
37#define CONFIG_PCA953X
38#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
39#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
40#define CONFIG_CMD_PCA953X
41#define CONFIG_CMD_PCA953X_INFO
42
43/* I2C Configs */
44#define CONFIG_CMD_I2C
45#define CONFIG_SYS_I2C
46#define CONFIG_SYS_I2C_MXC
York Sunf8cb1012015-03-20 10:20:40 -070047#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Christian Gmeiner39d09732014-10-02 13:33:46 +020048#define CONFIG_SYS_I2C_SPEED 100000
49
50/* OCOTP Configs */
51#define CONFIG_CMD_IMXOTP
52#define CONFIG_IMX_OTP
53#define IMX_OTP_BASE OCOTP_BASE_ADDR
54#define IMX_OTP_ADDR_MAX 0x7F
55#define IMX_OTP_DATA_ERROR_VAL 0xBADABADA
56#define IMX_OTPWRITE_ENABLED
57
58/* MMC Configs */
Christian Gmeiner39d09732014-10-02 13:33:46 +020059#define CONFIG_SYS_FSL_ESDHC_ADDR 0
60#define CONFIG_SYS_FSL_USDHC_NUM 2
61
Christian Gmeiner39c7d5a2014-11-10 14:35:48 +010062/* USB Configs */
63#define CONFIG_CMD_USB
Christian Gmeiner7f223072014-12-04 09:56:32 +010064#define CONFIG_USB_STORAGE
Christian Gmeiner39c7d5a2014-11-10 14:35:48 +010065#define CONFIG_USB_EHCI
66#define CONFIG_USB_EHCI_MX6
67#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
68#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
69
Christian Gmeiner39d09732014-10-02 13:33:46 +020070#ifdef CONFIG_MX6Q
71#define CONFIG_CMD_SATA
72#endif
73
74/*
75 * SATA Configs
76 */
77#ifdef CONFIG_CMD_SATA
78#define CONFIG_DWC_AHSATA
79#define CONFIG_SYS_SATA_MAX_DEVICE 1
80#define CONFIG_DWC_AHSATA_PORT_ID 0
81#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
82#define CONFIG_LBA48
83#define CONFIG_LIBATA
84#endif
85
86
Christian Gmeiner68a36642015-01-19 17:26:48 +010087/* SPL */
88#ifdef CONFIG_SPL
89#include "imx6_spl.h"
90#define CONFIG_SPL_SPI_SUPPORT
91#define CONFIG_SPL_LIBCOMMON_SUPPORT
92#define CONFIG_SPL_SPI_FLASH_SUPPORT
93#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
94#define CONFIG_SPL_SPI_LOAD
95#endif
96
Christian Gmeiner39d09732014-10-02 13:33:46 +020097#define CONFIG_CMD_PING
98#define CONFIG_CMD_DHCP
99#define CONFIG_CMD_MII
Christian Gmeiner39d09732014-10-02 13:33:46 +0200100#define CONFIG_FEC_MXC
101#define CONFIG_MII
102#define IMX_FEC_BASE ENET_BASE_ADDR
103#define CONFIG_FEC_XCV_TYPE MII100
104#define CONFIG_ETHPRIME "FEC"
105#define CONFIG_FEC_MXC_PHYADDR 0x5
106#define CONFIG_PHYLIB
107#define CONFIG_PHY_SMSC
108
Christian Gmeinerfb2589b2015-02-11 15:20:25 +0100109#ifndef CONFIG_SPL
110#define CONFIG_CMD_EEPROM
111#define CONFIG_ENV_EEPROM_IS_ON_I2C
112#define CONFIG_SYS_I2C_EEPROM_BUS 1
113#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
114#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
115#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
116#define CONFIG_SYS_I2C_MULTI_EEPROMS
117#endif
118
Christian Gmeiner39d09732014-10-02 13:33:46 +0200119/* Miscellaneous commands */
120#define CONFIG_CMD_BMODE
Christian Gmeiner39d09732014-10-02 13:33:46 +0200121
Christian Gmeiner39d09732014-10-02 13:33:46 +0200122#define CONFIG_PREBOOT ""
123
Christian Gmeiner39d09732014-10-02 13:33:46 +0200124/* Print Buffer Size */
125#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
Christian Gmeiner39d09732014-10-02 13:33:46 +0200126
127/* Physical Memory Map */
128#define CONFIG_NR_DRAM_BANKS 1
129#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
Christian Gmeiner39d09732014-10-02 13:33:46 +0200130
131#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
132#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
133#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
134
135#define CONFIG_SYS_INIT_SP_OFFSET \
136 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
137#define CONFIG_SYS_INIT_SP_ADDR \
138 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
139
Peter Robinson056845c2015-05-22 17:30:45 +0100140/* Environment organization */
Christian Gmeiner39d09732014-10-02 13:33:46 +0200141#define CONFIG_ENV_IS_IN_SPI_FLASH
142#define CONFIG_ENV_SIZE (64 * 1024) /* 64 kb */
143#define CONFIG_ENV_OFFSET (1024 * 1024)
144/* M25P16 has an erase size of 64 KiB */
145#define CONFIG_ENV_SECT_SIZE (64 * 1024)
146#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
147#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
148#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
149#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
150
Christian Gmeiner39d09732014-10-02 13:33:46 +0200151#define CONFIG_BOOTP_SERVERIP
152#define CONFIG_BOOTP_BOOTFILE
153
154#endif /* __CONFIG_H */