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gerrit.cesnet.cz / github / trini / u-boot / 6d7a33301a05472bc788415c1d1575041e478931 / . / arch / mips / Kconfig
blob: 7f7e258a801eaa9e4bff89a23df60e7ae3a26793 [file] [log] [blame]
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]1menu "MIPS architecture"
2 depends on MIPS
3
4config SYS_ARCH
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]5 default "mips"
6
Daniel Schwierzeckb9863b62014-10-26 14:14:07 +0100[diff] [blame]7config SYS_CPU
8 default "mips32" if CPU_MIPS32_R1 || CPU_MIPS32_R2
9 default "mips64" if CPU_MIPS64_R1 || CPU_MIPS64_R2
10
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]11choice
12 prompt "Target select"
Joe Hershbergera26cd042015-05-12 14:46:23 -0500[diff] [blame]13 optional
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]14
15config TARGET_QEMU_MIPS
16 bool "Support qemu-mips"
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +0100[diff] [blame]17 select SUPPORTS_BIG_ENDIAN
18 select SUPPORTS_LITTLE_ENDIAN
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +0100[diff] [blame]19 select SUPPORTS_CPU_MIPS32_R1
20 select SUPPORTS_CPU_MIPS32_R2
Daniel Schwierzeckaa45f752014-10-26 14:14:07 +0100[diff] [blame]21 select SUPPORTS_CPU_MIPS64_R1
22 select SUPPORTS_CPU_MIPS64_R2
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]23
24config TARGET_MALTA
25 bool "Support malta"
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +0100[diff] [blame]26 select SUPPORTS_BIG_ENDIAN
27 select SUPPORTS_LITTLE_ENDIAN
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +0100[diff] [blame]28 select SUPPORTS_CPU_MIPS32_R1
29 select SUPPORTS_CPU_MIPS32_R2
Daniel Schwierzeck9d638ee2015-01-18 22:00:18 +0100[diff] [blame]30 select SWAP_IO_SPACE
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]31
32config TARGET_VCT
33 bool "Support vct"
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +0100[diff] [blame]34 select SUPPORTS_BIG_ENDIAN
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +0100[diff] [blame]35 select SUPPORTS_CPU_MIPS32_R1
36 select SUPPORTS_CPU_MIPS32_R2
Paul Burtondd7c7202015-01-29 01:28:02 +0000[diff] [blame]37 select SYS_MIPS_CACHE_INIT_RAM_LOAD
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]38
39config TARGET_DBAU1X00
40 bool "Support dbau1x00"
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +0100[diff] [blame]41 select SUPPORTS_BIG_ENDIAN
42 select SUPPORTS_LITTLE_ENDIAN
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +0100[diff] [blame]43 select SUPPORTS_CPU_MIPS32_R1
44 select SUPPORTS_CPU_MIPS32_R2
Paul Burtondd7c7202015-01-29 01:28:02 +0000[diff] [blame]45 select SYS_MIPS_CACHE_INIT_RAM_LOAD
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]46
47config TARGET_PB1X00
48 bool "Support pb1x00"
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +0100[diff] [blame]49 select SUPPORTS_LITTLE_ENDIAN
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +0100[diff] [blame]50 select SUPPORTS_CPU_MIPS32_R1
51 select SUPPORTS_CPU_MIPS32_R2
Paul Burtondd7c7202015-01-29 01:28:02 +0000[diff] [blame]52 select SYS_MIPS_CACHE_INIT_RAM_LOAD
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]53
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]54
55endchoice
56
57source "board/dbau1x00/Kconfig"
58source "board/imgtec/malta/Kconfig"
59source "board/micronas/vct/Kconfig"
60source "board/pb1x00/Kconfig"
61source "board/qemu-mips/Kconfig"
62
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +0100[diff] [blame]63if MIPS
64
65choice
66 prompt "Endianness selection"
67 help
68 Some MIPS boards can be configured for either little or big endian
69 byte order. These modes require different U-Boot images. In general there
70 is one preferred byteorder for a particular system but some systems are
71 just as commonly used in the one or the other endianness.
72
73config SYS_BIG_ENDIAN
74 bool "Big endian"
75 depends on SUPPORTS_BIG_ENDIAN
76
77config SYS_LITTLE_ENDIAN
78 bool "Little endian"
79 depends on SUPPORTS_LITTLE_ENDIAN
80
81endchoice
82
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +0100[diff] [blame]83choice
84 prompt "CPU selection"
85 default CPU_MIPS32_R2
86
87config CPU_MIPS32_R1
88 bool "MIPS32 Release 1"
89 depends on SUPPORTS_CPU_MIPS32_R1
90 select 32BIT
91 help
92 Choose this option to build an U-Boot for release 1 or later of the
93 MIPS32 architecture.
94
95config CPU_MIPS32_R2
96 bool "MIPS32 Release 2"
97 depends on SUPPORTS_CPU_MIPS32_R2
98 select 32BIT
99 help
100 Choose this option to build an U-Boot for release 2 or later of the
101 MIPS32 architecture.
102
103config CPU_MIPS64_R1
104 bool "MIPS64 Release 1"
105 depends on SUPPORTS_CPU_MIPS64_R1
106 select 64BIT
107 help
108 Choose this option to build a kernel for release 1 or later of the
109 MIPS64 architecture.
110
111config CPU_MIPS64_R2
112 bool "MIPS64 Release 2"
113 depends on SUPPORTS_CPU_MIPS64_R2
114 select 64BIT
115 help
116 Choose this option to build a kernel for release 2 or later of the
117 MIPS64 architecture.
118
119endchoice
120
Daniel Schwierzeck25fc6642015-01-14 21:44:13 +0100[diff] [blame]121menu "OS boot interface"
122
123config MIPS_BOOT_CMDLINE_LEGACY
124 bool "Hand over legacy command line to Linux kernel"
125 default y
126 help
127 Enable this option if you want U-Boot to hand over the Yamon-style
128 command line to the kernel. All bootargs will be prepared as argc/argv
129 compatible list. The argument count (argc) is stored in register $a0.
130 The address of the argument list (argv) is stored in register $a1.
131
Daniel Schwierzeckca65e582015-01-14 21:44:13 +0100[diff] [blame]132config MIPS_BOOT_ENV_LEGACY
133 bool "Hand over legacy environment to Linux kernel"
134 default y
135 help
136 Enable this option if you want U-Boot to hand over the Yamon-style
137 environment to the kernel. Information like memory size, initrd
138 address and size will be prepared as zero-terminated key/value list.
139 The address of the enviroment is stored in register $a2.
140
Daniel Schwierzeck5002d8c2015-01-14 21:44:13 +0100[diff] [blame]141config MIPS_BOOT_FDT
Daniel Schwierzeck90b1c9f2015-02-22 16:58:30 +0100[diff] [blame]142 bool "Hand over a flattened device tree to Linux kernel"
Daniel Schwierzeck5002d8c2015-01-14 21:44:13 +0100[diff] [blame]143 default n
144 help
145 Enable this option if you want U-Boot to hand over a flattened
Daniel Schwierzeck90b1c9f2015-02-22 16:58:30 +0100[diff] [blame]146 device tree to the kernel. According to UHI register $a0 will be set
147 to -2 and the FDT address is stored in $a1.
Daniel Schwierzeck5002d8c2015-01-14 21:44:13 +0100[diff] [blame]148
Daniel Schwierzeck25fc6642015-01-14 21:44:13 +0100[diff] [blame]149endmenu
150
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +0100[diff] [blame]151config SUPPORTS_BIG_ENDIAN
152 bool
153
154config SUPPORTS_LITTLE_ENDIAN
155 bool
156
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +0100[diff] [blame]157config SUPPORTS_CPU_MIPS32_R1
158 bool
159
160config SUPPORTS_CPU_MIPS32_R2
161 bool
162
163config SUPPORTS_CPU_MIPS64_R1
164 bool
165
166config SUPPORTS_CPU_MIPS64_R2
167 bool
168
Daniel Schwierzeckc57dafb2015-01-18 21:59:35 +0100[diff] [blame]169config CPU_MIPS32
170 bool
171 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2
172
173config CPU_MIPS64
174 bool
175 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
176
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +0100[diff] [blame]177config 32BIT
178 bool
179
180config 64BIT
181 bool
182
Daniel Schwierzeck9d638ee2015-01-18 22:00:18 +0100[diff] [blame]183config SWAP_IO_SPACE
184 bool
185
Paul Burtondd7c7202015-01-29 01:28:02 +0000[diff] [blame]186config SYS_MIPS_CACHE_INIT_RAM_LOAD
187 bool
188
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +0100[diff] [blame]189endif
190
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]191endmenu