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Mike Frysinger6f070e12010-05-05 00:56:30 -04001/*
2 * dma.h - Blackfin DMA defines/structures/etc...
3 *
4 * Copyright 2004-2008 Analog Devices Inc.
5 * Licensed under the GPL-2 or later.
6 */
7
8#ifndef _BLACKFIN_DMA_H_
9#define _BLACKFIN_DMA_H_
10
Bob Liuee825962012-08-16 11:19:08 +080011#include <linux/types.h>
12#ifdef __ADSPBF60x__
13#include <asm/mach-common/bits/dde.h>
14#else
Mike Frysinger6f070e12010-05-05 00:56:30 -040015#include <asm/mach-common/bits/dma.h>
Bob Liuee825962012-08-16 11:19:08 +080016#endif
Mike Frysinger6f070e12010-05-05 00:56:30 -040017
18struct dmasg_large {
19 void *next_desc_addr;
20 unsigned long start_addr;
21 unsigned short cfg;
22 unsigned short x_count;
23 short x_modify;
24 unsigned short y_count;
25 short y_modify;
26} __attribute__((packed));
27
28struct dmasg {
29 unsigned long start_addr;
30 unsigned short cfg;
31 unsigned short x_count;
32 short x_modify;
33 unsigned short y_count;
34 short y_modify;
35} __attribute__((packed));
36
37struct dma_register {
Bob Liuee825962012-08-16 11:19:08 +080038#ifdef __ADSPBF60x__
Mike Frysinger6f070e12010-05-05 00:56:30 -040039 void *next_desc_ptr; /* DMA Next Descriptor Pointer register */
Bob Liuee825962012-08-16 11:19:08 +080040 u32 start_addr; /* DMA Start address register */
41 u32 config; /* DMA Configuration register */
Mike Frysinger6f070e12010-05-05 00:56:30 -040042
Bob Liuee825962012-08-16 11:19:08 +080043 u32 x_count; /* DMA x_count register */
44 s32 x_modify; /* DMA x_modify register */
45 u32 y_count; /* DMA y_count register */
46 s32 y_modify; /* DMA y_modify register */
47 u32 __pad0[2];
Mike Frysinger6f070e12010-05-05 00:56:30 -040048
Bob Liuee825962012-08-16 11:19:08 +080049 void *curr_desc_ptr; /* DMA Curr Descriptor Pointer register */
50 void *prev_desc_ptr; /* DMA Prev Descriptor Pointer register */
51 void *curr_addr; /* DMA Current Address Pointer register */
52 u32 status; /* DMA irq status register */
53 u32 curr_x_count; /* DMA Current x-count register */
54 u32 curr_y_count; /* DMA Current y-count register */
55 u32 __pad1[2];
Mike Frysinger6f070e12010-05-05 00:56:30 -040056
Bob Liuee825962012-08-16 11:19:08 +080057 u32 bw_limit; /* DMA Bandwidth Limit Count */
58 u32 curr_bw_limit; /* DMA curr Bandwidth Limit Count */
59 u32 bw_monitor; /* DMA Bandwidth Monitor Count */
60 u32 curr_bw_monitor; /* DMA curr Bandwidth Monitor Count */
61#else
62 void *next_desc_ptr; /* DMA Next Descriptor Pointer register */
63 u32 start_addr; /* DMA Start address register */
Mike Frysinger6f070e12010-05-05 00:56:30 -040064
Bob Liuee825962012-08-16 11:19:08 +080065 u16 config; /* DMA Configuration register */
66 u16 dummy1; /* DMA Configuration register */
Mike Frysinger6f070e12010-05-05 00:56:30 -040067
Bob Liuee825962012-08-16 11:19:08 +080068 u32 reserved;
Mike Frysinger6f070e12010-05-05 00:56:30 -040069
Bob Liuee825962012-08-16 11:19:08 +080070 u16 x_count; /* DMA x_count register */
71 u16 dummy2;
Mike Frysinger6f070e12010-05-05 00:56:30 -040072
Bob Liuee825962012-08-16 11:19:08 +080073 s16 x_modify; /* DMA x_modify register */
74 u16 dummy3;
Mike Frysinger6f070e12010-05-05 00:56:30 -040075
Bob Liuee825962012-08-16 11:19:08 +080076 u16 y_count; /* DMA y_count register */
77 u16 dummy4;
Mike Frysinger6f070e12010-05-05 00:56:30 -040078
Bob Liuee825962012-08-16 11:19:08 +080079 s16 y_modify; /* DMA y_modify register */
80 u16 dummy5;
Mike Frysinger6f070e12010-05-05 00:56:30 -040081
Bob Liuee825962012-08-16 11:19:08 +080082 void *curr_desc_ptr; /* DMA Current Descriptor Pointer register */
Mike Frysinger6f070e12010-05-05 00:56:30 -040083
Bob Liuee825962012-08-16 11:19:08 +080084 u32 curr_addr_ptr; /* DMA Current Address Pointer register */
Mike Frysinger6f070e12010-05-05 00:56:30 -040085
Bob Liuee825962012-08-16 11:19:08 +080086 u16 status; /* DMA irq status register */
87 u16 dummy6;
Mike Frysinger6f070e12010-05-05 00:56:30 -040088
Bob Liuee825962012-08-16 11:19:08 +080089 u16 peripheral_map; /* DMA peripheral map register */
90 u16 dummy7;
91
92 u16 curr_x_count; /* DMA Current x-count register */
93 u16 dummy8;
94
95 u32 reserved2;
96
97 u16 curr_y_count; /* DMA Current y-count register */
98 u16 dummy9;
99
100 u32 reserved3;
101#endif
Mike Frysinger6f070e12010-05-05 00:56:30 -0400102};
103
104#endif