blob: 432be05469655116817fb6be88e180aebaea3367 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
Ben Warren04a9e112008-01-16 22:37:35 -05002/*
3 * Freescale non-CPM SPI Controller
4 *
5 * Copyright 2008 Qstreams Networks, Inc.
Ben Warren04a9e112008-01-16 22:37:35 -05006 */
7
8#ifndef _ASM_MPC8XXX_SPI_H_
9#define _ASM_MPC8XXX_SPI_H_
10
11#include <asm/types.h>
12
Ilya Yanok7c619dd2010-06-28 16:44:33 +040013#if defined(CONFIG_MPC8308) || \
Ben Warren04a9e112008-01-16 22:37:35 -050014 defined(CONFIG_MPC8313) || \
15 defined(CONFIG_MPC8315) || \
Ilya Yanok7c619dd2010-06-28 16:44:33 +040016 defined(CONFIG_MPC834x) || \
Peter Tyser2c7920a2009-05-22 17:23:25 -050017 defined(CONFIG_MPC837x)
Ben Warren04a9e112008-01-16 22:37:35 -050018
Kim Phillips2956acd2008-01-17 12:48:00 -060019typedef struct spi8xxx {
Ben Warren04a9e112008-01-16 22:37:35 -050020 u8 res0[0x20]; /* 0x0-0x01f reserved */
21 u32 mode; /* mode register */
22 u32 event; /* event register */
23 u32 mask; /* mask register */
24 u32 com; /* command register */
25 u32 tx; /* transmit register */
26 u32 rx; /* receive register */
Dave Liucfe5ca72008-01-18 10:07:04 +080027 u8 res1[0xFC8]; /* fill up to 0x1000 */
Ben Warren04a9e112008-01-16 22:37:35 -050028} spi8xxx_t;
29
30#endif
31
32#endif /* _ASM_MPC8XXX_SPI_H_ */