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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Wu, Josh9e336902013-04-16 23:42:44 +00002/*
3 * (C) Copyright 2013 Atmel Corporation.
4 * Josh Wu <josh.wu@atmel.com>
5 *
6 * Configuation settings for the AT91SAM9N12-EK boards.
Wu, Josh9e336902013-04-16 23:42:44 +00007 */
8
9#ifndef __AT91SAM9N12_CONFIG_H_
10#define __AT91SAM9N12_CONFIG_H_
11
Wu, Josh9e336902013-04-16 23:42:44 +000012/* ARM asynchronous clock */
13#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
14#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
Wu, Josh9e336902013-04-16 23:42:44 +000015
16/* Misc CPU related */
17#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
18#define CONFIG_SETUP_MEMORY_TAGS
19#define CONFIG_INITRD_TAG
20#define CONFIG_SKIP_LOWLEVEL_INIT
Wu, Josh9e336902013-04-16 23:42:44 +000021
Wu, Josh9e336902013-04-16 23:42:44 +000022/* LCD */
Wu, Josh9e336902013-04-16 23:42:44 +000023#define LCD_BPP LCD_COLOR16
24#define LCD_OUTPUT_BPP 24
25#define CONFIG_LCD_LOGO
26#define CONFIG_LCD_INFO
27#define CONFIG_LCD_INFO_BELOW_LOGO
Wu, Josh9e336902013-04-16 23:42:44 +000028#define CONFIG_ATMEL_LCD_RGB565
Wu, Josh9e336902013-04-16 23:42:44 +000029
Wu, Josh9e336902013-04-16 23:42:44 +000030/*
31 * BOOTP options
32 */
33#define CONFIG_BOOTP_BOOTFILESIZE
Wu, Josh9e336902013-04-16 23:42:44 +000034
Wu, Josh9e336902013-04-16 23:42:44 +000035#define CONFIG_SYS_SDRAM_BASE 0x20000000
36#define CONFIG_SYS_SDRAM_SIZE 0x08000000
37
38/*
39 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
40 * leaving the correct space for initial global data structure above
41 * that address while providing maximum stack area below.
42 */
43# define CONFIG_SYS_INIT_SP_ADDR \
Wenyou Yange61ed482017-09-14 11:07:42 +080044 (0x00300000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
Wu, Josh9e336902013-04-16 23:42:44 +000045
46/* DataFlash */
Wu, Josh9e336902013-04-16 23:42:44 +000047
48/* NAND flash */
49#ifdef CONFIG_CMD_NAND
Wu, Josh9e336902013-04-16 23:42:44 +000050#define CONFIG_SYS_MAX_NAND_DEVICE 1
51#define CONFIG_SYS_NAND_BASE 0x40000000
52#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
53#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
Andreas Bießmannac45bb12013-11-29 12:13:45 +010054#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4)
55#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)
Tom Rini8f1a80e2017-07-28 21:31:42 -040056#endif
Wu, Josh9e336902013-04-16 23:42:44 +000057
Wu, Josh9e336902013-04-16 23:42:44 +000058#define CONFIG_EXTRA_ENV_SETTINGS \
59 "console=console=ttyS0,115200\0" \
Tom Rini43ede0b2017-10-22 17:55:07 -040060 "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \
Wu, Josh9e336902013-04-16 23:42:44 +000061 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
62 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
63
Bo Shen16276222013-04-24 10:46:18 +080064/* Ethernet */
Wu, Josh9e336902013-04-16 23:42:44 +000065#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
66
Bo Shend9bef0a2013-10-21 16:13:59 +080067/* USB host */
68#ifdef CONFIG_CMD_USB
69#define CONFIG_USB_ATMEL
Bo Shendcd2f1a2013-10-21 16:14:00 +080070#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
Bo Shend9bef0a2013-10-21 16:13:59 +080071#define CONFIG_USB_OHCI_NEW
72#define CONFIG_SYS_USB_OHCI_CPU_INIT
73#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
74#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12"
75#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
Bo Shend9bef0a2013-10-21 16:13:59 +080076#endif
77
Wenyou Yang55415432017-09-14 11:07:44 +080078#ifdef CONFIG_SPI_BOOT
Wu, Josh9e336902013-04-16 23:42:44 +000079
80/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Wu, Josh9e336902013-04-16 23:42:44 +000081#define CONFIG_BOOTCOMMAND \
82 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
83 "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \
84 "bootm 0x22000000"
85
Wenyou Yang55415432017-09-14 11:07:44 +080086#elif defined(CONFIG_NAND_BOOT)
Wu, Josh9e336902013-04-16 23:42:44 +000087
88/* bootstrap + u-boot + env + linux in nandflash */
Wu, Josh9e336902013-04-16 23:42:44 +000089#define CONFIG_BOOTCOMMAND \
90 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
91 "nand read 0x21000000 0x180000 0x080000;" \
92 "nand read 0x22000000 0x200000 0x400000;" \
93 "bootm 0x22000000 - 0x21000000"
94
Wenyou Yang55415432017-09-14 11:07:44 +080095#else /* CONFIG_SD_BOOT */
Wu, Josh9e336902013-04-16 23:42:44 +000096
Wu, Josh9e336902013-04-16 23:42:44 +000097#define CONFIG_BOOTCOMMAND \
98 "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \
99 "fatload mmc 0:1 0x21000000 dtb;" \
100 "fatload mmc 0:1 0x22000000 uImage;" \
101 "bootm 0x22000000 - 0x21000000"
102
103#endif
104
Wu, Josh9e336902013-04-16 23:42:44 +0000105/*
106 * Size of malloc() pool
107 */
108#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
Bo Shenff255e82015-03-27 14:23:36 +0800109
110/* SPL */
Bo Shenff255e82015-03-27 14:23:36 +0800111#define CONFIG_SPL_MAX_SIZE 0x6000
112#define CONFIG_SPL_STACK 0x308000
113
114#define CONFIG_SPL_BSS_START_ADDR 0x20000000
115#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
116#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
117#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
118
Bo Shenff255e82015-03-27 14:23:36 +0800119#define CONFIG_SYS_MONITOR_LEN (512 << 10)
120
121#define CONFIG_SYS_MASTER_CLOCK 132096000
122#define CONFIG_SYS_AT91_PLLA 0x20953f03
123#define CONFIG_SYS_MCKR 0x1301
124#define CONFIG_SYS_MCKR_CSS 0x1302
125
Wenyou Yang55415432017-09-14 11:07:44 +0800126#ifdef CONFIG_SD_BOOT
Bo Shenff255e82015-03-27 14:23:36 +0800127#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Wenyou Yang55415432017-09-14 11:07:44 +0800128#endif
Bo Shenff255e82015-03-27 14:23:36 +0800129#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
130#define CONFIG_SYS_NAND_5_ADDR_CYCLE
131#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
132#define CONFIG_SYS_NAND_PAGE_COUNT 64
133#define CONFIG_SYS_NAND_OOBSIZE 64
134#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
135#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
Bo Shenff255e82015-03-27 14:23:36 +0800136
Wu, Josh9e336902013-04-16 23:42:44 +0000137#endif