Bin Meng | 5dad97e | 2014-12-17 15:50:48 +0800 | [diff] [blame] | 1 | # |
| 2 | # Copyright (C) 2014, Simon Glass <sjg@chromium.org> |
| 3 | # Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> |
| 4 | # |
| 5 | # SPDX-License-Identifier: GPL-2.0+ |
| 6 | # |
| 7 | |
| 8 | U-Boot on x86 |
| 9 | ============= |
| 10 | |
| 11 | This document describes the information about U-Boot running on x86 targets, |
| 12 | including supported boards, build instructions, todo list, etc. |
| 13 | |
| 14 | Status |
| 15 | ------ |
| 16 | U-Boot supports running as a coreboot [1] payload on x86. So far only Link |
Bin Meng | 1ae5b78 | 2015-05-07 21:34:12 +0800 | [diff] [blame] | 17 | (Chromebook Pixel) and QEMU [2] x86 targets have been tested, but it should |
| 18 | work with minimal adjustments on other x86 boards since coreboot deals with |
| 19 | most of the low-level details. |
Bin Meng | 5dad97e | 2014-12-17 15:50:48 +0800 | [diff] [blame] | 20 | |
Stoppa, Igor | 28a8536 | 2015-08-13 16:43:35 +0300 | [diff] [blame] | 21 | U-Boot also supports booting directly from x86 reset vector, without coreboot. |
| 22 | In this case, known as bare mode, from the fact that it runs on the |
| 23 | 'bare metal', U-Boot acts like a BIOS replacement. Currently Link, QEMU x86 |
| 24 | targets and all Intel boards support running U-Boot 'bare metal'. |
Bin Meng | 5dad97e | 2014-12-17 15:50:48 +0800 | [diff] [blame] | 25 | |
Simon Glass | 3a1a18f | 2015-01-27 22:13:47 -0700 | [diff] [blame] | 26 | As for loading an OS, U-Boot supports directly booting a 32-bit or 64-bit |
| 27 | Linux kernel as part of a FIT image. It also supports a compressed zImage. |
Bin Meng | 3619e94 | 2015-10-07 20:19:20 -0700 | [diff] [blame] | 28 | U-Boot supports loading an x86 VxWorks kernel. Please check README.vxworks |
| 29 | for more details. |
Bin Meng | 5dad97e | 2014-12-17 15:50:48 +0800 | [diff] [blame] | 30 | |
Stoppa, Igor | 28a8536 | 2015-08-13 16:43:35 +0300 | [diff] [blame] | 31 | Build Instructions for U-Boot as coreboot payload |
| 32 | ------------------------------------------------- |
Bin Meng | 5dad97e | 2014-12-17 15:50:48 +0800 | [diff] [blame] | 33 | Building U-Boot as a coreboot payload is just like building U-Boot for targets |
| 34 | on other architectures, like below: |
| 35 | |
| 36 | $ make coreboot-x86_defconfig |
| 37 | $ make all |
| 38 | |
Bin Meng | 1ae5b78 | 2015-05-07 21:34:12 +0800 | [diff] [blame] | 39 | Note this default configuration will build a U-Boot payload for the QEMU board. |
Bin Meng | 617b867 | 2015-01-06 22:14:24 +0800 | [diff] [blame] | 40 | To build a coreboot payload against another board, you can change the build |
| 41 | configuration during the 'make menuconfig' process. |
| 42 | |
| 43 | x86 architecture ---> |
| 44 | ... |
Bin Meng | 1ae5b78 | 2015-05-07 21:34:12 +0800 | [diff] [blame] | 45 | (qemu-x86) Board configuration file |
Bin Meng | 683b09d | 2015-06-03 09:20:04 +0800 | [diff] [blame] | 46 | (qemu-x86_i440fx) Board Device Tree Source (dts) file |
Bin Meng | 1ae5b78 | 2015-05-07 21:34:12 +0800 | [diff] [blame] | 47 | (0x01920000) Board specific Cache-As-RAM (CAR) address |
Bin Meng | 617b867 | 2015-01-06 22:14:24 +0800 | [diff] [blame] | 48 | (0x4000) Board specific Cache-As-RAM (CAR) size |
| 49 | |
| 50 | Change the 'Board configuration file' and 'Board Device Tree Source (dts) file' |
| 51 | to point to a new board. You can also change the Cache-As-RAM (CAR) related |
| 52 | settings here if the default values do not fit your new board. |
| 53 | |
Stoppa, Igor | 28a8536 | 2015-08-13 16:43:35 +0300 | [diff] [blame] | 54 | Build Instructions for U-Boot as BIOS replacement (bare mode) |
| 55 | ------------------------------------------------------------- |
Simon Glass | 3a1a18f | 2015-01-27 22:13:47 -0700 | [diff] [blame] | 56 | Building a ROM version of U-Boot (hereafter referred to as u-boot.rom) is a |
Bin Meng | 5dad97e | 2014-12-17 15:50:48 +0800 | [diff] [blame] | 57 | little bit tricky, as generally it requires several binary blobs which are not |
| 58 | shipped in the U-Boot source tree. Due to this reason, the u-boot.rom build is |
| 59 | not turned on by default in the U-Boot source tree. Firstly, you need turn it |
Simon Glass | eea0f11 | 2015-01-27 22:13:32 -0700 | [diff] [blame] | 60 | on by enabling the ROM build: |
Bin Meng | 5dad97e | 2014-12-17 15:50:48 +0800 | [diff] [blame] | 61 | |
Simon Glass | eea0f11 | 2015-01-27 22:13:32 -0700 | [diff] [blame] | 62 | $ export BUILD_ROM=y |
| 63 | |
| 64 | This tells the Makefile to build u-boot.rom as a target. |
Bin Meng | 5dad97e | 2014-12-17 15:50:48 +0800 | [diff] [blame] | 65 | |
Stoppa, Igor | 28a8536 | 2015-08-13 16:43:35 +0300 | [diff] [blame] | 66 | --- |
| 67 | |
| 68 | Chromebook Link specific instructions for bare mode: |
Bin Meng | 5dad97e | 2014-12-17 15:50:48 +0800 | [diff] [blame] | 69 | |
| 70 | First, you need the following binary blobs: |
| 71 | |
| 72 | * descriptor.bin - Intel flash descriptor |
| 73 | * me.bin - Intel Management Engine |
| 74 | * mrc.bin - Memory Reference Code, which sets up SDRAM |
| 75 | * video ROM - sets up the display |
| 76 | |
| 77 | You can get these binary blobs by: |
| 78 | |
| 79 | $ git clone http://review.coreboot.org/p/blobs.git |
| 80 | $ cd blobs |
| 81 | |
| 82 | Find the following files: |
| 83 | |
| 84 | * ./mainboard/google/link/descriptor.bin |
| 85 | * ./mainboard/google/link/me.bin |
Simon Glass | 8712af9 | 2015-04-19 22:05:37 -0600 | [diff] [blame] | 86 | * ./northbridge/intel/sandybridge/systemagent-r6.bin |
Bin Meng | 5dad97e | 2014-12-17 15:50:48 +0800 | [diff] [blame] | 87 | |
| 88 | The 3rd one should be renamed to mrc.bin. |
Bin Meng | 786a08e | 2015-07-06 16:31:33 +0800 | [diff] [blame] | 89 | As for the video ROM, you can get it here [3] and rename it to vga.bin. |
Bin Meng | 5dad97e | 2014-12-17 15:50:48 +0800 | [diff] [blame] | 90 | Make sure all these binary blobs are put in the board directory. |
| 91 | |
| 92 | Now you can build U-Boot and obtain u-boot.rom: |
| 93 | |
| 94 | $ make chromebook_link_defconfig |
| 95 | $ make all |
| 96 | |
Stoppa, Igor | 28a8536 | 2015-08-13 16:43:35 +0300 | [diff] [blame] | 97 | --- |
| 98 | |
| 99 | Intel Crown Bay specific instructions for bare mode: |
Bin Meng | 5dad97e | 2014-12-17 15:50:48 +0800 | [diff] [blame] | 100 | |
Bin Meng | 1ae5b78 | 2015-05-07 21:34:12 +0800 | [diff] [blame] | 101 | U-Boot support of Intel Crown Bay board [4] relies on a binary blob called |
| 102 | Firmware Support Package [5] to perform all the necessary initialization steps |
Bin Meng | 5dad97e | 2014-12-17 15:50:48 +0800 | [diff] [blame] | 103 | as documented in the BIOS Writer Guide, including initialization of the CPU, |
| 104 | memory controller, chipset and certain bus interfaces. |
| 105 | |
| 106 | Download the Intel FSP for Atom E6xx series and Platform Controller Hub EG20T, |
| 107 | install it on your host and locate the FSP binary blob. Note this platform |
| 108 | also requires a Chipset Micro Code (CMC) state machine binary to be present in |
| 109 | the SPI flash where u-boot.rom resides, and this CMC binary blob can be found |
| 110 | in this FSP package too. |
| 111 | |
| 112 | * ./FSP/QUEENSBAY_FSP_GOLD_001_20-DECEMBER-2013.fd |
| 113 | * ./Microcode/C0_22211.BIN |
| 114 | |
| 115 | Rename the first one to fsp.bin and second one to cmc.bin and put them in the |
| 116 | board directory. |
| 117 | |
Bin Meng | 83d9712 | 2015-03-05 11:21:03 +0800 | [diff] [blame] | 118 | Note the FSP release version 001 has a bug which could cause random endless |
| 119 | loop during the FspInit call. This bug was published by Intel although Intel |
| 120 | did not describe any details. We need manually apply the patch to the FSP |
| 121 | binary using any hex editor (eg: bvi). Go to the offset 0x1fcd8 of the FSP |
| 122 | binary, change the following five bytes values from orginally E8 42 FF FF FF |
| 123 | to B8 00 80 0B 00. |
| 124 | |
Bin Meng | 7aaff9b | 2015-07-06 16:31:35 +0800 | [diff] [blame] | 125 | As for the video ROM, you need manually extract it from the Intel provided |
| 126 | BIOS for Crown Bay here [6], using the AMI MMTool [7]. Check PCI option ROM |
| 127 | ID 8086:4108, extract and save it as vga.bin in the board directory. |
| 128 | |
Bin Meng | 617b867 | 2015-01-06 22:14:24 +0800 | [diff] [blame] | 129 | Now you can build U-Boot and obtain u-boot.rom |
Bin Meng | 5dad97e | 2014-12-17 15:50:48 +0800 | [diff] [blame] | 130 | |
| 131 | $ make crownbay_defconfig |
| 132 | $ make all |
| 133 | |
Stoppa, Igor | 28a8536 | 2015-08-13 16:43:35 +0300 | [diff] [blame] | 134 | --- |
| 135 | |
Bin Meng | a2e3b05 | 2016-02-17 00:16:25 -0800 | [diff] [blame] | 136 | Intel Cougar Canyon 2 specific instructions for bare mode: |
| 137 | |
| 138 | This uses Intel FSP for 3rd generation Intel Core and Intel Celeron processors |
| 139 | with mobile Intel HM76 and QM77 chipsets platform. Download it from Intel FSP |
| 140 | website and put the .fd file (CHIEFRIVER_FSP_GOLD_001_09-OCTOBER-2013.fd at the |
| 141 | time of writing) in the board directory and rename it to fsp.bin. |
| 142 | |
| 143 | Now build U-Boot and obtain u-boot.rom |
| 144 | |
| 145 | $ make cougarcanyon2_defconfig |
| 146 | $ make all |
| 147 | |
| 148 | The board has two 8MB SPI flashes mounted, which are called SPI-0 and SPI-1 in |
| 149 | the board manual. The SPI-0 flash should have flash descriptor plus ME firmware |
| 150 | and SPI-1 flash is used to store U-Boot. For convenience, the complete 8MB SPI-0 |
| 151 | flash image is included in the FSP package (named Rom00_8M_MB_PPT.bin). Program |
| 152 | this image to the SPI-0 flash according to the board manual just once and we are |
| 153 | all set. For programming U-Boot we just need to program SPI-1 flash. |
| 154 | |
| 155 | --- |
| 156 | |
Bin Meng | 03bfc78 | 2016-02-17 00:47:04 -0800 | [diff] [blame] | 157 | Intel Bay Trail based board instructions for bare mode: |
Simon Glass | 3a1a18f | 2015-01-27 22:13:47 -0700 | [diff] [blame] | 158 | |
| 159 | This uses as FSP as with Crown Bay, except it is for the Atom E3800 series. |
Bin Meng | 03bfc78 | 2016-02-17 00:47:04 -0800 | [diff] [blame] | 160 | Two boards that use this configuration are Bayley Bay and Minnowboard MAX. |
Simon Glass | 3a1a18f | 2015-01-27 22:13:47 -0700 | [diff] [blame] | 161 | Download this and get the .fd file (BAYTRAIL_FSP_GOLD_003_16-SEP-2014.fd at |
Bin Meng | 03bfc78 | 2016-02-17 00:47:04 -0800 | [diff] [blame] | 162 | the time of writing). Put it in the corresponding board directory and rename |
| 163 | it to fsp.bin. |
Simon Glass | 3a1a18f | 2015-01-27 22:13:47 -0700 | [diff] [blame] | 164 | |
| 165 | Obtain the VGA RAM (Vga.dat at the time of writing) and put it into the same |
Bin Meng | 03bfc78 | 2016-02-17 00:47:04 -0800 | [diff] [blame] | 166 | board directory as vga.bin. |
Simon Glass | 3a1a18f | 2015-01-27 22:13:47 -0700 | [diff] [blame] | 167 | |
Bin Meng | 03bfc78 | 2016-02-17 00:47:04 -0800 | [diff] [blame] | 168 | You still need two more binary blobs. For Bayley Bay, they can be extracted |
| 169 | from the sample SPI image provided in the FSP (SPI.bin at the time of writing). |
| 170 | |
| 171 | $ ./tools/ifdtool -x BayleyBay/SPI.bin |
| 172 | $ cp flashregion_0_flashdescriptor.bin board/intel/bayleybay/descriptor.bin |
| 173 | $ cp flashregion_2_intel_me.bin board/intel/bayleybay/me.bin |
| 174 | |
| 175 | For Minnowboard MAX, we can reuse the same ME firmware above, but for flash |
| 176 | descriptor, we need get that somewhere else, as the one above does not seem to |
| 177 | work, probably because it is not designed for the Minnowboard MAX. Now download |
| 178 | the original firmware image for this board from: |
Simon Glass | 6852248 | 2015-04-25 11:46:43 -0600 | [diff] [blame] | 179 | |
| 180 | http://firmware.intel.com/sites/default/files/2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip |
| 181 | |
| 182 | Unzip it: |
| 183 | |
| 184 | $ unzip 2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip |
Simon Glass | 3a1a18f | 2015-01-27 22:13:47 -0700 | [diff] [blame] | 185 | |
| 186 | Use ifdtool in the U-Boot tools directory to extract the images from that |
| 187 | file, for example: |
| 188 | |
Simon Glass | 6852248 | 2015-04-25 11:46:43 -0600 | [diff] [blame] | 189 | $ ./tools/ifdtool -x MNW2MAX1.X64.0073.R02.1409160934.bin |
| 190 | |
| 191 | This will provide the descriptor file - copy this into the correct place: |
| 192 | |
| 193 | $ cp flashregion_0_flashdescriptor.bin board/intel/minnowmax/descriptor.bin |
| 194 | |
Simon Glass | 3a1a18f | 2015-01-27 22:13:47 -0700 | [diff] [blame] | 195 | Now you can build U-Boot and obtain u-boot.rom |
Bin Meng | 03bfc78 | 2016-02-17 00:47:04 -0800 | [diff] [blame] | 196 | Note: below are examples/information for Minnowboard MAX. |
Simon Glass | 3a1a18f | 2015-01-27 22:13:47 -0700 | [diff] [blame] | 197 | |
| 198 | $ make minnowmax_defconfig |
| 199 | $ make all |
| 200 | |
Simon Glass | df89867 | 2015-07-03 18:28:28 -0600 | [diff] [blame] | 201 | Checksums are as follows (but note that newer versions will invalidate this): |
| 202 | |
| 203 | $ md5sum -b board/intel/minnowmax/*.bin |
| 204 | ffda9a3b94df5b74323afb328d51e6b4 board/intel/minnowmax/descriptor.bin |
| 205 | 69f65b9a580246291d20d08cbef9d7c5 board/intel/minnowmax/fsp.bin |
| 206 | 894a97d371544ec21de9c3e8e1716c4b board/intel/minnowmax/me.bin |
| 207 | a2588537da387da592a27219d56e9962 board/intel/minnowmax/vga.bin |
| 208 | |
Simon Glass | 537ccba | 2015-07-03 18:28:24 -0600 | [diff] [blame] | 209 | The ROM image is broken up into these parts: |
| 210 | |
| 211 | Offset Description Controlling config |
| 212 | ------------------------------------------------------------ |
| 213 | 000000 descriptor.bin Hard-coded to 0 in ifdtool |
| 214 | 001000 me.bin Set by the descriptor |
| 215 | 500000 <spare> |
Bin Meng | 638a058 | 2015-10-11 21:37:44 -0700 | [diff] [blame] | 216 | 6f0000 MRC cache CONFIG_ENABLE_MRC_CACHE |
Simon Glass | 537ccba | 2015-07-03 18:28:24 -0600 | [diff] [blame] | 217 | 700000 u-boot-dtb.bin CONFIG_SYS_TEXT_BASE |
Bin Meng | 7f72cdf | 2015-08-27 08:38:16 -0700 | [diff] [blame] | 218 | 790000 vga.bin CONFIG_VGA_BIOS_ADDR |
Simon Glass | 537ccba | 2015-07-03 18:28:24 -0600 | [diff] [blame] | 219 | 7c0000 fsp.bin CONFIG_FSP_ADDR |
| 220 | 7f8000 <spare> (depends on size of fsp.bin) |
| 221 | 7fe000 Environment CONFIG_ENV_OFFSET |
| 222 | 7ff800 U-Boot 16-bit boot CONFIG_SYS_X86_START16 |
| 223 | |
| 224 | Overall ROM image size is controlled by CONFIG_ROM_SIZE. |
| 225 | |
Stoppa, Igor | 28a8536 | 2015-08-13 16:43:35 +0300 | [diff] [blame] | 226 | --- |
Simon Glass | 537ccba | 2015-07-03 18:28:24 -0600 | [diff] [blame] | 227 | |
Stoppa, Igor | 28a8536 | 2015-08-13 16:43:35 +0300 | [diff] [blame] | 228 | Intel Galileo instructions for bare mode: |
Bin Meng | 67582c0 | 2015-02-04 16:26:14 +0800 | [diff] [blame] | 229 | |
| 230 | Only one binary blob is needed for Remote Management Unit (RMU) within Intel |
| 231 | Quark SoC. Not like FSP, U-Boot does not call into the binary. The binary is |
| 232 | needed by the Quark SoC itself. |
| 233 | |
| 234 | You can get the binary blob from Quark Board Support Package from Intel website: |
| 235 | |
| 236 | * ./QuarkSocPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin |
| 237 | |
| 238 | Rename the file and put it to the board directory by: |
| 239 | |
| 240 | $ cp RMU.bin board/intel/galileo/rmu.bin |
| 241 | |
| 242 | Now you can build U-Boot and obtain u-boot.rom |
| 243 | |
| 244 | $ make galileo_defconfig |
| 245 | $ make all |
Simon Glass | 3a1a18f | 2015-01-27 22:13:47 -0700 | [diff] [blame] | 246 | |
Bin Meng | 03bfc78 | 2016-02-17 00:47:04 -0800 | [diff] [blame] | 247 | --- |
| 248 | |
| 249 | QEMU x86 target instructions for bare mode: |
Bin Meng | 1ae5b78 | 2015-05-07 21:34:12 +0800 | [diff] [blame] | 250 | |
| 251 | To build u-boot.rom for QEMU x86 targets, just simply run |
| 252 | |
| 253 | $ make qemu-x86_defconfig |
| 254 | $ make all |
| 255 | |
Bin Meng | 683b09d | 2015-06-03 09:20:04 +0800 | [diff] [blame] | 256 | Note this default configuration will build a U-Boot for the QEMU x86 i440FX |
| 257 | board. To build a U-Boot against QEMU x86 Q35 board, you can change the build |
| 258 | configuration during the 'make menuconfig' process like below: |
| 259 | |
| 260 | Device Tree Control ---> |
| 261 | ... |
| 262 | (qemu-x86_q35) Default Device Tree for DT control |
| 263 | |
Bin Meng | 617b867 | 2015-01-06 22:14:24 +0800 | [diff] [blame] | 264 | Test with coreboot |
| 265 | ------------------ |
| 266 | For testing U-Boot as the coreboot payload, there are things that need be paid |
| 267 | attention to. coreboot supports loading an ELF executable and a 32-bit plain |
| 268 | binary, as well as other supported payloads. With the default configuration, |
| 269 | U-Boot is set up to use a separate Device Tree Blob (dtb). As of today, the |
| 270 | generated u-boot-dtb.bin needs to be packaged by the cbfstool utility (a tool |
| 271 | provided by coreboot) manually as coreboot's 'make menuconfig' does not provide |
| 272 | this capability yet. The command is as follows: |
| 273 | |
| 274 | # in the coreboot root directory |
| 275 | $ ./build/util/cbfstool/cbfstool build/coreboot.rom add-flat-binary \ |
Bin Meng | 330728d | 2015-08-13 00:29:07 -0700 | [diff] [blame] | 276 | -f u-boot-dtb.bin -n fallback/payload -c lzma -l 0x1110000 -e 0x1110000 |
Bin Meng | 617b867 | 2015-01-06 22:14:24 +0800 | [diff] [blame] | 277 | |
Bin Meng | 330728d | 2015-08-13 00:29:07 -0700 | [diff] [blame] | 278 | Make sure 0x1110000 matches CONFIG_SYS_TEXT_BASE, which is the symbol address |
| 279 | of _x86boot_start (in arch/x86/cpu/start.S). |
Bin Meng | 617b867 | 2015-01-06 22:14:24 +0800 | [diff] [blame] | 280 | |
| 281 | If you want to use ELF as the coreboot payload, change U-Boot configuration to |
Simon Glass | eea0f11 | 2015-01-27 22:13:32 -0700 | [diff] [blame] | 282 | use CONFIG_OF_EMBED instead of CONFIG_OF_SEPARATE. |
Bin Meng | 617b867 | 2015-01-06 22:14:24 +0800 | [diff] [blame] | 283 | |
Simon Glass | 3a1a18f | 2015-01-27 22:13:47 -0700 | [diff] [blame] | 284 | To enable video you must enable these options in coreboot: |
| 285 | |
| 286 | - Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5)) |
| 287 | - Keep VESA framebuffer |
| 288 | |
| 289 | At present it seems that for Minnowboard Max, coreboot does not pass through |
| 290 | the video information correctly (it always says the resolution is 0x0). This |
| 291 | works correctly for link though. |
| 292 | |
Stoppa, Igor | 28a8536 | 2015-08-13 16:43:35 +0300 | [diff] [blame] | 293 | Test with QEMU for bare mode |
| 294 | ---------------------------- |
Bin Meng | 1ae5b78 | 2015-05-07 21:34:12 +0800 | [diff] [blame] | 295 | QEMU is a fancy emulator that can enable us to test U-Boot without access to |
Bin Meng | 9c4f541 | 2015-05-11 07:36:30 +0800 | [diff] [blame] | 296 | a real x86 board. Please make sure your QEMU version is 2.3.0 or above test |
| 297 | U-Boot. To launch QEMU with u-boot.rom, call QEMU as follows: |
Bin Meng | 1ae5b78 | 2015-05-07 21:34:12 +0800 | [diff] [blame] | 298 | |
| 299 | $ qemu-system-i386 -nographic -bios path/to/u-boot.rom |
| 300 | |
| 301 | This will instantiate an emulated x86 board with i440FX and PIIX chipset. QEMU |
| 302 | also supports emulating an x86 board with Q35 and ICH9 based chipset, which is |
| 303 | also supported by U-Boot. To instantiate such a machine, call QEMU with: |
| 304 | |
| 305 | $ qemu-system-i386 -nographic -bios path/to/u-boot.rom -M q35 |
| 306 | |
| 307 | Note by default QEMU instantiated boards only have 128 MiB system memory. But |
| 308 | it is enough to have U-Boot boot and function correctly. You can increase the |
| 309 | system memory by pass '-m' parameter to QEMU if you want more memory: |
| 310 | |
| 311 | $ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024 |
| 312 | |
| 313 | This creates a board with 1 GiB system memory. Currently U-Boot for QEMU only |
| 314 | supports 3 GiB maximum system memory and reserves the last 1 GiB address space |
| 315 | for PCI device memory-mapped I/O and other stuff, so the maximum value of '-m' |
| 316 | would be 3072. |
Simon Glass | 3a1a18f | 2015-01-27 22:13:47 -0700 | [diff] [blame] | 317 | |
Bin Meng | 9c4f541 | 2015-05-11 07:36:30 +0800 | [diff] [blame] | 318 | QEMU emulates a graphic card which U-Boot supports. Removing '-nographic' will |
| 319 | show QEMU's VGA console window. Note this will disable QEMU's serial output. |
| 320 | If you want to check both consoles, use '-serial stdio'. |
| 321 | |
Bin Meng | a2eb65f | 2015-07-27 19:16:08 +0800 | [diff] [blame] | 322 | Multicore is also supported by QEMU via '-smp n' where n is the number of cores |
Miao Yan | 5c2ed61 | 2016-01-07 01:32:06 -0800 | [diff] [blame] | 323 | to instantiate. Note, the maximum supported CPU number in QEMU is 255. |
| 324 | |
| 325 | The fw_cfg interface in QEMU also provides information about kernel data, initrd, |
| 326 | command-line arguments and more. U-Boot supports directly accessing these informtion |
| 327 | from fw_cfg interface, this saves the time of loading them from hard disk or |
| 328 | network again, through emulated devices. To use it , simply providing them in |
| 329 | QEMU command line: |
| 330 | |
| 331 | $ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024 -kernel /path/to/bzImage |
| 332 | -append 'root=/dev/ram console=ttyS0' -initrd /path/to/initrd -smp 8 |
| 333 | |
| 334 | Note: -initrd and -smp are both optional |
| 335 | |
| 336 | Then start QEMU, in U-Boot command line use the following U-Boot command to setup kernel: |
| 337 | |
| 338 | => qfw |
| 339 | qfw - QEMU firmware interface |
| 340 | |
| 341 | Usage: |
| 342 | qfw <command> |
| 343 | - list : print firmware(s) currently loaded |
| 344 | - cpus : print online cpu number |
| 345 | - load <kernel addr> <initrd addr> : load kernel and initrd (if any) and setup for zboot |
| 346 | |
| 347 | => qfw load |
| 348 | loading kernel to address 01000000 size 5d9d30 initrd 04000000 size 1b1ab50 |
| 349 | |
| 350 | Here the kernel (bzImage) is loaded to 01000000 and initrd is to 04000000. Then, 'zboot' |
| 351 | can be used to boot the kernel: |
| 352 | |
| 353 | => zboot 02000000 - 04000000 1b1ab50 |
Bin Meng | a2eb65f | 2015-07-27 19:16:08 +0800 | [diff] [blame] | 354 | |
Bin Meng | 5dad97e | 2014-12-17 15:50:48 +0800 | [diff] [blame] | 355 | CPU Microcode |
| 356 | ------------- |
Bin Meng | 7aaff9b | 2015-07-06 16:31:35 +0800 | [diff] [blame] | 357 | Modern CPUs usually require a special bit stream called microcode [8] to be |
Bin Meng | 5dad97e | 2014-12-17 15:50:48 +0800 | [diff] [blame] | 358 | loaded on the processor after power up in order to function properly. U-Boot |
| 359 | has already integrated these as hex dumps in the source tree. |
| 360 | |
Bin Meng | 1281a1f | 2015-06-23 12:18:53 +0800 | [diff] [blame] | 361 | SMP Support |
| 362 | ----------- |
| 363 | On a multicore system, U-Boot is executed on the bootstrap processor (BSP). |
| 364 | Additional application processors (AP) can be brought up by U-Boot. In order to |
| 365 | have an SMP kernel to discover all of the available processors, U-Boot needs to |
| 366 | prepare configuration tables which contain the multi-CPUs information before |
| 367 | loading the OS kernel. Currently U-Boot supports generating two types of tables |
Bin Meng | 7aaff9b | 2015-07-06 16:31:35 +0800 | [diff] [blame] | 368 | for SMP, called Simple Firmware Interface (SFI) [9] and Multi-Processor (MP) |
| 369 | [10] tables. The writing of these two tables are controlled by two Kconfig |
| 370 | options GENERATE_SFI_TABLE and GENERATE_MP_TABLE. |
Bin Meng | 1281a1f | 2015-06-23 12:18:53 +0800 | [diff] [blame] | 371 | |
Bin Meng | 5dad97e | 2014-12-17 15:50:48 +0800 | [diff] [blame] | 372 | Driver Model |
| 373 | ------------ |
| 374 | x86 has been converted to use driver model for serial and GPIO. |
| 375 | |
| 376 | Device Tree |
| 377 | ----------- |
| 378 | x86 uses device tree to configure the board thus requires CONFIG_OF_CONTROL to |
Bin Meng | 617b867 | 2015-01-06 22:14:24 +0800 | [diff] [blame] | 379 | be turned on. Not every device on the board is configured via device tree, but |
Bin Meng | 5dad97e | 2014-12-17 15:50:48 +0800 | [diff] [blame] | 380 | more and more devices will be added as time goes by. Check out the directory |
| 381 | arch/x86/dts/ for these device tree source files. |
| 382 | |
Simon Glass | cb3b2e6 | 2015-01-01 16:18:15 -0700 | [diff] [blame] | 383 | Useful Commands |
| 384 | --------------- |
Simon Glass | cb3b2e6 | 2015-01-01 16:18:15 -0700 | [diff] [blame] | 385 | In keeping with the U-Boot philosophy of providing functions to check and |
| 386 | adjust internal settings, there are several x86-specific commands that may be |
| 387 | useful: |
| 388 | |
Bin Meng | 62716eb | 2015-10-10 01:47:58 -0700 | [diff] [blame] | 389 | fsp - Display information about Intel Firmware Support Package (FSP). |
| 390 | This is only available on platforms which use FSP, mostly Atom. |
Simon Glass | cb3b2e6 | 2015-01-01 16:18:15 -0700 | [diff] [blame] | 391 | iod - Display I/O memory |
| 392 | iow - Write I/O memory |
| 393 | mtrr - List and set the Memory Type Range Registers (MTRR). These are used to |
| 394 | tell the CPU whether memory is cacheable and if so the cache write |
| 395 | mode to use. U-Boot sets up some reasonable values but you can |
| 396 | adjust then with this command. |
| 397 | |
Simon Glass | 7bea527 | 2015-07-27 15:47:31 -0600 | [diff] [blame] | 398 | Booting Ubuntu |
| 399 | -------------- |
| 400 | As an example of how to set up your boot flow with U-Boot, here are |
| 401 | instructions for starting Ubuntu from U-Boot. These instructions have been |
| 402 | tested on Minnowboard MAX with a SATA driver but are equally applicable on |
| 403 | other platforms and other media. There are really only four steps and its a |
| 404 | very simple script, but a more detailed explanation is provided here for |
| 405 | completeness. |
| 406 | |
| 407 | Note: It is possible to set up U-Boot to boot automatically using syslinux. |
| 408 | It could also use the grub.cfg file (/efi/ubuntu/grub.cfg) to obtain the |
| 409 | GUID. If you figure these out, please post patches to this README. |
| 410 | |
| 411 | Firstly, you will need Ubunutu installed on an available disk. It should be |
| 412 | possible to make U-Boot start a USB start-up disk but for now let's assume |
| 413 | that you used another boot loader to install Ubuntu. |
| 414 | |
| 415 | Use the U-Boot command line to find the UUID of the partition you want to |
| 416 | boot. For example our disk is SCSI device 0: |
| 417 | |
| 418 | => part list scsi 0 |
| 419 | |
| 420 | Partition Map for SCSI device 0 -- Partition Type: EFI |
| 421 | |
| 422 | Part Start LBA End LBA Name |
| 423 | Attributes |
| 424 | Type GUID |
| 425 | Partition GUID |
| 426 | 1 0x00000800 0x001007ff "" |
| 427 | attrs: 0x0000000000000000 |
| 428 | type: c12a7328-f81f-11d2-ba4b-00a0c93ec93b |
| 429 | guid: 9d02e8e4-4d59-408f-a9b0-fd497bc9291c |
| 430 | 2 0x00100800 0x037d8fff "" |
| 431 | attrs: 0x0000000000000000 |
| 432 | type: 0fc63daf-8483-4772-8e79-3d69d8477de4 |
| 433 | guid: 965c59ee-1822-4326-90d2-b02446050059 |
| 434 | 3 0x037d9000 0x03ba27ff "" |
| 435 | attrs: 0x0000000000000000 |
| 436 | type: 0657fd6d-a4ab-43c4-84e5-0933c84b4f4f |
| 437 | guid: 2c4282bd-1e82-4bcf-a5ff-51dedbf39f17 |
| 438 | => |
| 439 | |
| 440 | This shows that your SCSI disk has three partitions. The really long hex |
| 441 | strings are called Globally Unique Identifiers (GUIDs). You can look up the |
| 442 | 'type' ones here [11]. On this disk the first partition is for EFI and is in |
| 443 | VFAT format (DOS/Windows): |
| 444 | |
| 445 | => fatls scsi 0:1 |
| 446 | efi/ |
| 447 | |
| 448 | 0 file(s), 1 dir(s) |
| 449 | |
| 450 | |
| 451 | Partition 2 is 'Linux filesystem data' so that will be our root disk. It is |
| 452 | in ext2 format: |
| 453 | |
| 454 | => ext2ls scsi 0:2 |
| 455 | <DIR> 4096 . |
| 456 | <DIR> 4096 .. |
| 457 | <DIR> 16384 lost+found |
| 458 | <DIR> 4096 boot |
| 459 | <DIR> 12288 etc |
| 460 | <DIR> 4096 media |
| 461 | <DIR> 4096 bin |
| 462 | <DIR> 4096 dev |
| 463 | <DIR> 4096 home |
| 464 | <DIR> 4096 lib |
| 465 | <DIR> 4096 lib64 |
| 466 | <DIR> 4096 mnt |
| 467 | <DIR> 4096 opt |
| 468 | <DIR> 4096 proc |
| 469 | <DIR> 4096 root |
| 470 | <DIR> 4096 run |
| 471 | <DIR> 12288 sbin |
| 472 | <DIR> 4096 srv |
| 473 | <DIR> 4096 sys |
| 474 | <DIR> 4096 tmp |
| 475 | <DIR> 4096 usr |
| 476 | <DIR> 4096 var |
| 477 | <SYM> 33 initrd.img |
| 478 | <SYM> 30 vmlinuz |
| 479 | <DIR> 4096 cdrom |
| 480 | <SYM> 33 initrd.img.old |
| 481 | => |
| 482 | |
| 483 | and if you look in the /boot directory you will see the kernel: |
| 484 | |
| 485 | => ext2ls scsi 0:2 /boot |
| 486 | <DIR> 4096 . |
| 487 | <DIR> 4096 .. |
| 488 | <DIR> 4096 efi |
| 489 | <DIR> 4096 grub |
| 490 | 3381262 System.map-3.13.0-32-generic |
| 491 | 1162712 abi-3.13.0-32-generic |
| 492 | 165611 config-3.13.0-32-generic |
| 493 | 176500 memtest86+.bin |
| 494 | 178176 memtest86+.elf |
| 495 | 178680 memtest86+_multiboot.bin |
| 496 | 5798112 vmlinuz-3.13.0-32-generic |
| 497 | 165762 config-3.13.0-58-generic |
| 498 | 1165129 abi-3.13.0-58-generic |
| 499 | 5823136 vmlinuz-3.13.0-58-generic |
| 500 | 19215259 initrd.img-3.13.0-58-generic |
| 501 | 3391763 System.map-3.13.0-58-generic |
| 502 | 5825048 vmlinuz-3.13.0-58-generic.efi.signed |
| 503 | 28304443 initrd.img-3.13.0-32-generic |
| 504 | => |
| 505 | |
| 506 | The 'vmlinuz' files contain a packaged Linux kernel. The format is a kind of |
| 507 | self-extracting compressed file mixed with some 'setup' configuration data. |
| 508 | Despite its size (uncompressed it is >10MB) this only includes a basic set of |
| 509 | device drivers, enough to boot on most hardware types. |
| 510 | |
| 511 | The 'initrd' files contain a RAM disk. This is something that can be loaded |
| 512 | into RAM and will appear to Linux like a disk. Ubuntu uses this to hold lots |
| 513 | of drivers for whatever hardware you might have. It is loaded before the |
| 514 | real root disk is accessed. |
| 515 | |
| 516 | The numbers after the end of each file are the version. Here it is Linux |
| 517 | version 3.13. You can find the source code for this in the Linux tree with |
| 518 | the tag v3.13. The '.0' allows for additional Linux releases to fix problems, |
| 519 | but normally this is not needed. The '-58' is used by Ubuntu. Each time they |
| 520 | release a new kernel they increment this number. New Ubuntu versions might |
| 521 | include kernel patches to fix reported bugs. Stable kernels can exist for |
| 522 | some years so this number can get quite high. |
| 523 | |
| 524 | The '.efi.signed' kernel is signed for EFI's secure boot. U-Boot has its own |
| 525 | secure boot mechanism - see [12] [13] and cannot read .efi files at present. |
| 526 | |
| 527 | To boot Ubuntu from U-Boot the steps are as follows: |
| 528 | |
| 529 | 1. Set up the boot arguments. Use the GUID for the partition you want to |
| 530 | boot: |
| 531 | |
| 532 | => setenv bootargs root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro |
| 533 | |
| 534 | Here root= tells Linux the location of its root disk. The disk is specified |
| 535 | by its GUID, using '/dev/disk/by-partuuid/', a Linux path to a 'directory' |
| 536 | containing all the GUIDs Linux has found. When it starts up, there will be a |
| 537 | file in that directory with this name in it. It is also possible to use a |
| 538 | device name here, see later. |
| 539 | |
| 540 | 2. Load the kernel. Since it is an ext2/4 filesystem we can do: |
| 541 | |
| 542 | => ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic |
| 543 | |
| 544 | The address 30000000 is arbitrary, but there seem to be problems with using |
| 545 | small addresses (sometimes Linux cannot find the ramdisk). This is 48MB into |
| 546 | the start of RAM (which is at 0 on x86). |
| 547 | |
| 548 | 3. Load the ramdisk (to 64MB): |
| 549 | |
| 550 | => ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic |
| 551 | |
| 552 | 4. Start up the kernel. We need to know the size of the ramdisk, but can use |
| 553 | a variable for that. U-Boot sets 'filesize' to the size of the last file it |
| 554 | loaded. |
| 555 | |
| 556 | => zboot 03000000 0 04000000 ${filesize} |
| 557 | |
| 558 | Type 'help zboot' if you want to see what the arguments are. U-Boot on x86 is |
| 559 | quite verbose when it boots a kernel. You should see these messages from |
| 560 | U-Boot: |
| 561 | |
| 562 | Valid Boot Flag |
| 563 | Setup Size = 0x00004400 |
| 564 | Magic signature found |
| 565 | Using boot protocol version 2.0c |
| 566 | Linux kernel version 3.13.0-58-generic (buildd@allspice) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015 |
| 567 | Building boot_params at 0x00090000 |
| 568 | Loading bzImage at address 100000 (5805728 bytes) |
| 569 | Magic signature found |
| 570 | Initial RAM disk at linear address 0x04000000, size 19215259 bytes |
| 571 | Kernel command line: "console=ttyS0,115200 root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro" |
| 572 | |
| 573 | Starting kernel ... |
| 574 | |
| 575 | U-Boot prints out some bootstage timing. This is more useful if you put the |
| 576 | above commands into a script since then it will be faster. |
| 577 | |
| 578 | Timer summary in microseconds: |
| 579 | Mark Elapsed Stage |
| 580 | 0 0 reset |
| 581 | 241,535 241,535 board_init_r |
| 582 | 2,421,611 2,180,076 id=64 |
| 583 | 2,421,790 179 id=65 |
| 584 | 2,428,215 6,425 main_loop |
| 585 | 48,860,584 46,432,369 start_kernel |
| 586 | |
| 587 | Accumulated time: |
| 588 | 240,329 ahci |
| 589 | 1,422,704 vesa display |
| 590 | |
| 591 | Now the kernel actually starts: |
| 592 | |
| 593 | [ 0.000000] Initializing cgroup subsys cpuset |
| 594 | [ 0.000000] Initializing cgroup subsys cpu |
| 595 | [ 0.000000] Initializing cgroup subsys cpuacct |
| 596 | [ 0.000000] Linux version 3.13.0-58-generic (buildd@allspice) (gcc version 4.8.2 (Ubuntu 4.8.2-19ubuntu1) ) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015 (Ubuntu 3.13.0-58.97-generic 3.13.11-ckt22) |
| 597 | [ 0.000000] Command line: console=ttyS0,115200 root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro |
| 598 | |
| 599 | It continues for a long time. Along the way you will see it pick up your |
| 600 | ramdisk: |
| 601 | |
| 602 | [ 0.000000] RAMDISK: [mem 0x04000000-0x05253fff] |
| 603 | ... |
| 604 | [ 0.788540] Trying to unpack rootfs image as initramfs... |
| 605 | [ 1.540111] Freeing initrd memory: 18768K (ffff880004000000 - ffff880005254000) |
| 606 | ... |
| 607 | |
| 608 | Later it actually starts using it: |
| 609 | |
| 610 | Begin: Running /scripts/local-premount ... done. |
| 611 | |
| 612 | You should also see your boot disk turn up: |
| 613 | |
| 614 | [ 4.357243] scsi 1:0:0:0: Direct-Access ATA ADATA SP310 5.2 PQ: 0 ANSI: 5 |
| 615 | [ 4.366860] sd 1:0:0:0: [sda] 62533296 512-byte logical blocks: (32.0 GB/29.8 GiB) |
| 616 | [ 4.375677] sd 1:0:0:0: Attached scsi generic sg0 type 0 |
| 617 | [ 4.381859] sd 1:0:0:0: [sda] Write Protect is off |
| 618 | [ 4.387452] sd 1:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA |
| 619 | [ 4.399535] sda: sda1 sda2 sda3 |
| 620 | |
| 621 | Linux has found the three partitions (sda1-3). Mercifully it doesn't print out |
| 622 | the GUIDs. In step 1 above we could have used: |
| 623 | |
| 624 | setenv bootargs root=/dev/sda2 ro |
| 625 | |
| 626 | instead of the GUID. However if you add another drive to your board the |
| 627 | numbering may change whereas the GUIDs will not. So if your boot partition |
| 628 | becomes sdb2, it will still boot. For embedded systems where you just want to |
| 629 | boot the first disk, you have that option. |
| 630 | |
| 631 | The last thing you will see on the console is mention of plymouth (which |
| 632 | displays the Ubuntu start-up screen) and a lot of 'Starting' messages: |
| 633 | |
| 634 | * Starting Mount filesystems on boot [ OK ] |
| 635 | |
| 636 | After a pause you should see a login screen on your display and you are done. |
| 637 | |
| 638 | If you want to put this in a script you can use something like this: |
| 639 | |
| 640 | setenv bootargs root=UUID=b2aaf743-0418-4d90-94cc-3e6108d7d968 ro |
| 641 | setenv boot zboot 03000000 0 04000000 \${filesize} |
| 642 | setenv bootcmd "ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; run boot" |
| 643 | saveenv |
| 644 | |
| 645 | The \ is to tell the shell not to evaluate ${filesize} as part of the setenv |
| 646 | command. |
| 647 | |
| 648 | You will also need to add this to your board configuration file, e.g. |
| 649 | include/configs/minnowmax.h: |
| 650 | |
| 651 | #define CONFIG_BOOTDELAY 2 |
| 652 | |
| 653 | Now when you reset your board it wait a few seconds (in case you want to |
| 654 | interrupt) and then should boot straight into Ubuntu. |
| 655 | |
| 656 | You can also bake this behaviour into your build by hard-coding the |
| 657 | environment variables if you add this to minnowmax.h: |
| 658 | |
| 659 | #undef CONFIG_BOOTARGS |
| 660 | #undef CONFIG_BOOTCOMMAND |
| 661 | |
| 662 | #define CONFIG_BOOTARGS \ |
| 663 | "root=/dev/sda2 ro" |
| 664 | #define CONFIG_BOOTCOMMAND \ |
| 665 | "ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; " \ |
| 666 | "ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; " \ |
| 667 | "run boot" |
| 668 | |
| 669 | #undef CONFIG_EXTRA_ENV_SETTINGS |
| 670 | #define CONFIG_EXTRA_ENV_SETTINGS "boot=zboot 03000000 0 04000000 ${filesize}" |
| 671 | |
| 672 | |
Simon Glass | 00bdd95 | 2015-01-27 22:13:46 -0700 | [diff] [blame] | 673 | Development Flow |
| 674 | ---------------- |
Simon Glass | 00bdd95 | 2015-01-27 22:13:46 -0700 | [diff] [blame] | 675 | These notes are for those who want to port U-Boot to a new x86 platform. |
| 676 | |
| 677 | Since x86 CPUs boot from SPI flash, a SPI flash emulator is a good investment. |
| 678 | The Dediprog em100 can be used on Linux. The em100 tool is available here: |
| 679 | |
| 680 | http://review.coreboot.org/p/em100.git |
| 681 | |
| 682 | On Minnowboard Max the following command line can be used: |
| 683 | |
| 684 | sudo em100 -s -p LOW -d u-boot.rom -c W25Q64DW -r |
| 685 | |
| 686 | A suitable clip for connecting over the SPI flash chip is here: |
| 687 | |
| 688 | http://www.dediprog.com/pd/programmer-accessories/EM-TC-8 |
| 689 | |
| 690 | This allows you to override the SPI flash contents for development purposes. |
| 691 | Typically you can write to the em100 in around 1200ms, considerably faster |
| 692 | than programming the real flash device each time. The only important |
| 693 | limitation of the em100 is that it only supports SPI bus speeds up to 20MHz. |
| 694 | This means that images must be set to boot with that speed. This is an |
| 695 | Intel-specific feature - e.g. tools/ifttool has an option to set the SPI |
| 696 | speed in the SPI descriptor region. |
| 697 | |
| 698 | If your chip/board uses an Intel Firmware Support Package (FSP) it is fairly |
| 699 | easy to fit it in. You can follow the Minnowboard Max implementation, for |
| 700 | example. Hopefully you will just need to create new files similar to those |
| 701 | in arch/x86/cpu/baytrail which provide Bay Trail support. |
| 702 | |
| 703 | If you are not using an FSP you have more freedom and more responsibility. |
| 704 | The ivybridge support works this way, although it still uses a ROM for |
| 705 | graphics and still has binary blobs containing Intel code. You should aim to |
| 706 | support all important peripherals on your platform including video and storage. |
| 707 | Use the device tree for configuration where possible. |
| 708 | |
| 709 | For the microcode you can create a suitable device tree file using the |
| 710 | microcode tool: |
| 711 | |
Simon Glass | 03e3c31 | 2015-08-15 14:37:48 -0600 | [diff] [blame] | 712 | ./tools/microcode-tool -d microcode.dat -m <model> create |
Simon Glass | 00bdd95 | 2015-01-27 22:13:46 -0700 | [diff] [blame] | 713 | |
| 714 | or if you only have header files and not the full Intel microcode.dat database: |
| 715 | |
| 716 | ./tools/microcode-tool -H BAY_TRAIL_FSP_KIT/Microcode/M0130673322.h \ |
| 717 | -H BAY_TRAIL_FSP_KIT/Microcode/M0130679901.h \ |
Simon Glass | 03e3c31 | 2015-08-15 14:37:48 -0600 | [diff] [blame] | 718 | -m all create |
Simon Glass | 00bdd95 | 2015-01-27 22:13:46 -0700 | [diff] [blame] | 719 | |
| 720 | These are written to arch/x86/dts/microcode/ by default. |
| 721 | |
| 722 | Note that it is possible to just add the micrcode for your CPU if you know its |
| 723 | model. U-Boot prints this information when it starts |
| 724 | |
| 725 | CPU: x86_64, vendor Intel, device 30673h |
| 726 | |
| 727 | so here we can use the M0130673322 file. |
| 728 | |
| 729 | If you platform can display POST codes on two little 7-segment displays on |
| 730 | the board, then you can use post_code() calls from C or assembler to monitor |
| 731 | boot progress. This can be good for debugging. |
| 732 | |
| 733 | If not, you can try to get serial working as early as possible. The early |
Stefan Roese | d521197 | 2016-01-19 14:24:12 +0100 | [diff] [blame] | 734 | debug serial port may be useful here. See setup_internal_uart() for an example. |
Simon Glass | 00bdd95 | 2015-01-27 22:13:46 -0700 | [diff] [blame] | 735 | |
Bin Meng | 12c7510 | 2015-08-02 20:33:35 -0700 | [diff] [blame] | 736 | During the U-Boot porting, one of the important steps is to write correct PIRQ |
| 737 | routing information in the board device tree. Without it, device drivers in the |
| 738 | Linux kernel won't function correctly due to interrupt is not working. Please |
| 739 | refer to U-Boot doc [14] for the device tree bindings of Intel interrupt router. |
| 740 | Here we have more details on the intel,pirq-routing property below. |
| 741 | |
| 742 | intel,pirq-routing = < |
| 743 | PCI_BDF(0, 2, 0) INTA PIRQA |
| 744 | ... |
| 745 | >; |
| 746 | |
| 747 | As you see each entry has 3 cells. For the first one, we need describe all pci |
| 748 | devices mounted on the board. For SoC devices, normally there is a chapter on |
| 749 | the chipset datasheet which lists all the available PCI devices. For example on |
| 750 | Bay Trail, this is chapter 4.3 (PCI configuration space). For the second one, we |
| 751 | can get the interrupt pin either from datasheet or hardware via U-Boot shell. |
| 752 | The reliable source is the hardware as sometimes chipset datasheet is not 100% |
| 753 | up-to-date. Type 'pci header' plus the device's pci bus/device/function number |
| 754 | from U-Boot shell below. |
| 755 | |
| 756 | => pci header 0.1e.1 |
| 757 | vendor ID = 0x8086 |
| 758 | device ID = 0x0f08 |
| 759 | ... |
| 760 | interrupt line = 0x09 |
| 761 | interrupt pin = 0x04 |
| 762 | ... |
| 763 | |
| 764 | It shows this PCI device is using INTD pin as it reports 4 in the interrupt pin |
| 765 | register. Repeat this until you get interrupt pins for all the devices. The last |
| 766 | cell is the PIRQ line which a particular interrupt pin is mapped to. On Intel |
| 767 | chipset, the power-up default mapping is INTA/B/C/D maps to PIRQA/B/C/D. This |
| 768 | can be changed by registers in LPC bridge. So far Intel FSP does not touch those |
| 769 | registers so we can write down the PIRQ according to the default mapping rule. |
| 770 | |
| 771 | Once we get the PIRQ routing information in the device tree, the interrupt |
| 772 | allocation and assignment will be done by U-Boot automatically. Now you can |
| 773 | enable CONFIG_GENERATE_PIRQ_TABLE for testing Linux kernel using i8259 PIC and |
| 774 | CONFIG_GENERATE_MP_TABLE for testing Linux kernel using local APIC and I/O APIC. |
| 775 | |
Simon Glass | 590870e | 2015-08-13 10:36:17 -0600 | [diff] [blame] | 776 | This script might be useful. If you feed it the output of 'pci long' from |
| 777 | U-Boot then it will generate a device tree fragment with the interrupt |
| 778 | configuration for each device (note it needs gawk 4.0.0): |
| 779 | |
| 780 | $ cat console_output |awk '/PCI/ {device=$4} /interrupt line/ {line=$4} \ |
| 781 | /interrupt pin/ {pin = $4; if (pin != "0x00" && pin != "0xff") \ |
| 782 | {patsplit(device, bdf, "[0-9a-f]+"); \ |
| 783 | printf "PCI_BDF(%d, %d, %d) INT%c PIRQ%c\n", strtonum("0x" bdf[1]), \ |
| 784 | strtonum("0x" bdf[2]), bdf[3], strtonum(pin) + 64, 64 + strtonum(pin)}}' |
| 785 | |
| 786 | Example output: |
| 787 | PCI_BDF(0, 2, 0) INTA PIRQA |
| 788 | PCI_BDF(0, 3, 0) INTA PIRQA |
| 789 | ... |
| 790 | |
Bin Meng | 448719c | 2015-09-09 23:20:29 -0700 | [diff] [blame] | 791 | Porting Hints |
| 792 | ------------- |
| 793 | |
| 794 | Quark-specific considerations: |
| 795 | |
| 796 | To port U-Boot to other boards based on the Intel Quark SoC, a few things need |
| 797 | to be taken care of. The first important part is the Memory Reference Code (MRC) |
| 798 | parameters. Quark MRC supports memory-down configuration only. All these MRC |
| 799 | parameters are supplied via the board device tree. To get started, first copy |
| 800 | the MRC section of arch/x86/dts/galileo.dts to your board's device tree, then |
| 801 | change these values by consulting board manuals or your hardware vendor. |
| 802 | Available MRC parameter values are listed in include/dt-bindings/mrc/quark.h. |
| 803 | The other tricky part is with PCIe. Quark SoC integrates two PCIe root ports, |
| 804 | but by default they are held in reset after power on. In U-Boot, PCIe |
| 805 | initialization is properly handled as per Quark's firmware writer guide. |
| 806 | In your board support codes, you need provide two routines to aid PCIe |
| 807 | initialization, which are board_assert_perst() and board_deassert_perst(). |
| 808 | The two routines need implement a board-specific mechanism to assert/deassert |
| 809 | PCIe PERST# pin. Care must be taken that in those routines that any APIs that |
| 810 | may trigger PCI enumeration process are strictly forbidden, as any access to |
| 811 | PCIe root port's configuration registers will cause system hang while it is |
| 812 | held in reset. For more details, check how they are implemented by the Intel |
| 813 | Galileo board support codes in board/intel/galileo/galileo.c. |
| 814 | |
Bin Meng | 5dad97e | 2014-12-17 15:50:48 +0800 | [diff] [blame] | 815 | TODO List |
| 816 | --------- |
Bin Meng | 5dad97e | 2014-12-17 15:50:48 +0800 | [diff] [blame] | 817 | - Audio |
| 818 | - Chrome OS verified boot |
| 819 | - SMI and ACPI support, to provide platform info and facilities to Linux |
| 820 | |
| 821 | References |
| 822 | ---------- |
| 823 | [1] http://www.coreboot.org |
Bin Meng | 1ae5b78 | 2015-05-07 21:34:12 +0800 | [diff] [blame] | 824 | [2] http://www.qemu.org |
| 825 | [3] http://www.coreboot.org/~stepan/pci8086,0166.rom |
| 826 | [4] http://www.intel.com/content/www/us/en/embedded/design-tools/evaluation-platforms/atom-e660-eg20t-development-kit.html |
| 827 | [5] http://www.intel.com/fsp |
Bin Meng | 7aaff9b | 2015-07-06 16:31:35 +0800 | [diff] [blame] | 828 | [6] http://www.intel.com/content/www/us/en/secure/intelligent-systems/privileged/e6xx-35-b1-cmc22211.html |
| 829 | [7] http://www.ami.com/products/bios-uefi-tools-and-utilities/bios-uefi-utilities/ |
| 830 | [8] http://en.wikipedia.org/wiki/Microcode |
| 831 | [9] http://simplefirmware.org |
| 832 | [10] http://www.intel.com/design/archives/processors/pro/docs/242016.htm |
Simon Glass | 7bea527 | 2015-07-27 15:47:31 -0600 | [diff] [blame] | 833 | [11] https://en.wikipedia.org/wiki/GUID_Partition_Table |
| 834 | [12] http://events.linuxfoundation.org/sites/events/files/slides/chromeos_and_diy_vboot_0.pdf |
| 835 | [13] http://events.linuxfoundation.org/sites/events/files/slides/elce-2014.pdf |
Bin Meng | 12c7510 | 2015-08-02 20:33:35 -0700 | [diff] [blame] | 836 | [14] doc/device-tree-bindings/misc/intel,irq-router.txt |