blob: 12c5a6cd15436e7ed3232996ba074767535b3202 [file] [log] [blame]
Marek Vasut10da95a2010-07-26 06:30:25 +02001/*
2 * Balloon3 configuration file
3 *
4 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Marek Vasut10da95a2010-07-26 06:30:25 +02007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12/*
13 * High Level Board Configuration Options
14 */
Marek Vasutabc20ab2011-11-26 07:20:07 +010015#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */
Marcel Ziswiler44d6db62015-03-01 00:53:11 +010016#define CONFIG_BALLOON3 1 /* Balloon3 board */
Marek Vasut10da95a2010-07-26 06:30:25 +020017
18/*
19 * Environment settings
20 */
21#define CONFIG_ENV_OVERWRITE
22#define CONFIG_SYS_MALLOC_LEN (128*1024)
Marek Vasut20ae5192010-10-03 01:05:55 +020023#define CONFIG_ARCH_CPU_INIT
Marek Vasut10da95a2010-07-26 06:30:25 +020024#define CONFIG_BOOTCOMMAND \
Marek Vasut20ae5192010-10-03 01:05:55 +020025 "fpga load 0x0 0x50000 0x62638; " \
Marek Vasut10da95a2010-07-26 06:30:25 +020026 "if usb reset && fatload usb 0 0xa4000000 uImage; then " \
27 "bootm 0xa4000000; " \
28 "fi; " \
Marek Vasut20ae5192010-10-03 01:05:55 +020029 "bootm 0xd0000;"
Marek Vasut10da95a2010-07-26 06:30:25 +020030#define CONFIG_BOOTARGS "console=tty0 console=ttyS2,115200"
31#define CONFIG_TIMESTAMP
32#define CONFIG_BOOTDELAY 2 /* Autoboot delay */
33#define CONFIG_CMDLINE_TAG
34#define CONFIG_SETUP_MEMORY_TAGS
Marek Vasut20ae5192010-10-03 01:05:55 +020035#define CONFIG_SYS_TEXT_BASE 0x0
Marek Vasut10da95a2010-07-26 06:30:25 +020036#define CONFIG_LZMA /* LZMA compression support */
37
38/*
39 * Serial Console Configuration
40 */
41#define CONFIG_PXA_SERIAL
42#define CONFIG_STUART 1
Marek Vasutce6971c2012-09-12 12:36:25 +020043#define CONFIG_CONS_INDEX 2
Marek Vasut10da95a2010-07-26 06:30:25 +020044#define CONFIG_BAUDRATE 115200
Marek Vasut10da95a2010-07-26 06:30:25 +020045
46/*
47 * Bootloader Components Configuration
48 */
Marek Vasut10da95a2010-07-26 06:30:25 +020049#undef CONFIG_CMD_ENV
Marek Vasut10da95a2010-07-26 06:30:25 +020050#define CONFIG_CMD_USB
Siva Durga Prasad Paladugu64e809a2014-03-14 16:35:38 +053051#define CONFIG_CMD_FPGA_LOADMK
Marek Vasut10da95a2010-07-26 06:30:25 +020052#undef CONFIG_LCD
53
54/*
55 * KGDB
56 */
57#ifdef CONFIG_CMD_KGDB
58#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */
Marek Vasut10da95a2010-07-26 06:30:25 +020059#endif
60
61/*
62 * HUSH Shell Configuration
63 */
64#define CONFIG_SYS_HUSH_PARSER 1
Marek Vasut10da95a2010-07-26 06:30:25 +020065
66#define CONFIG_SYS_LONGHELP
67#ifdef CONFIG_SYS_HUSH_PARSER
68#define CONFIG_SYS_PROMPT "$ "
69#else
Marek Vasut10da95a2010-07-26 06:30:25 +020070#endif
71#define CONFIG_SYS_CBSIZE 256
72#define CONFIG_SYS_PBSIZE \
73 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
74#define CONFIG_SYS_MAXARGS 16
75#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
76#define CONFIG_SYS_DEVICE_NULLDEV 1
77
78/*
79 * Clock Configuration
80 */
Marek Vasut10da95a2010-07-26 06:30:25 +020081#define CONFIG_SYS_CPUSPEED 0x290 /* 520MHz */
82
83/*
Marek Vasut10da95a2010-07-26 06:30:25 +020084 * DRAM Map
85 */
Marcel Ziswiler44d6db62015-03-01 00:53:11 +010086#define CONFIG_NR_DRAM_BANKS 3 /* 3 banks of DRAM */
Marek Vasut10da95a2010-07-26 06:30:25 +020087#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
88#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
89#define PHYS_SDRAM_2 0xb0000000 /* SDRAM Bank #2 */
90#define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
Marcel Ziswiler44d6db62015-03-01 00:53:11 +010091#define PHYS_SDRAM_3 0x80000000 /* SDRAM Bank #3 */
Marek Vasut10da95a2010-07-26 06:30:25 +020092#define PHYS_SDRAM_3_SIZE 0x08000000 /* 128 MB */
93
94#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
95#define CONFIG_SYS_DRAM_SIZE 0x18000000 /* 384 MB DRAM */
96
97#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
98#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
99
100#define CONFIG_SYS_LOAD_ADDR 0xa1000000
101
Marek Vasut6ef6eb92010-09-23 09:46:57 +0200102#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
Marek Vasut20ae5192010-10-03 01:05:55 +0200103#define CONFIG_SYS_INIT_SP_ADDR \
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200104 (PHYS_SDRAM_1 + GENERATED_GBL_DATA_SIZE + 2048)
Marek Vasut6ef6eb92010-09-23 09:46:57 +0200105
Marek Vasut10da95a2010-07-26 06:30:25 +0200106/*
107 * NOR FLASH
108 */
109#ifdef CONFIG_CMD_FLASH
110#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
111#define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */
112#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
113
114#define CONFIG_SYS_FLASH_CFI
115#define CONFIG_FLASH_CFI_DRIVER 1
116#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
117
118#define CONFIG_SYS_MAX_FLASH_BANKS 1
119#define CONFIG_SYS_MAX_FLASH_SECT 256
120
121#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
122
Marek Vasutf90aea22013-11-04 20:50:21 +0100123#define CONFIG_SYS_FLASH_ERASE_TOUT 240000
124#define CONFIG_SYS_FLASH_WRITE_TOUT 240000
125#define CONFIG_SYS_FLASH_LOCK_TOUT 240000
126#define CONFIG_SYS_FLASH_UNLOCK_TOUT 240000
Marek Vasut10da95a2010-07-26 06:30:25 +0200127#define CONFIG_SYS_FLASH_PROTECTION
128#define CONFIG_ENV_IS_IN_FLASH
129#else
130#define CONFIG_SYS_NO_FLASH
Marcel Ziswiler50dea462015-03-01 00:53:12 +0100131#define CONFIG_ENV_IS_NOWHERE
Marek Vasut10da95a2010-07-26 06:30:25 +0200132#endif
133
134#define CONFIG_SYS_MONITOR_BASE 0x000000
135#define CONFIG_SYS_MONITOR_LEN 0x40000
136
137#define CONFIG_ENV_SIZE 0x2000
138#define CONFIG_ENV_ADDR 0x40000
139#define CONFIG_ENV_SECT_SIZE 0x10000
140
141/*
142 * GPIO settings
143 */
144#define CONFIG_SYS_GPSR0_VAL 0x307dc7fd
145#define CONFIG_SYS_GPSR1_VAL 0x03cffa4e
146#define CONFIG_SYS_GPSR2_VAL 0x7131c000
147#define CONFIG_SYS_GPSR3_VAL 0x01e1f3ff
148
149#define CONFIG_SYS_GPCR0_VAL 0x0
150#define CONFIG_SYS_GPCR1_VAL 0x0
151#define CONFIG_SYS_GPCR2_VAL 0x0
152#define CONFIG_SYS_GPCR3_VAL 0x0
153
154#define CONFIG_SYS_GPDR0_VAL 0xc0f98e02
155#define CONFIG_SYS_GPDR1_VAL 0xfcffa8b7
156#define CONFIG_SYS_GPDR2_VAL 0x22e3ffff
157#define CONFIG_SYS_GPDR3_VAL 0x000201fe
158
159#define CONFIG_SYS_GAFR0_L_VAL 0x96c00000
160#define CONFIG_SYS_GAFR0_U_VAL 0xa5e5459b
161#define CONFIG_SYS_GAFR1_L_VAL 0x699b759a
162#define CONFIG_SYS_GAFR1_U_VAL 0xaaa5a5aa
163#define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa
164#define CONFIG_SYS_GAFR2_U_VAL 0x01f9a6aa
165#define CONFIG_SYS_GAFR3_L_VAL 0x54510003
166#define CONFIG_SYS_GAFR3_U_VAL 0x00001599
167
168#define CONFIG_SYS_PSSR_VAL 0x30
169
170/*
171 * Clock settings
172 */
173#define CONFIG_SYS_CKEN 0xffffffff
174#define CONFIG_SYS_CCCR 0x00000290
175
176/*
177 * Memory settings
178 */
179#define CONFIG_SYS_MSC0_VAL 0x7ff07ff8
180#define CONFIG_SYS_MSC1_VAL 0x7ff07ff0
181#define CONFIG_SYS_MSC2_VAL 0x74a42491
182#define CONFIG_SYS_MDCNFG_VAL 0x89d309d3
183#define CONFIG_SYS_MDREFR_VAL 0x001d8018
184#define CONFIG_SYS_MDMRS_VAL 0x00220022
185#define CONFIG_SYS_FLYCNFG_VAL 0x00000000
186#define CONFIG_SYS_SXCNFG_VAL 0x00000000
Marek Vasut10da95a2010-07-26 06:30:25 +0200187
188/*
189 * PCMCIA and CF Interfaces
190 */
191#define CONFIG_SYS_MECR_VAL 0x00000000
192#define CONFIG_SYS_MCMEM0_VAL 0x00014307
193#define CONFIG_SYS_MCMEM1_VAL 0x00014307
194#define CONFIG_SYS_MCATT0_VAL 0x0001c787
195#define CONFIG_SYS_MCATT1_VAL 0x0001c787
196#define CONFIG_SYS_MCIO0_VAL 0x0001430f
197#define CONFIG_SYS_MCIO1_VAL 0x0001430f
198
199/*
200 * LCD
201 */
202#ifdef CONFIG_LCD
203#define CONFIG_BALLOON3LCD
204#define CONFIG_VIDEO_LOGO
205#define CONFIG_CMD_BMP
206#define CONFIG_SPLASH_SCREEN
207#define CONFIG_SPLASH_SCREEN_ALIGN
208#define CONFIG_VIDEO_BMP_GZIP
209#define CONFIG_VIDEO_BMP_RLE8
210#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
211#endif
212
213/*
214 * USB
215 */
216#ifdef CONFIG_CMD_USB
217#define CONFIG_USB_OHCI_NEW
218#define CONFIG_SYS_USB_OHCI_CPU_INIT
219#define CONFIG_SYS_USB_OHCI_BOARD_INIT
220#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
221#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4C000000
222#define CONFIG_SYS_USB_OHCI_SLOT_NAME "balloon3"
223#define CONFIG_USB_STORAGE
224#define CONFIG_DOS_PARTITION
225#define CONFIG_CMD_FAT
226#define CONFIG_CMD_EXT2
227#endif
228
229/*
230 * FPGA
231 */
232#ifdef CONFIG_CMD_FPGA
233#define CONFIG_FPGA
234#define CONFIG_FPGA_XILINX
235#define CONFIG_FPGA_SPARTAN3
236#define CONFIG_SYS_FPGA_PROG_FEEDBACK
237#define CONFIG_SYS_FPGA_WAIT 1000
238#define CONFIG_MAX_FPGA_DEVICES 1
239#endif
240
241#endif /* __CONFIG_H */