blob: d2445438a6ccd3c58517d969c21566a82767b165 [file] [log] [blame]
Simon Glass6854f872014-11-14 20:56:33 -07001/*
2 * Copyright (C) 2014 Google, Inc
3 *
4 * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
5 *
6 * Modifications are:
7 * Copyright (C) 2003-2004 Linux Networx
8 * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
9 * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
10 * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
11 * Copyright (C) 2005-2006 Tyan
12 * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
13 * Copyright (C) 2005-2009 coresystems GmbH
14 * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
15 *
16 * PCI Bus Services, see include/linux/pci.h for further explanation.
17 *
18 * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
19 * David Mosberger-Tang
20 *
21 * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
22
23 * SPDX-License-Identifier: GPL-2.0
24 */
25
26#include <common.h>
27#include <bios_emul.h>
28#include <errno.h>
29#include <malloc.h>
30#include <pci.h>
31#include <pci_rom.h>
32#include <vbe.h>
33#include <video_fb.h>
Bin Menga4520022015-07-06 16:31:36 +080034#include <linux/screen_info.h>
Simon Glass6854f872014-11-14 20:56:33 -070035
36#ifdef CONFIG_HAVE_ACPI_RESUME
37#include <asm/acpi.h>
38#endif
39
40__weak bool board_should_run_oprom(pci_dev_t dev)
41{
42 return true;
43}
44
45static bool should_load_oprom(pci_dev_t dev)
46{
47#ifdef CONFIG_HAVE_ACPI_RESUME
48 if (acpi_get_slp_type() == 3)
49 return false;
50#endif
51 if (IS_ENABLED(CONFIG_ALWAYS_LOAD_OPROM))
52 return 1;
53 if (board_should_run_oprom(dev))
54 return 1;
55
56 return 0;
57}
58
59__weak uint32_t board_map_oprom_vendev(uint32_t vendev)
60{
61 return vendev;
62}
63
64static int pci_rom_probe(pci_dev_t dev, uint class,
65 struct pci_rom_header **hdrp)
66{
67 struct pci_rom_header *rom_header;
68 struct pci_rom_data *rom_data;
69 u16 vendor, device;
Simon Glass40305242014-12-29 19:32:23 -070070 u16 rom_vendor, rom_device;
Bin Mengd57c2f22015-04-24 15:48:03 +080071 u32 rom_class;
Simon Glass6854f872014-11-14 20:56:33 -070072 u32 vendev;
73 u32 mapped_vendev;
74 u32 rom_address;
75
76 pci_read_config_word(dev, PCI_VENDOR_ID, &vendor);
77 pci_read_config_word(dev, PCI_DEVICE_ID, &device);
78 vendev = vendor << 16 | device;
79 mapped_vendev = board_map_oprom_vendev(vendev);
80 if (vendev != mapped_vendev)
81 debug("Device ID mapped to %#08x\n", mapped_vendev);
82
Bin Meng786a08e2015-07-06 16:31:33 +080083#ifdef CONFIG_VGA_BIOS_ADDR
84 rom_address = CONFIG_VGA_BIOS_ADDR;
Simon Glass6854f872014-11-14 20:56:33 -070085#else
Simon Glass4a2708a2015-01-14 21:37:04 -070086
Simon Glass6854f872014-11-14 20:56:33 -070087 pci_read_config_dword(dev, PCI_ROM_ADDRESS, &rom_address);
88 if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
89 debug("%s: rom_address=%x\n", __func__, rom_address);
90 return -ENOENT;
91 }
92
93 /* Enable expansion ROM address decoding. */
94 pci_write_config_dword(dev, PCI_ROM_ADDRESS,
95 rom_address | PCI_ROM_ADDRESS_ENABLE);
96#endif
97 debug("Option ROM address %x\n", rom_address);
Minghuan Lianef2d17f2015-01-22 13:21:55 +080098 rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
Simon Glass6854f872014-11-14 20:56:33 -070099
100 debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
Simon Glass40305242014-12-29 19:32:23 -0700101 le16_to_cpu(rom_header->signature),
102 rom_header->size * 512, le16_to_cpu(rom_header->data));
Simon Glass6854f872014-11-14 20:56:33 -0700103
Simon Glass40305242014-12-29 19:32:23 -0700104 if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
Simon Glass6854f872014-11-14 20:56:33 -0700105 printf("Incorrect expansion ROM header signature %04x\n",
Simon Glass40305242014-12-29 19:32:23 -0700106 le16_to_cpu(rom_header->signature));
Bin Mengf110da92015-07-08 13:06:41 +0800107#ifndef CONFIG_VGA_BIOS_ADDR
108 /* Disable expansion ROM address decoding */
109 pci_write_config_dword(dev, PCI_ROM_ADDRESS, rom_address);
110#endif
Simon Glass6854f872014-11-14 20:56:33 -0700111 return -EINVAL;
112 }
113
Simon Glass40305242014-12-29 19:32:23 -0700114 rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
115 rom_vendor = le16_to_cpu(rom_data->vendor);
116 rom_device = le16_to_cpu(rom_data->device);
Simon Glass6854f872014-11-14 20:56:33 -0700117
118 debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
Simon Glass40305242014-12-29 19:32:23 -0700119 rom_vendor, rom_device);
Simon Glass6854f872014-11-14 20:56:33 -0700120
121 /* If the device id is mapped, a mismatch is expected */
Simon Glass40305242014-12-29 19:32:23 -0700122 if ((vendor != rom_vendor || device != rom_device) &&
Simon Glass6854f872014-11-14 20:56:33 -0700123 (vendev == mapped_vendev)) {
124 printf("ID mismatch: vendor ID %04x, device ID %04x\n",
Simon Glass40305242014-12-29 19:32:23 -0700125 rom_vendor, rom_device);
Simon Glassc5caba02014-12-29 19:32:27 -0700126 /* Continue anyway */
Simon Glass6854f872014-11-14 20:56:33 -0700127 }
128
Bin Mengd57c2f22015-04-24 15:48:03 +0800129 rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo;
130 debug("PCI ROM image, Class Code %06x, Code Type %02x\n",
131 rom_class, rom_data->type);
Simon Glass6854f872014-11-14 20:56:33 -0700132
Bin Mengd57c2f22015-04-24 15:48:03 +0800133 if (class != rom_class) {
134 debug("Class Code mismatch ROM %06x, dev %06x\n",
135 rom_class, class);
Simon Glass6854f872014-11-14 20:56:33 -0700136 }
137 *hdrp = rom_header;
138
139 return 0;
140}
141
Bin Meng81d0b352015-04-24 15:48:04 +0800142int pci_rom_load(struct pci_rom_header *rom_header,
Simon Glass6854f872014-11-14 20:56:33 -0700143 struct pci_rom_header **ram_headerp)
144{
145 struct pci_rom_data *rom_data;
146 unsigned int rom_size;
147 unsigned int image_size = 0;
148 void *target;
149
150 do {
151 /* Get next image, until we see an x86 version */
152 rom_header = (struct pci_rom_header *)((void *)rom_header +
153 image_size);
154
155 rom_data = (struct pci_rom_data *)((void *)rom_header +
Simon Glass40305242014-12-29 19:32:23 -0700156 le16_to_cpu(rom_header->data));
Simon Glass6854f872014-11-14 20:56:33 -0700157
Simon Glass40305242014-12-29 19:32:23 -0700158 image_size = le16_to_cpu(rom_data->ilen) * 512;
159 } while ((rom_data->type != 0) && (rom_data->indicator == 0));
Simon Glass6854f872014-11-14 20:56:33 -0700160
161 if (rom_data->type != 0)
162 return -EACCES;
163
164 rom_size = rom_header->size * 512;
165
Simon Glassbdc88d42014-12-29 19:32:24 -0700166#ifdef PCI_VGA_RAM_IMAGE_START
Simon Glass6854f872014-11-14 20:56:33 -0700167 target = (void *)PCI_VGA_RAM_IMAGE_START;
Simon Glassbdc88d42014-12-29 19:32:24 -0700168#else
169 target = (void *)malloc(rom_size);
170 if (!target)
171 return -ENOMEM;
172#endif
Simon Glass6854f872014-11-14 20:56:33 -0700173 if (target != rom_header) {
Simon Glassfba7eac2015-01-01 16:18:01 -0700174 ulong start = get_timer(0);
175
Simon Glass6854f872014-11-14 20:56:33 -0700176 debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
177 rom_header, target, rom_size);
178 memcpy(target, rom_header, rom_size);
179 if (memcmp(target, rom_header, rom_size)) {
180 printf("VGA ROM copy failed\n");
181 return -EFAULT;
182 }
Simon Glassfba7eac2015-01-01 16:18:01 -0700183 debug("Copy took %lums\n", get_timer(start));
Simon Glass6854f872014-11-14 20:56:33 -0700184 }
185 *ram_headerp = target;
186
187 return 0;
188}
189
Bin Meng153e1dd2015-08-13 00:29:16 -0700190struct vbe_mode_info mode_info;
Simon Glass6854f872014-11-14 20:56:33 -0700191
192int vbe_get_video_info(struct graphic_device *gdev)
193{
194#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
195 struct vesa_mode_info *vesa = &mode_info.vesa;
196
197 gdev->winSizeX = vesa->x_resolution;
198 gdev->winSizeY = vesa->y_resolution;
199
200 gdev->plnSizeX = vesa->x_resolution;
201 gdev->plnSizeY = vesa->y_resolution;
202
203 gdev->gdfBytesPP = vesa->bits_per_pixel / 8;
204
205 switch (vesa->bits_per_pixel) {
Jian Luo0e98a142015-07-06 16:31:29 +0800206 case 32:
Simon Glass6854f872014-11-14 20:56:33 -0700207 case 24:
208 gdev->gdfIndex = GDF_32BIT_X888RGB;
209 break;
210 case 16:
211 gdev->gdfIndex = GDF_16BIT_565RGB;
212 break;
213 default:
214 gdev->gdfIndex = GDF__8BIT_INDEX;
215 break;
216 }
217
218 gdev->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS;
219 gdev->pciBase = vesa->phys_base_ptr;
220
221 gdev->frameAdrs = vesa->phys_base_ptr;
222 gdev->memSize = vesa->bytes_per_scanline * vesa->y_resolution;
223
224 gdev->vprBase = vesa->phys_base_ptr;
225 gdev->cprBase = vesa->phys_base_ptr;
226
Simon Glass23609c72015-01-01 16:18:00 -0700227 return gdev->winSizeX ? 0 : -ENOSYS;
Simon Glass6854f872014-11-14 20:56:33 -0700228#else
229 return -ENOSYS;
230#endif
231}
232
Bin Menga4520022015-07-06 16:31:36 +0800233void setup_video(struct screen_info *screen_info)
234{
Bin Menga4520022015-07-06 16:31:36 +0800235 struct vesa_mode_info *vesa = &mode_info.vesa;
236
Bin Meng1e7a0472015-07-30 03:49:13 -0700237 /* Sanity test on VESA parameters */
238 if (!vesa->x_resolution || !vesa->y_resolution)
239 return;
240
Bin Menga4520022015-07-06 16:31:36 +0800241 screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB;
242
243 screen_info->lfb_width = vesa->x_resolution;
244 screen_info->lfb_height = vesa->y_resolution;
245 screen_info->lfb_depth = vesa->bits_per_pixel;
246 screen_info->lfb_linelength = vesa->bytes_per_scanline;
247 screen_info->lfb_base = vesa->phys_base_ptr;
248 screen_info->lfb_size =
249 ALIGN(screen_info->lfb_linelength * screen_info->lfb_height,
250 65536);
251 screen_info->lfb_size >>= 16;
252 screen_info->red_size = vesa->red_mask_size;
253 screen_info->red_pos = vesa->red_mask_pos;
254 screen_info->green_size = vesa->green_mask_size;
255 screen_info->green_pos = vesa->green_mask_pos;
256 screen_info->blue_size = vesa->blue_mask_size;
257 screen_info->blue_pos = vesa->blue_mask_pos;
258 screen_info->rsvd_size = vesa->reserved_mask_size;
259 screen_info->rsvd_pos = vesa->reserved_mask_pos;
Bin Menga4520022015-07-06 16:31:36 +0800260}
261
Simon Glassbc17d8f2015-01-27 22:13:34 -0700262int pci_run_vga_bios(pci_dev_t dev, int (*int15_handler)(void), int exec_method)
Simon Glass6854f872014-11-14 20:56:33 -0700263{
264 struct pci_rom_header *rom, *ram;
265 int vesa_mode = -1;
Bin Mengd57c2f22015-04-24 15:48:03 +0800266 uint class;
Simon Glassbc17d8f2015-01-27 22:13:34 -0700267 bool emulate;
Simon Glass6854f872014-11-14 20:56:33 -0700268 int ret;
269
270 /* Only execute VGA ROMs */
Bin Mengd57c2f22015-04-24 15:48:03 +0800271 pci_read_config_dword(dev, PCI_REVISION_ID, &class);
272 if (((class >> 16) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
Simon Glass6854f872014-11-14 20:56:33 -0700273 debug("%s: Class %#x, should be %#x\n", __func__, class,
274 PCI_CLASS_DISPLAY_VGA);
275 return -ENODEV;
276 }
Bin Mengd57c2f22015-04-24 15:48:03 +0800277 class >>= 8;
Simon Glass6854f872014-11-14 20:56:33 -0700278
279 if (!should_load_oprom(dev))
280 return -ENXIO;
281
282 ret = pci_rom_probe(dev, class, &rom);
283 if (ret)
284 return ret;
285
Bin Meng81d0b352015-04-24 15:48:04 +0800286 ret = pci_rom_load(rom, &ram);
Simon Glass6854f872014-11-14 20:56:33 -0700287 if (ret)
288 return ret;
289
290 if (!board_should_run_oprom(dev))
291 return -ENXIO;
292
293#if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
294 defined(CONFIG_FRAMEBUFFER_VESA_MODE)
295 vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
296#endif
Simon Glass9a99caf2015-01-01 16:18:05 -0700297 debug("Selected vesa mode %#x\n", vesa_mode);
Simon Glassbc17d8f2015-01-27 22:13:34 -0700298
299 if (exec_method & PCI_ROM_USE_NATIVE) {
300#ifdef CONFIG_X86
301 emulate = false;
302#else
303 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
304 printf("BIOS native execution is only available on x86\n");
305 return -ENOSYS;
306 }
307 emulate = true;
308#endif
309 } else {
310#ifdef CONFIG_BIOSEMU
311 emulate = true;
312#else
313 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
314 printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
315 return -ENOSYS;
316 }
317 emulate = false;
318#endif
319 }
320
Simon Glass6854f872014-11-14 20:56:33 -0700321 if (emulate) {
322#ifdef CONFIG_BIOSEMU
323 BE_VGAInfo *info;
324
325 ret = biosemu_setup(dev, &info);
326 if (ret)
327 return ret;
328 biosemu_set_interrupt_handler(0x15, int15_handler);
329 ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info, true,
330 vesa_mode, &mode_info);
331 if (ret)
332 return ret;
Simon Glass6854f872014-11-14 20:56:33 -0700333#endif
334 } else {
335#ifdef CONFIG_X86
336 bios_set_interrupt_handler(0x15, int15_handler);
337
338 bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
339 &mode_info);
Simon Glass6854f872014-11-14 20:56:33 -0700340#endif
341 }
Simon Glass9a99caf2015-01-01 16:18:05 -0700342 debug("Final vesa mode %#x\n", mode_info.video_mode);
Simon Glass6854f872014-11-14 20:56:33 -0700343
344 return 0;
345}