blob: a9b8a32108282a8741199261d58b59fda5981441 [file] [log] [blame]
Fabio Estevam0417ef12019-12-09 10:43:03 -03001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2016 Freescale Semiconductor, Inc.
4 */
5
6#include <common.h>
Simon Glass691d7192020-05-10 11:40:02 -06007#include <init.h>
Fabio Estevam0417ef12019-12-09 10:43:03 -03008#include <asm/io.h>
9#include <asm/arch/sys_proto.h>
10#include <asm/arch/mx7ulp-pins.h>
11#include <asm/arch/iomux.h>
12#include <asm/gpio.h>
13
14DECLARE_GLOBAL_DATA_PTR;
15
16#define UART_PAD_CTRL (PAD_CTL_PUS_UP)
17
18int dram_init(void)
19{
20 gd->ram_size = imx_ddr_size();
21
22 return 0;
23}
24
25static iomux_cfg_t const lpuart4_pads[] = {
26 MX7ULP_PAD_PTC3__LPUART4_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
27 MX7ULP_PAD_PTC2__LPUART4_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
28};
29
30static void setup_iomux_uart(void)
31{
32 mx7ulp_iomux_setup_multiple_pads(lpuart4_pads,
33 ARRAY_SIZE(lpuart4_pads));
34}
35
36int board_early_init_f(void)
37{
38 setup_iomux_uart();
39
40 return 0;
41}
42
43int board_init(void)
44{
45 /* address of boot parameters */
46 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
47
48 return 0;
49}