Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2013 Google, Inc |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <clk.h> |
| 9 | #include <dm.h> |
Simon Glass | bfeb443 | 2016-07-04 11:58:27 -0600 | [diff] [blame] | 10 | #include <dt-structs.h> |
Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 11 | #include <dwmmc.h> |
| 12 | #include <errno.h> |
Simon Glass | bfeb443 | 2016-07-04 11:58:27 -0600 | [diff] [blame] | 13 | #include <mapmem.h> |
Simon Glass | e1efec4 | 2016-01-21 19:43:34 -0700 | [diff] [blame] | 14 | #include <pwrseq.h> |
Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 15 | #include <syscon.h> |
Simon Glass | e1efec4 | 2016-01-21 19:43:34 -0700 | [diff] [blame] | 16 | #include <asm/gpio.h> |
Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 17 | #include <asm/arch/clock.h> |
| 18 | #include <asm/arch/periph.h> |
| 19 | #include <linux/err.h> |
| 20 | |
| 21 | DECLARE_GLOBAL_DATA_PTR; |
| 22 | |
Simon Glass | f6e41d1 | 2016-05-14 14:03:08 -0600 | [diff] [blame] | 23 | struct rockchip_mmc_plat { |
Simon Glass | bfeb443 | 2016-07-04 11:58:27 -0600 | [diff] [blame] | 24 | #if CONFIG_IS_ENABLED(OF_PLATDATA) |
| 25 | struct dtd_rockchip_rk3288_dw_mshc dtplat; |
| 26 | #endif |
Simon Glass | f6e41d1 | 2016-05-14 14:03:08 -0600 | [diff] [blame] | 27 | struct mmc_config cfg; |
| 28 | struct mmc mmc; |
| 29 | }; |
| 30 | |
Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 31 | struct rockchip_dwmmc_priv { |
Stephen Warren | 135aa95 | 2016-06-17 09:44:00 -0600 | [diff] [blame] | 32 | struct clk clk; |
Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 33 | struct dwmci_host host; |
Simon Glass | 6809b04 | 2016-07-04 11:58:26 -0600 | [diff] [blame] | 34 | int fifo_depth; |
| 35 | bool fifo_mode; |
| 36 | u32 minmax[2]; |
Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 37 | }; |
| 38 | |
| 39 | static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq) |
| 40 | { |
| 41 | struct udevice *dev = host->priv; |
| 42 | struct rockchip_dwmmc_priv *priv = dev_get_priv(dev); |
| 43 | int ret; |
| 44 | |
Stephen Warren | 135aa95 | 2016-06-17 09:44:00 -0600 | [diff] [blame] | 45 | ret = clk_set_rate(&priv->clk, freq); |
Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 46 | if (ret < 0) { |
Xu Ziyuan | 480a9b8 | 2017-04-16 17:44:42 +0800 | [diff] [blame] | 47 | printf("%s: err=%d\n", __func__, ret); |
Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 48 | return ret; |
| 49 | } |
| 50 | |
| 51 | return freq; |
| 52 | } |
| 53 | |
| 54 | static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev) |
| 55 | { |
Simon Glass | bfeb443 | 2016-07-04 11:58:27 -0600 | [diff] [blame] | 56 | #if !CONFIG_IS_ENABLED(OF_PLATDATA) |
Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 57 | struct rockchip_dwmmc_priv *priv = dev_get_priv(dev); |
| 58 | struct dwmci_host *host = &priv->host; |
| 59 | |
| 60 | host->name = dev->name; |
Simon Glass | a821c4a | 2017-05-17 17:18:05 -0600 | [diff] [blame] | 61 | host->ioaddr = (void *)devfdt_get_addr(dev); |
Simon Glass | e160f7d | 2017-01-17 16:52:55 -0700 | [diff] [blame] | 62 | host->buswidth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), |
Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 63 | "bus-width", 4); |
| 64 | host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk; |
| 65 | host->priv = dev; |
| 66 | |
huang lin | ace2198 | 2015-11-18 09:37:25 +0800 | [diff] [blame] | 67 | /* use non-removeable as sdcard and emmc as judgement */ |
Simon Glass | e160f7d | 2017-01-17 16:52:55 -0700 | [diff] [blame] | 68 | if (fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev), "non-removable")) |
huang lin | 6579385 | 2016-01-08 14:06:49 +0800 | [diff] [blame] | 69 | host->dev_index = 0; |
| 70 | else |
huang lin | ace2198 | 2015-11-18 09:37:25 +0800 | [diff] [blame] | 71 | host->dev_index = 1; |
Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 72 | |
Simon Glass | e160f7d | 2017-01-17 16:52:55 -0700 | [diff] [blame] | 73 | priv->fifo_depth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), |
Simon Glass | 6809b04 | 2016-07-04 11:58:26 -0600 | [diff] [blame] | 74 | "fifo-depth", 0); |
| 75 | if (priv->fifo_depth < 0) |
| 76 | return -EINVAL; |
Simon Glass | e160f7d | 2017-01-17 16:52:55 -0700 | [diff] [blame] | 77 | priv->fifo_mode = fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev), |
Simon Glass | 6809b04 | 2016-07-04 11:58:26 -0600 | [diff] [blame] | 78 | "fifo-mode"); |
Philipp Tomsich | ff71f9a | 2017-04-25 09:52:07 +0200 | [diff] [blame] | 79 | |
| 80 | /* |
| 81 | * 'clock-freq-min-max' is deprecated |
| 82 | * (see https://github.com/torvalds/linux/commit/b023030f10573de738bbe8df63d43acab64c9f7b) |
| 83 | */ |
Simon Glass | e160f7d | 2017-01-17 16:52:55 -0700 | [diff] [blame] | 84 | if (fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev), |
Philipp Tomsich | ff71f9a | 2017-04-25 09:52:07 +0200 | [diff] [blame] | 85 | "clock-freq-min-max", priv->minmax, 2)) { |
| 86 | int val = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), |
| 87 | "max-frequency", -EINVAL); |
| 88 | |
| 89 | if (val < 0) |
| 90 | return val; |
| 91 | |
| 92 | priv->minmax[0] = 400000; /* 400 kHz */ |
| 93 | priv->minmax[1] = val; |
| 94 | } else { |
| 95 | debug("%s: 'clock-freq-min-max' property was deprecated.\n", |
| 96 | __func__); |
| 97 | } |
Simon Glass | bfeb443 | 2016-07-04 11:58:27 -0600 | [diff] [blame] | 98 | #endif |
Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 99 | return 0; |
| 100 | } |
| 101 | |
| 102 | static int rockchip_dwmmc_probe(struct udevice *dev) |
| 103 | { |
Simon Glass | f6e41d1 | 2016-05-14 14:03:08 -0600 | [diff] [blame] | 104 | struct rockchip_mmc_plat *plat = dev_get_platdata(dev); |
Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 105 | struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); |
| 106 | struct rockchip_dwmmc_priv *priv = dev_get_priv(dev); |
| 107 | struct dwmci_host *host = &priv->host; |
Simon Glass | e1efec4 | 2016-01-21 19:43:34 -0700 | [diff] [blame] | 108 | struct udevice *pwr_dev __maybe_unused; |
Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 109 | int ret; |
| 110 | |
Simon Glass | bfeb443 | 2016-07-04 11:58:27 -0600 | [diff] [blame] | 111 | #if CONFIG_IS_ENABLED(OF_PLATDATA) |
| 112 | struct dtd_rockchip_rk3288_dw_mshc *dtplat = &plat->dtplat; |
| 113 | |
| 114 | host->name = dev->name; |
| 115 | host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]); |
| 116 | host->buswidth = dtplat->bus_width; |
| 117 | host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk; |
| 118 | host->priv = dev; |
| 119 | host->dev_index = 0; |
| 120 | priv->fifo_depth = dtplat->fifo_depth; |
| 121 | priv->fifo_mode = 0; |
| 122 | memcpy(priv->minmax, dtplat->clock_freq_min_max, sizeof(priv->minmax)); |
| 123 | |
| 124 | ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &priv->clk); |
| 125 | if (ret < 0) |
| 126 | return ret; |
| 127 | #else |
Xu Ziyuan | 480a9b8 | 2017-04-16 17:44:42 +0800 | [diff] [blame] | 128 | ret = clk_get_by_name(dev, "ciu", &priv->clk); |
Simon Glass | 898d643 | 2016-01-21 19:43:38 -0700 | [diff] [blame] | 129 | if (ret < 0) |
Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 130 | return ret; |
Simon Glass | bfeb443 | 2016-07-04 11:58:27 -0600 | [diff] [blame] | 131 | #endif |
huang lin | 2863724 | 2015-11-17 14:20:24 +0800 | [diff] [blame] | 132 | host->fifoth_val = MSIZE(0x2) | |
Simon Glass | 6809b04 | 2016-07-04 11:58:26 -0600 | [diff] [blame] | 133 | RX_WMARK(priv->fifo_depth / 2 - 1) | |
| 134 | TX_WMARK(priv->fifo_depth / 2); |
huang lin | 2863724 | 2015-11-17 14:20:24 +0800 | [diff] [blame] | 135 | |
Simon Glass | 6809b04 | 2016-07-04 11:58:26 -0600 | [diff] [blame] | 136 | host->fifo_mode = priv->fifo_mode; |
huang lin | 2863724 | 2015-11-17 14:20:24 +0800 | [diff] [blame] | 137 | |
Simon Glass | e1efec4 | 2016-01-21 19:43:34 -0700 | [diff] [blame] | 138 | #ifdef CONFIG_PWRSEQ |
| 139 | /* Enable power if needed */ |
| 140 | ret = uclass_get_device_by_phandle(UCLASS_PWRSEQ, dev, "mmc-pwrseq", |
| 141 | &pwr_dev); |
| 142 | if (!ret) { |
| 143 | ret = pwrseq_set_power(pwr_dev, true); |
| 144 | if (ret) |
| 145 | return ret; |
| 146 | } |
| 147 | #endif |
Jaehoon Chung | e5113c3 | 2016-09-23 19:13:16 +0900 | [diff] [blame] | 148 | dwmci_setup_cfg(&plat->cfg, host, priv->minmax[1], priv->minmax[0]); |
Simon Glass | f6e41d1 | 2016-05-14 14:03:08 -0600 | [diff] [blame] | 149 | host->mmc = &plat->mmc; |
Simon Glass | f6e41d1 | 2016-05-14 14:03:08 -0600 | [diff] [blame] | 150 | host->mmc->priv = &priv->host; |
Simon Glass | cffe5d8 | 2016-05-01 13:52:34 -0600 | [diff] [blame] | 151 | host->mmc->dev = dev; |
Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 152 | upriv->mmc = host->mmc; |
| 153 | |
Simon Glass | 42b37d8 | 2016-06-12 23:30:24 -0600 | [diff] [blame] | 154 | return dwmci_probe(dev); |
Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 155 | } |
| 156 | |
Simon Glass | f6e41d1 | 2016-05-14 14:03:08 -0600 | [diff] [blame] | 157 | static int rockchip_dwmmc_bind(struct udevice *dev) |
| 158 | { |
Simon Glass | f6e41d1 | 2016-05-14 14:03:08 -0600 | [diff] [blame] | 159 | struct rockchip_mmc_plat *plat = dev_get_platdata(dev); |
Simon Glass | f6e41d1 | 2016-05-14 14:03:08 -0600 | [diff] [blame] | 160 | |
Masahiro Yamada | 24f5aec | 2016-09-06 22:17:32 +0900 | [diff] [blame] | 161 | return dwmci_bind(dev, &plat->mmc, &plat->cfg); |
Simon Glass | f6e41d1 | 2016-05-14 14:03:08 -0600 | [diff] [blame] | 162 | } |
| 163 | |
Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 164 | static const struct udevice_id rockchip_dwmmc_ids[] = { |
| 165 | { .compatible = "rockchip,rk3288-dw-mshc" }, |
| 166 | { } |
| 167 | }; |
| 168 | |
| 169 | U_BOOT_DRIVER(rockchip_dwmmc_drv) = { |
Simon Glass | bfeb443 | 2016-07-04 11:58:27 -0600 | [diff] [blame] | 170 | .name = "rockchip_rk3288_dw_mshc", |
Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 171 | .id = UCLASS_MMC, |
| 172 | .of_match = rockchip_dwmmc_ids, |
| 173 | .ofdata_to_platdata = rockchip_dwmmc_ofdata_to_platdata, |
Simon Glass | 42b37d8 | 2016-06-12 23:30:24 -0600 | [diff] [blame] | 174 | .ops = &dm_dwmci_ops, |
Simon Glass | f6e41d1 | 2016-05-14 14:03:08 -0600 | [diff] [blame] | 175 | .bind = rockchip_dwmmc_bind, |
Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 176 | .probe = rockchip_dwmmc_probe, |
| 177 | .priv_auto_alloc_size = sizeof(struct rockchip_dwmmc_priv), |
Simon Glass | f6e41d1 | 2016-05-14 14:03:08 -0600 | [diff] [blame] | 178 | .platdata_auto_alloc_size = sizeof(struct rockchip_mmc_plat), |
Simon Glass | a8cb4fb | 2015-08-30 16:55:37 -0600 | [diff] [blame] | 179 | }; |
Simon Glass | e1efec4 | 2016-01-21 19:43:34 -0700 | [diff] [blame] | 180 | |
| 181 | #ifdef CONFIG_PWRSEQ |
| 182 | static int rockchip_dwmmc_pwrseq_set_power(struct udevice *dev, bool enable) |
| 183 | { |
| 184 | struct gpio_desc reset; |
| 185 | int ret; |
| 186 | |
| 187 | ret = gpio_request_by_name(dev, "reset-gpios", 0, &reset, GPIOD_IS_OUT); |
| 188 | if (ret) |
| 189 | return ret; |
| 190 | dm_gpio_set_value(&reset, 1); |
| 191 | udelay(1); |
| 192 | dm_gpio_set_value(&reset, 0); |
| 193 | udelay(200); |
| 194 | |
| 195 | return 0; |
| 196 | } |
| 197 | |
| 198 | static const struct pwrseq_ops rockchip_dwmmc_pwrseq_ops = { |
| 199 | .set_power = rockchip_dwmmc_pwrseq_set_power, |
| 200 | }; |
| 201 | |
| 202 | static const struct udevice_id rockchip_dwmmc_pwrseq_ids[] = { |
| 203 | { .compatible = "mmc-pwrseq-emmc" }, |
| 204 | { } |
| 205 | }; |
| 206 | |
| 207 | U_BOOT_DRIVER(rockchip_dwmmc_pwrseq_drv) = { |
| 208 | .name = "mmc_pwrseq_emmc", |
| 209 | .id = UCLASS_PWRSEQ, |
| 210 | .of_match = rockchip_dwmmc_pwrseq_ids, |
| 211 | .ops = &rockchip_dwmmc_pwrseq_ops, |
| 212 | }; |
| 213 | #endif |