blob: 25684f2018116a51ae98e03523e86d1002cb3fef [file] [log] [blame]
Wolfgang Denk74f43042005-09-25 01:48:28 +02001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * (C) Copyright 2002
7 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
Wolfgang Denkfe7eb5d2005-09-25 02:00:47 +020019 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Wolfgang Denk74f43042005-09-25 01:48:28 +020020 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28/*
29 * CPU specific code
30 */
31
32#include <common.h>
33#include <command.h>
34#include <arm946es.h>
Jean-Christophe PLAGNIOL-VILLARD677e62f2009-04-05 13:02:43 +020035#include <asm/system.h>
Wolfgang Denk74f43042005-09-25 01:48:28 +020036
Wolfgang Denkd87080b2006-03-31 18:32:53 +020037#ifdef CONFIG_USE_IRQ
38DECLARE_GLOBAL_DATA_PTR;
39#endif
40
Wolfgang Denk74f43042005-09-25 01:48:28 +020041static void cp_delay (void)
42{
43 volatile int i;
44
45 /* copro seems to need some delay between reading and writing */
46 for (i = 0; i < 100; i++);
47}
48
Wolfgang Denk74f43042005-09-25 01:48:28 +020049int cpu_init (void)
50{
51 /*
52 * setup up stacks if necessary
53 */
54#ifdef CONFIG_USE_IRQ
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020055 IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4;
Wolfgang Denk74f43042005-09-25 01:48:28 +020056 FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
57#endif
58 return 0;
59}
60
61int cleanup_before_linux (void)
62{
63 /*
64 * this function is called just before we call linux
65 * it prepares the processor for linux
66 *
67 * we turn off caches etc ...
68 */
69
70 unsigned long i;
71
72 disable_interrupts ();
73
Wolfgang Denkfe7eb5d2005-09-25 02:00:47 +020074 /* ARM926E-S needs the protection unit enabled for the icache to have
75 * been enabled - left for possible later use
Wolfgang Denk74f43042005-09-25 01:48:28 +020076 * should turn off the protection unit as well....
Wolfgang Denkfe7eb5d2005-09-25 02:00:47 +020077 */
Wolfgang Denk74f43042005-09-25 01:48:28 +020078 /* turn off I/D-cache */
79 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
Jean-Christophe PLAGNIOL-VILLARD677e62f2009-04-05 13:02:43 +020080 i &= ~(CR_C | CR_I);
Wolfgang Denk74f43042005-09-25 01:48:28 +020081 asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
82
83 /* flush I/D-cache */
84 i = 0;
85 asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
86 asm ("mcr p15, 0, %0, c7, c6, 0": :"r" (i));
87 return (0);
88}
89
90int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
91{
92 extern void reset_cpu (ulong addr);
93
94 disable_interrupts ();
95 reset_cpu (0);
96 /*NOTREACHED*/
97 return (0);
98}
99/* ARM926E-S needs the protection unit enabled for this to have any effect
100 - left for possible later use */
101void icache_enable (void)
102{
103 ulong reg;
104
Jean-Christophe PLAGNIOL-VILLARD677e62f2009-04-05 13:02:43 +0200105 reg = get_cr (); /* get control reg. */
Wolfgang Denk74f43042005-09-25 01:48:28 +0200106 cp_delay ();
Jean-Christophe PLAGNIOL-VILLARD677e62f2009-04-05 13:02:43 +0200107 set_cr (reg | CR_I);
Wolfgang Denk74f43042005-09-25 01:48:28 +0200108}
109
110void icache_disable (void)
111{
112 ulong reg;
113
Jean-Christophe PLAGNIOL-VILLARD677e62f2009-04-05 13:02:43 +0200114 reg = get_cr ();
Wolfgang Denk74f43042005-09-25 01:48:28 +0200115 cp_delay ();
Jean-Christophe PLAGNIOL-VILLARD677e62f2009-04-05 13:02:43 +0200116 set_cr (reg & ~CR_I);
Wolfgang Denk74f43042005-09-25 01:48:28 +0200117}
118
119int icache_status (void)
120{
Jean-Christophe PLAGNIOL-VILLARD677e62f2009-04-05 13:02:43 +0200121 return (get_cr () & CR_I) != 0;
Wolfgang Denk74f43042005-09-25 01:48:28 +0200122}