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Peter Barada86887f82011-12-19 19:54:51 +00001/*
2 * (C) Copyright 2011 Logic Product Development <www.logicpd.com>
3 * Peter Barada <peter.barada@logicpd.com>
4 *
5 * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
6 * reference boards.
7 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Peter Barada86887f82011-12-19 19:54:51 +00009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14/*
15 * High Level Configuration Options
16 */
17#define CONFIG_OMAP /* in a TI OMAP core */
18#define CONFIG_OMAP34XX /* which is a 34XX */
19#define CONFIG_OMAP3_LOGIC /* working with Logic OMAP boards */
Marek Vasut308252a2012-07-21 05:02:23 +000020#define CONFIG_OMAP_GPIO
Peter Barada86887f82011-12-19 19:54:51 +000021
Peter Barada86887f82011-12-19 19:54:51 +000022#define CONFIG_SYS_TEXT_BASE 0x80400000
23
24#define CONFIG_SDRC /* The chip has SDRC controller */
25
26#include <asm/arch/cpu.h> /* get chip and board defs */
27#include <asm/arch/omap3.h>
28
29/*
30 * Display CPU and Board information
31 */
32#define CONFIG_DISPLAY_CPUINFO
33#define CONFIG_DISPLAY_BOARDINFO
34
35/* Clock Defines */
36#define V_OSCK 26000000 /* Clock output from T2 */
37#define V_SCLK (V_OSCK >> 1)
38
39#define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */
40
41#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
42#define CONFIG_SETUP_MEMORY_TAGS
43#define CONFIG_INITRD_TAG
44#define CONFIG_REVISION_TAG
45
46#define CONFIG_CMDLINE_EDITING /* cmd line edit/history */
47#define CONFIG_ZERO_BOOTDELAY_CHECK /* check keypress w/no delay */
48
49/*
50 * Size of malloc() pool
51 */
52#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
53 /* Sector */
54#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
55
56/*
57 * Hardware drivers
58 */
59
60/*
61 * NS16550 Configuration
62 */
63#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
64
65#define CONFIG_SYS_NS16550
66#define CONFIG_SYS_NS16550_SERIAL
67#define CONFIG_SYS_NS16550_REG_SIZE (-4)
68#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
69
70/*
71 * select serial console configuration
72 */
73#define CONFIG_CONS_INDEX 1
74#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
75#define CONFIG_SERIAL1 1 /* UART1 on OMAP Logic boards */
76
77/* allow to overwrite serial and ethaddr */
78#define CONFIG_ENV_OVERWRITE
79#define CONFIG_BAUDRATE 115200
80#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
81 115200}
82#define CONFIG_GENERIC_MMC
83#define CONFIG_MMC
84#define CONFIG_OMAP_HSMMC
85#define CONFIG_DOS_PARTITION
86
87/* commands to include */
88#include <config_cmd_default.h>
89
90#define CONFIG_CMD_CACHE
91#define CONFIG_CMD_EXT2 /* EXT2 Support */
92#define CONFIG_CMD_FAT /* FAT support */
93#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
94#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
95#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
96#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
97#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(x-loader),"\
98 "1920k(u-boot),128k(u-boot-env),"\
99 "4m(kernel),-(fs)"
100
101#define CONFIG_CMD_I2C /* I2C serial bus support */
102#define CONFIG_CMD_MMC /* MMC support */
103#define CONFIG_CMD_NAND /* NAND support */
104#define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
105#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
106#define CONFIG_CMD_PING
107#define CONFIG_CMD_DHCP
Marek Vasut02b233e2012-03-31 07:47:18 +0000108#define CONFIG_CMD_SETEXPR /* Evaluate expressions */
Peter Barada86887f82011-12-19 19:54:51 +0000109
110#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
111#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
112#undef CONFIG_CMD_IMI /* iminfo */
113#undef CONFIG_CMD_IMLS /* List all found images */
114
115#define CONFIG_SYS_NO_FLASH
116
117/*
118 * I2C
119 */
120#define CONFIG_HARD_I2C
121#define CONFIG_DRIVER_OMAP34XX_I2C
122
123#define CONFIG_SYS_I2C_SPEED 100000
124#define CONFIG_SYS_I2C_SLAVE 1
Peter Barada86887f82011-12-19 19:54:51 +0000125#define CONFIG_I2C_MULTI_BUS
126
127/*
128 * TWL4030
129 */
130#define CONFIG_TWL4030_POWER
131
132/*
133 * Board NAND Info.
134 */
135#define CONFIG_SYS_NAND_QUIET_TEST
136#define CONFIG_NAND_OMAP_GPMC
137#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
138 /* to access nand */
139#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
140 /* to access nand at */
141 /* CS0 */
142
143#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
144 /* NAND devices */
145#define CONFIG_JFFS2_NAND
146/* nand device jffs2 lives on */
147#define CONFIG_JFFS2_DEV "nand0"
148/* start of jffs2 partition */
149#define CONFIG_JFFS2_PART_OFFSET 0x680000
150#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
151 /* partition */
152
153/* Environment information */
154#define CONFIG_BOOTDELAY 2
155
156/*
157 * PREBOOT assumes the 4.3" display is attached. User can interrupt
158 * and modify display variable to suit their needs.
159 */
160#define CONFIG_PREBOOT \
161 "echo ======================NOTICE============================;"\
162 "echo \"The u-boot environment is not set.\";" \
163 "echo \"If using a display a valid display varible for your panel\";" \
164 "echo \"needs to be set.\";" \
165 "echo \"Valid display options are:\";" \
166 "echo \" 2 == LQ121S1DG31 TFT SVGA (12.1) Sharp\";" \
167 "echo \" 3 == LQ036Q1DA01 TFT QVGA (3.6) Sharp w/ASIC\";" \
168 "echo \" 5 == LQ064D343 TFT VGA (6.4) Sharp\";" \
169 "echo \" 7 == LQ10D368 TFT VGA (10.4) Sharp\";" \
170 "echo \" 15 == LQ043T1DG01 TFT WQVGA (4.3) Sharp (DEFAULT)\";" \
171 "echo \" vga[-dvi or -hdmi] LCD VGA 640x480\";" \
172 "echo \" svga[-dvi or -hdmi] LCD SVGA 800x600\";" \
173 "echo \" xga[-dvi or -hdmi] LCD XGA 1024x768\";" \
174 "echo \" 720p[-dvi or -hdmi] LCD 720P 1280x720\";" \
175 "echo \"Defaulting to 4.3 LCD panel (display=15).\";" \
176 "setenv display 15;" \
177 "setenv preboot;" \
178 "saveenv;"
179
180
181#define CONFIG_EXTRA_ENV_SETTINGS \
182 "loadaddr=0x81000000\0" \
183 "bootfile=uImage\0" \
184 "mtdids=" MTDIDS_DEFAULT "\0" \
185 "mtdparts=" MTDPARTS_DEFAULT "\0" \
186 "mmcdev=0\0" \
Andrew Bradford66968112012-10-01 05:06:52 +0000187 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
Peter Barada86887f82011-12-19 19:54:51 +0000188 "if run loadbootscript; then " \
189 "run bootscript; " \
190 "else " \
191 "run defaultboot;" \
192 "fi; " \
193 "else run defaultboot; fi\0" \
194 "defaultboot=run mmcramboot\0" \
195 "consoledevice=ttyO0\0" \
196 "display=15\0" \
197 "setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
198 "dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
199 "rotation=0\0" \
200 "vrfb_arg=if itest ${rotation} -ne 0; then " \
201 "setenv bootargs ${bootargs} omapfb.vrfb=y " \
202 "omapfb.rotate=${rotation}; " \
203 "fi\0" \
204 "otherbootargs=ignore_loglevel early_printk no_console_suspend\0" \
205 "addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \
206 "common_bootargs=setenv bootargs ${bootargs} display=${display} " \
207 "${otherbootargs};" \
208 "run addmtdparts; " \
209 "run vrfb_arg\0" \
210 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
211 "bootscript=echo 'Running bootscript from mmc ...'; " \
212 "source ${loadaddr}\0" \
213 "loaduimage=mmc rescan ${mmcdev}; " \
214 "fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
215 "ramdisksize=64000\0" \
216 "ramdiskaddr=0x82000000\0" \
217 "ramdiskimage=rootfs.ext2.gz.uboot\0" \
218 "ramargs=run setconsole; setenv bootargs console=${console} " \
219 "root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
220 "mmcramboot=echo 'Booting kernel from mmc w/ramdisk...'; " \
221 "run ramargs; " \
222 "run common_bootargs; " \
223 "run dump_bootargs; " \
224 "run loaduimage; " \
225 "fatload mmc ${mmcdev} ${ramdiskaddr} ${ramdiskimage}; "\
226 "bootm ${loadaddr} ${ramdiskaddr}\0" \
227 "ramboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
228 "run ramargs; " \
229 "run common_bootargs; " \
230 "run dump_bootargs; " \
231 "tftpboot ${loadaddr} ${bootfile}; "\
232 "tftpboot ${ramdiskaddr} ${ramdiskimage}; "\
233 "bootm ${loadaddr} ${ramdiskaddr}\0"
234
235#define CONFIG_BOOTCOMMAND \
236 "run autoboot"
237
238#define CONFIG_AUTO_COMPLETE
239/*
240 * Miscellaneous configurable options
241 */
242#define CONFIG_SYS_LONGHELP /* undef to save memory */
243#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Peter Barada86887f82011-12-19 19:54:51 +0000244#define CONFIG_SYS_PROMPT "OMAP Logic # "
245#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
246/* Print Buffer Size */
247#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
248 sizeof(CONFIG_SYS_PROMPT) + 16)
249#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
250/* Boot Argument Buffer Size */
251#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
252/* memtest works on */
253#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
254#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
255 0x01F00000) /* 31MB */
256
257#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
258 /* address */
259
260/*
261 * OMAP3 has 12 GP timers, they can be driven by the system clock
262 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
263 * This rate is divided by a local divisor.
264 */
265#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
266#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
267#define CONFIG_SYS_HZ 1000
268
269/*
Peter Barada86887f82011-12-19 19:54:51 +0000270 * Physical Memory Map
271 */
272#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
273#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
274#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
275
276/*
277 * FLASH and environment organization
278 */
279
280/* **** PISMO SUPPORT *** */
281
282/* Configure the PISMO */
283#define PISMO1_NAND_SIZE GPMC_SIZE_128M
284
285#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
286
287#if defined(CONFIG_CMD_NAND)
288#define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
289#elif defined(CONFIG_CMD_ONENAND)
290#define CONFIG_SYS_FLASH_BASE PISMO1_ONEN_BASE
291#endif
292
293/* Monitor at start of flash */
294#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
295
296#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
297
298#if defined(CONFIG_CMD_NAND)
299#define CONFIG_NAND_OMAP_GPMC
300#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
301#define CONFIG_ENV_IS_IN_NAND
302#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
303#endif
304
305#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
306#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
307
308#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
309#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
310#define CONFIG_SYS_INIT_RAM_SIZE 0x800
311#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
312 CONFIG_SYS_INIT_RAM_SIZE - \
313 GENERATED_GBL_DATA_SIZE)
314
315/*
316 * SMSC922x Ethernet
317 */
318#if defined(CONFIG_CMD_NET)
319
320#define CONFIG_SMC911X
321#define CONFIG_SMC911X_16_BIT
322#define CONFIG_SMC911X_BASE 0x08000000
323
324#endif /* (CONFIG_CMD_NET) */
325
326/*
327 * BOOTP fields
328 */
329
330#define CONFIG_BOOTP_SUBNETMASK 0x00000001
331#define CONFIG_BOOTP_GATEWAY 0x00000002
332#define CONFIG_BOOTP_HOSTNAME 0x00000004
333#define CONFIG_BOOTP_BOOTPATH 0x00000010
334
335#endif /* __CONFIG_H */