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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Tom Warrenf01b6312012-12-11 13:34:18 +00002/*
Tom Warren8ca79b22013-03-06 16:16:22 -07003 * (C) Copyright 2010-2013
Tom Warrenf01b6312012-12-11 13:34:18 +00004 * NVIDIA Corporation <www.nvidia.com>
Tom Warrenf01b6312012-12-11 13:34:18 +00005 */
6
7#include <common.h>
Simon Glassb0e6ef42014-12-10 08:55:57 -07008#include <dm.h>
Tom Warrenf01b6312012-12-11 13:34:18 +00009#include <asm/arch/pinmux.h>
Tom Warren8ca79b22013-03-06 16:16:22 -070010#include <asm/arch/gp_padctrl.h>
Thierry Reding5a2c96a2014-12-09 22:25:17 -070011#include <asm/arch/gpio.h>
12#include <asm/gpio.h>
Tom Warrenf01b6312012-12-11 13:34:18 +000013#include "pinmux-config-cardhu.h"
Tom Warren190be1f2013-02-26 12:26:55 -070014#include <i2c.h>
15
16#define PMU_I2C_ADDRESS 0x2D
17#define MAX_I2C_RETRY 3
Tom Warrenf01b6312012-12-11 13:34:18 +000018
19/*
20 * Routine: pinmux_init
21 * Description: Do individual peripheral pinmux configs
22 */
23void pinmux_init(void)
24{
Stephen Warrendfb42fc2014-03-21 12:28:56 -060025 pinmux_config_pingrp_table(tegra3_pinmux_common,
Tom Warrenf01b6312012-12-11 13:34:18 +000026 ARRAY_SIZE(tegra3_pinmux_common));
27
Stephen Warrendfb42fc2014-03-21 12:28:56 -060028 pinmux_config_pingrp_table(unused_pins_lowpower,
Tom Warrenf01b6312012-12-11 13:34:18 +000029 ARRAY_SIZE(unused_pins_lowpower));
Tom Warren8ca79b22013-03-06 16:16:22 -070030
31 /* Initialize any non-default pad configs (APB_MISC_GP regs) */
Stephen Warrendfb42fc2014-03-21 12:28:56 -060032 pinmux_config_drvgrp_table(cardhu_padctrl, ARRAY_SIZE(cardhu_padctrl));
Tom Warrenf01b6312012-12-11 13:34:18 +000033}
Tom Warren190be1f2013-02-26 12:26:55 -070034
Masahiro Yamada1d2c0502017-01-10 13:32:07 +090035#if defined(CONFIG_MMC_SDHCI_TEGRA)
Tom Warren190be1f2013-02-26 12:26:55 -070036/*
37 * Do I2C/PMU writes to bring up SD card bus power
38 *
39 */
40void board_sdmmc_voltage_init(void)
41{
Simon Glassb0e6ef42014-12-10 08:55:57 -070042 struct udevice *dev;
Tom Warren190be1f2013-02-26 12:26:55 -070043 uchar reg, data_buffer[1];
Simon Glassb0e6ef42014-12-10 08:55:57 -070044 int ret;
Tom Warren190be1f2013-02-26 12:26:55 -070045 int i;
46
Simon Glass25ab4b02015-01-25 08:26:55 -070047 ret = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev);
Simon Glassb0e6ef42014-12-10 08:55:57 -070048 if (ret) {
49 debug("%s: Cannot find PMIC I2C chip\n", __func__);
50 return;
51 }
Tom Warren190be1f2013-02-26 12:26:55 -070052
53 /* TPS659110: LDO5_REG = 3.3v, ACTIVE to SDMMC1 */
54 data_buffer[0] = 0x65;
55 reg = 0x32;
56
57 for (i = 0; i < MAX_I2C_RETRY; ++i) {
Simon Glassf9a4c2d2015-01-12 18:02:07 -070058 if (dm_i2c_write(dev, reg, data_buffer, 1))
Tom Warren190be1f2013-02-26 12:26:55 -070059 udelay(100);
60 }
61
62 /* TPS659110: GPIO7_REG = PDEN, output a 1 to EN_3V3_SYS */
63 data_buffer[0] = 0x09;
64 reg = 0x67;
65
66 for (i = 0; i < MAX_I2C_RETRY; ++i) {
Simon Glassf9a4c2d2015-01-12 18:02:07 -070067 if (dm_i2c_write(dev, reg, data_buffer, 1))
Tom Warren190be1f2013-02-26 12:26:55 -070068 udelay(100);
69 }
70}
71
72/*
73 * Routine: pin_mux_mmc
74 * Description: setup the MMC muxes, power rails, etc.
75 */
76void pin_mux_mmc(void)
77{
78 /*
79 * NOTE: We don't do mmc-specific pin muxes here.
80 * They were done globally in pinmux_init().
81 */
82
83 /* Bring up the SDIO1 power rail */
84 board_sdmmc_voltage_init();
85}
86#endif /* MMC */
Thierry Reding5a2c96a2014-12-09 22:25:17 -070087
88#ifdef CONFIG_PCI_TEGRA
89int tegra_pcie_board_init(void)
90{
91 struct udevice *dev;
92 u8 addr, data[1];
93 int err;
94
Simon Glass25ab4b02015-01-25 08:26:55 -070095 err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev);
Thierry Reding5a2c96a2014-12-09 22:25:17 -070096 if (err) {
97 debug("failed to find PMU bus\n");
98 return err;
99 }
100
101 /* TPS659110: LDO1_REG = 1.05V, ACTIVE */
102 data[0] = 0x15;
103 addr = 0x30;
104
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700105 err = dm_i2c_write(dev, addr, data, 1);
Thierry Reding5a2c96a2014-12-09 22:25:17 -0700106 if (err) {
107 debug("failed to set VDD supply\n");
108 return err;
109 }
110
111 /* GPIO: PEX = 3.3V */
Stephen Warren01a97a12016-05-12 12:07:39 -0600112 err = gpio_request(TEGRA_GPIO(L, 7), "PEX");
Thierry Reding5a2c96a2014-12-09 22:25:17 -0700113 if (err < 0)
114 return err;
115
Stephen Warren01a97a12016-05-12 12:07:39 -0600116 gpio_direction_output(TEGRA_GPIO(L, 7), 1);
Thierry Reding5a2c96a2014-12-09 22:25:17 -0700117
118 /* TPS659110: LDO2_REG = 1.05V, ACTIVE */
119 data[0] = 0x15;
120 addr = 0x31;
121
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700122 err = dm_i2c_write(dev, addr, data, 1);
Thierry Reding5a2c96a2014-12-09 22:25:17 -0700123 if (err) {
124 debug("failed to set AVDD supply\n");
125 return err;
126 }
127
128 return 0;
129}
Thierry Reding5a2c96a2014-12-09 22:25:17 -0700130#endif /* PCI */