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gerrit.cesnet.cz / github / trini / u-boot / 622e5fee3d14c06c4c68f3c89612a9e58926c900 / . / arch / arm / dts / uniphier-ph1-pro4.dtsi
blob: 8195266db3c7ab2f88b459af41d331ae40fad105 [file] [log] [blame]
Masahiro Yamada509eb672014-11-26 18:33:59 +0900[diff] [blame]1/*
2 * Device Tree Source for UniPhier PH1-Pro4 SoC
3 *
Masahiro Yamada64d851b2015-02-27 02:26:56 +0900[diff] [blame]4 * Copyright (C) 2014-2015 Panasonic Corporation
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900[diff] [blame]5 * Copyright (C) 2015 Socionext Inc.
6 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada509eb672014-11-26 18:33:59 +0900[diff] [blame]7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10
11/include/ "skeleton.dtsi"
12
13/ {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900[diff] [blame]14 compatible = "socionext,ph1-pro4";
Masahiro Yamada509eb672014-11-26 18:33:59 +0900[diff] [blame]15
16 cpus {
Masahiro Yamada509eb672014-11-26 18:33:59 +0900[diff] [blame]17 #address-cells = <1>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900[diff] [blame]18 #size-cells = <0>;
Masahiro Yamada509eb672014-11-26 18:33:59 +0900[diff] [blame]19
20 cpu@0 {
21 device_type = "cpu";
22 compatible = "arm,cortex-a9";
23 reg = <0>;
24 };
25
26 cpu@1 {
27 device_type = "cpu";
28 compatible = "arm,cortex-a9";
29 reg = <1>;
30 };
31 };
32
33 soc {
34 compatible = "simple-bus";
35 #address-cells = <1>;
36 #size-cells = <1>;
37 ranges;
Masahiro Yamada625177d2014-11-26 18:34:00 +0900[diff] [blame]38
39 uart0: serial@54006800 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900[diff] [blame]40 compatible = "socionext,uniphier-uart";
Masahiro Yamada625177d2014-11-26 18:34:00 +0900[diff] [blame]41 status = "disabled";
42 reg = <0x54006800 0x20>;
43 clock-frequency = <73728000>;
44 };
45
46 uart1: serial@54006900 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900[diff] [blame]47 compatible = "socionext,uniphier-uart";
Masahiro Yamada625177d2014-11-26 18:34:00 +0900[diff] [blame]48 status = "disabled";
49 reg = <0x54006900 0x20>;
50 clock-frequency = <73728000>;
51 };
52
53 uart2: serial@54006a00 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900[diff] [blame]54 compatible = "socionext,uniphier-uart";
Masahiro Yamada625177d2014-11-26 18:34:00 +0900[diff] [blame]55 status = "disabled";
56 reg = <0x54006a00 0x20>;
57 clock-frequency = <73728000>;
58 };
59
60 uart3: serial@54006b00 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900[diff] [blame]61 compatible = "socionext,uniphier-uart";
Masahiro Yamada625177d2014-11-26 18:34:00 +0900[diff] [blame]62 status = "disabled";
63 reg = <0x54006b00 0x20>;
64 clock-frequency = <73728000>;
65 };
Masahiro Yamada149c7512014-11-26 18:34:01 +0900[diff] [blame]66
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900[diff] [blame]67 i2c0: i2c@58780000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900[diff] [blame]68 compatible = "socionext,uniphier-fi2c";
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900[diff] [blame]69 #address-cells = <1>;
70 #size-cells = <0>;
71 reg = <0x58780000 0x80>;
72 clock-frequency = <100000>;
73 status = "disabled";
74 };
75
76 i2c1: i2c@58781000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900[diff] [blame]77 compatible = "socionext,uniphier-fi2c";
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900[diff] [blame]78 #address-cells = <1>;
79 #size-cells = <0>;
80 reg = <0x58781000 0x80>;
81 clock-frequency = <100000>;
82 status = "disabled";
83 };
84
85 i2c2: i2c@58782000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900[diff] [blame]86 compatible = "socionext,uniphier-fi2c";
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900[diff] [blame]87 #address-cells = <1>;
88 #size-cells = <0>;
89 reg = <0x58782000 0x80>;
90 clock-frequency = <100000>;
91 status = "disabled";
92 };
93
94 i2c3: i2c@58783000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900[diff] [blame]95 compatible = "socionext,uniphier-fi2c";
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900[diff] [blame]96 #address-cells = <1>;
97 #size-cells = <0>;
98 reg = <0x58783000 0x80>;
99 clock-frequency = <100000>;
100 status = "disabled";
101 };
102
103 /* i2c4 does not exist */
104
105 i2c5: i2c@58785000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900[diff] [blame]106 compatible = "socionext,uniphier-fi2c";
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900[diff] [blame]107 #address-cells = <1>;
108 #size-cells = <0>;
109 reg = <0x58785000 0x80>;
110 clock-frequency = <400000>;
111 status = "ok";
112 };
113
114 i2c6: i2c@58786000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900[diff] [blame]115 compatible = "socionext,uniphier-fi2c";
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900[diff] [blame]116 #address-cells = <1>;
117 #size-cells = <0>;
118 reg = <0x58786000 0x80>;
119 clock-frequency = <400000>;
120 status = "ok";
121 };
122
Masahiro Yamadade01a762015-02-27 02:26:59 +0900[diff] [blame]123 usb2: usb@5a800100 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900[diff] [blame]124 compatible = "socionext,uniphier-ehci", "generic-ehci";
Masahiro Yamada149c7512014-11-26 18:34:01 +0900[diff] [blame]125 status = "disabled";
126 reg = <0x5a800100 0x100>;
127 };
128
Masahiro Yamadade01a762015-02-27 02:26:59 +0900[diff] [blame]129 usb3: usb@5a810100 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900[diff] [blame]130 compatible = "socionext,uniphier-ehci", "generic-ehci";
Masahiro Yamada149c7512014-11-26 18:34:01 +0900[diff] [blame]131 status = "disabled";
132 reg = <0x5a810100 0x100>;
133 };
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900[diff] [blame]134
Masahiro Yamadade01a762015-02-27 02:26:59 +0900[diff] [blame]135 usb0: usb@65a00000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900[diff] [blame]136 compatible = "socionext,uniphier-xhci", "generic-xhci";
Masahiro Yamadade01a762015-02-27 02:26:59 +0900[diff] [blame]137 status = "disabled";
138 reg = <0x65a00000 0x100>;
139 };
140
141 usb1: usb@65c00000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900[diff] [blame]142 compatible = "socionext,uniphier-xhci", "generic-xhci";
Masahiro Yamadade01a762015-02-27 02:26:59 +0900[diff] [blame]143 status = "disabled";
144 reg = <0x65c00000 0x100>;
145 };
146
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900[diff] [blame]147 nand: nand@68000000 {
148 compatible = "denali,denali-nand-dt";
149 reg = <0x68000000 0x20>, <0x68100000 0x1000>;
150 reg-names = "nand_data", "denali_reg";
151 };
Masahiro Yamada509eb672014-11-26 18:33:59 +0900[diff] [blame]152 };
153};