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Ian Campbellcba69ee2014-05-05 11:52:26 +01001/*
2 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3 *
4 * (C) Copyright 2007-2011
5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6 * Tom Cubie <tangliang@allwinnertech.com>
7 *
8 * Configuration settings for the Allwinner sunxi series of boards.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef _SUNXI_COMMON_CONFIG_H
14#define _SUNXI_COMMON_CONFIG_H
15
Hans de Goedee049fe22015-05-19 22:12:31 +020016#include <linux/stringify.h>
17
Siarhei Siamashka77ef1362015-02-21 07:34:09 +020018#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
19/*
20 * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
21 * expense of restricting some features, so the regular machine id values can
22 * be used.
23 */
24# define CONFIG_MACH_TYPE_COMPAT_REV 0
25#else
26/*
27 * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
28 * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
29 * beyond the machine id check.
30 */
31# define CONFIG_MACH_TYPE_COMPAT_REV 1
32#endif
33
Ian Campbellcba69ee2014-05-05 11:52:26 +010034/*
35 * High Level Configuration Options
36 */
37#define CONFIG_SUNXI /* sunxi family */
Ian Campbell50827a52014-05-05 11:52:30 +010038#ifdef CONFIG_SPL_BUILD
Ian Campbell50827a52014-05-05 11:52:30 +010039#define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */
40#endif
Ian Campbellcba69ee2014-05-05 11:52:26 +010041
42#include <asm/arch/cpu.h> /* get chip and board defs */
43
Hans de Goedeb6006ba2015-04-15 20:46:48 +020044#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM_SERIAL)
Simon Glass1a81cf832014-10-30 20:25:50 -060045# define CONFIG_DW_SERIAL
Simon Glass57f878e2014-10-30 20:25:46 -060046#endif
47
Ian Campbellcba69ee2014-05-05 11:52:26 +010048/*
49 * Display CPU information
50 */
51#define CONFIG_DISPLAY_CPUINFO
52
Ian Campbell4e7c8922015-01-23 10:17:35 +000053#define CONFIG_SYS_PROMPT "sunxi# "
54
Ian Campbellcba69ee2014-05-05 11:52:26 +010055/* Serial & console */
56#define CONFIG_SYS_NS16550
57#define CONFIG_SYS_NS16550_SERIAL
58/* ns16550 reg in the low bits of cpu reg */
Ian Campbellcba69ee2014-05-05 11:52:26 +010059#define CONFIG_SYS_NS16550_CLK 24000000
Simon Glass1a81cf832014-10-30 20:25:50 -060060#ifndef CONFIG_DM_SERIAL
61# define CONFIG_SYS_NS16550_REG_SIZE -4
62# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
63# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
64# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
65# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
66# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
67#endif
Ian Campbellcba69ee2014-05-05 11:52:26 +010068
Paul Kocialkowski8a65f692015-05-16 19:52:11 +020069/* CPU */
70#define CONFIG_SYS_CACHELINE_SIZE 64
71
Hans de Goedee049fe22015-05-19 22:12:31 +020072/*
73 * The DRAM Base differs between some models. We cannot use macros for the
74 * CONFIG_FOO defines which contain the DRAM base address since they end
75 * up unexpanded in include/autoconf.mk .
76 *
77 * So we have to have this #ifdef #else #endif block for these.
78 */
79#ifdef CONFIG_MACH_SUN9I
80#define SDRAM_OFFSET(x) 0x2##x
81#define CONFIG_SYS_SDRAM_BASE 0x20000000
82#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */
83#define CONFIG_SYS_TEXT_BASE 0x2a000000
84#define CONFIG_PRE_CON_BUF_ADDR 0x2f000000
85#define CONFIG_SYS_SPL_MALLOC_START 0x2ff00000
86#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
87#else
88#define SDRAM_OFFSET(x) 0x4##x
Ian Campbellcba69ee2014-05-05 11:52:26 +010089#define CONFIG_SYS_SDRAM_BASE 0x40000000
Hans de Goedee049fe22015-05-19 22:12:31 +020090#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
91#define CONFIG_SYS_TEXT_BASE 0x4a000000
92#define CONFIG_PRE_CON_BUF_ADDR 0x4f000000
93#define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000
94#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
95#endif
96
97#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
98#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */
99
Hans de Goede77fe9882015-05-20 15:27:16 +0200100#ifdef CONFIG_MACH_SUN9I
101/*
102 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
103 * slightly bigger. Note that it is possible to map the first 32 KiB of the
104 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
105 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
106 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
107 */
108#define CONFIG_SYS_INIT_RAM_ADDR 0x10000
109#define CONFIG_SYS_INIT_RAM_SIZE 0x0a000 /* 40 KiB */
110#else
Ian Campbellcba69ee2014-05-05 11:52:26 +0100111#define CONFIG_SYS_INIT_RAM_ADDR 0x0
112#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
Hans de Goede77fe9882015-05-20 15:27:16 +0200113#endif
Ian Campbellcba69ee2014-05-05 11:52:26 +0100114
115#define CONFIG_SYS_INIT_SP_OFFSET \
116 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
117#define CONFIG_SYS_INIT_SP_ADDR \
118 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
119
120#define CONFIG_NR_DRAM_BANKS 1
121#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
122#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
123
Ian Campbella6e50a82014-07-18 20:38:41 +0100124#ifdef CONFIG_AHCI
125#define CONFIG_LIBATA
126#define CONFIG_SCSI_AHCI
127#define CONFIG_SCSI_AHCI_PLAT
128#define CONFIG_SUNXI_AHCI
Bernhard Nortmann0751b132015-06-10 10:51:40 +0200129#define CONFIG_SYS_64BIT_LBA
Ian Campbella6e50a82014-07-18 20:38:41 +0100130#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
131#define CONFIG_SYS_SCSI_MAX_LUN 1
132#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
133 CONFIG_SYS_SCSI_MAX_LUN)
134#define CONFIG_CMD_SCSI
135#endif
136
Ian Campbellcba69ee2014-05-05 11:52:26 +0100137#define CONFIG_CMD_MEMORY
Ian Campbellcba69ee2014-05-05 11:52:26 +0100138
139#define CONFIG_SETUP_MEMORY_TAGS
140#define CONFIG_CMDLINE_TAG
141#define CONFIG_INITRD_TAG
Paul Kocialkowski9f852212015-03-28 18:35:36 +0100142#define CONFIG_SERIAL_TAG
Ian Campbellcba69ee2014-05-05 11:52:26 +0100143
Ian Campbelle24ea552014-05-05 14:42:31 +0100144/* mmc config */
Chen-Yu Tsaiff2b47f2014-10-22 16:47:42 +0800145#if !defined(CONFIG_UART0_PORT_F)
Ian Campbelle24ea552014-05-05 14:42:31 +0100146#define CONFIG_MMC
147#define CONFIG_GENERIC_MMC
148#define CONFIG_CMD_MMC
149#define CONFIG_MMC_SUNXI
150#define CONFIG_MMC_SUNXI_SLOT 0
Daniel Kochmańskif76eba32015-05-26 17:00:42 +0200151#if !defined(CONFIG_SPL_NAND_SUPPORT)
Ian Campbelle24ea552014-05-05 14:42:31 +0100152#define CONFIG_ENV_IS_IN_MMC
153#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */
Daniel Kochmańskif76eba32015-05-26 17:00:42 +0200154#endif /* CONFIG_SPL_NAND_SUPPORT */
Chen-Yu Tsaiff2b47f2014-10-22 16:47:42 +0800155#endif
Ian Campbelle24ea552014-05-05 14:42:31 +0100156
Ian Campbellcba69ee2014-05-05 11:52:26 +0100157/* 4MB of malloc() pool */
158#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20))
159
160/*
161 * Miscellaneous configurable options
162 */
163#define CONFIG_CMD_ECHO
Ian Campbell06beadb2014-10-07 14:20:30 +0100164#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
165#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
Ian Campbellcba69ee2014-05-05 11:52:26 +0100166#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
167#define CONFIG_SYS_GENERIC_BOARD
168
169/* Boot Argument Buffer Size */
170#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
171
Ian Campbellcba69ee2014-05-05 11:52:26 +0100172/* standalone support */
Hans de Goedee049fe22015-05-19 22:12:31 +0200173#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
Ian Campbellcba69ee2014-05-05 11:52:26 +0100174
Ian Campbellcba69ee2014-05-05 11:52:26 +0100175/* baudrate */
176#define CONFIG_BAUDRATE 115200
177
178/* The stack sizes are set up in start.S using the settings below */
179#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
180
181/* FLASH and environment organization */
182
183#define CONFIG_SYS_NO_FLASH
184
185#define CONFIG_SYS_MONITOR_LEN (512 << 10) /* 512 KiB */
186#define CONFIG_IDENT_STRING " Allwinner Technology"
187
Ian Campbelle24ea552014-05-05 14:42:31 +0100188#define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */
Ian Campbellcba69ee2014-05-05 11:52:26 +0100189#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
190
Ian Campbellcba69ee2014-05-05 11:52:26 +0100191#include <config_cmd_default.h>
Hans de Goedeb9fb3b92014-08-01 09:19:55 +0200192#undef CONFIG_CMD_FPGA
Ian Campbellcba69ee2014-05-05 11:52:26 +0100193
194#define CONFIG_FAT_WRITE /* enable write access */
195
196#define CONFIG_SPL_FRAMEWORK
197#define CONFIG_SPL_LIBCOMMON_SUPPORT
198#define CONFIG_SPL_SERIAL_SUPPORT
199#define CONFIG_SPL_LIBGENERIC_SUPPORT
200
Simon Glass942cb0b2015-02-07 10:47:30 -0700201#define CONFIG_SPL_BOARD_LOAD_IMAGE
202
Ian Campbell50827a52014-05-05 11:52:30 +0100203#define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */
204#define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */
205
206#define CONFIG_SPL_LIBDISK_SUPPORT
Siarhei Siamashkaf0ce28e2014-12-25 02:34:47 +0200207
208#if !defined(CONFIG_UART0_PORT_F)
Ian Campbell50827a52014-05-05 11:52:30 +0100209#define CONFIG_SPL_MMC_SUPPORT
Siarhei Siamashkaf0ce28e2014-12-25 02:34:47 +0200210#endif
Ian Campbell50827a52014-05-05 11:52:30 +0100211
212#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
213
214#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */
215#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
216
Ian Campbellcba69ee2014-05-05 11:52:26 +0100217/* end of 32 KiB in sram */
218#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
219#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
Ian Campbellcba69ee2014-05-05 11:52:26 +0100220
Hans de Goede66203772014-06-13 22:55:49 +0200221/* I2C */
Hans de Goedead406102015-01-23 15:28:22 +0100222#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER
Hans de Goede66203772014-06-13 22:55:49 +0200223#define CONFIG_SPL_I2C_SUPPORT
Hans de Goedead406102015-01-23 15:28:22 +0100224#endif
225
Paul Kocialkowski6c739c52015-04-10 23:09:52 +0200226#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
227 defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
228 defined CONFIG_I2C4_ENABLE
Hans de Goede8b2db322015-04-23 17:47:22 +0200229#define CONFIG_SYS_I2C
Hans de Goede66203772014-06-13 22:55:49 +0200230#define CONFIG_SYS_I2C_MVTWSI
231#define CONFIG_SYS_I2C_SPEED 400000
232#define CONFIG_SYS_I2C_SLAVE 0x7f
Hans de Goede8b2db322015-04-23 17:47:22 +0200233#define CONFIG_CMD_I2C
234#endif
Hans de Goede55410082015-02-16 17:23:25 +0100235
236#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
237#define CONFIG_SYS_I2C_SOFT
238#define CONFIG_SYS_I2C_SOFT_SPEED 50000
239#define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
Hans de Goede55410082015-02-16 17:23:25 +0100240/* We use pin names in Kconfig and sunxi_name_to_gpio() */
241#define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda
242#define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl
243#ifndef __ASSEMBLY__
244extern int soft_i2c_gpio_sda;
245extern int soft_i2c_gpio_scl;
246#endif
Hans de Goede1fc42012015-03-07 12:00:02 +0100247#define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */
248#define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */
249#else
250#define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */
251#define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */
Hans de Goede55410082015-02-16 17:23:25 +0100252#endif
253
Henrik Nordstrom14bc66b2014-06-13 22:55:50 +0200254/* PMU */
255#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER
256#define CONFIG_SPL_POWER_SUPPORT
257#endif
258
Hans de Goedef84269c2014-06-09 11:36:58 +0200259#ifndef CONFIG_CONS_INDEX
Ian Campbellcba69ee2014-05-05 11:52:26 +0100260#define CONFIG_CONS_INDEX 1 /* UART0 */
Hans de Goedef84269c2014-06-09 11:36:58 +0200261#endif
Ian Campbellcba69ee2014-05-05 11:52:26 +0100262
Hans de Goedef3133962015-02-20 16:55:12 +0100263#if CONFIG_CONS_INDEX == 1
264#ifdef CONFIG_MACH_SUN9I
265#define OF_STDOUT_PATH "/soc/serial@07000000:115200"
266#else
267#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200"
268#endif
269#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
270#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200"
Laurent Itti5cd83b112015-05-05 17:02:00 -0700271#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
272#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200"
Hans de Goedef3133962015-02-20 16:55:12 +0100273#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
274#define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200"
275#else
276#error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
277#endif
278
Ian Campbellabce2c62014-06-05 19:00:15 +0100279/* GPIO */
280#define CONFIG_SUNXI_GPIO
Hans de Goedecd821132014-10-02 20:29:26 +0200281#define CONFIG_SPL_GPIO_SUPPORT
Ian Campbellabce2c62014-06-05 19:00:15 +0100282#define CONFIG_CMD_GPIO
283
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200284#ifdef CONFIG_VIDEO
285/*
Hans de Goede5633a292015-02-02 17:13:29 +0100286 * The amount of RAM to keep free at the top of RAM when relocating u-boot,
287 * to use as framebuffer. This must be a multiple of 4096.
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200288 */
Hans de Goede5633a292015-02-02 17:13:29 +0100289#define CONFIG_SUNXI_MAX_FB_SIZE (9 << 20)
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200290
Luc Verhaegen2d7a0842014-08-13 07:55:07 +0200291/* Do we want to initialize a simple FB? */
292#define CONFIG_VIDEO_DT_SIMPLEFB
293
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200294#define CONFIG_VIDEO_SUNXI
295
296#define CONFIG_CFB_CONSOLE
297#define CONFIG_VIDEO_SW_CURSOR
298#define CONFIG_VIDEO_LOGO
Hans de Goedebe8ec632014-12-19 13:46:33 +0100299#define CONFIG_VIDEO_STD_TIMINGS
Hans de Goede75481602014-12-19 16:05:12 +0100300#define CONFIG_I2C_EDID
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200301
302/* allow both serial and cfb console. */
303#define CONFIG_CONSOLE_MUX
304/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
305#define CONFIG_VGA_AS_SINGLE_DEVICE
306
Luc Verhaegen2d7a0842014-08-13 07:55:07 +0200307/* To be able to hook simplefb into dt */
308#ifdef CONFIG_VIDEO_DT_SIMPLEFB
309#define CONFIG_OF_BOARD_SETUP
310#endif
311
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200312#endif /* CONFIG_VIDEO */
313
Hans de Goedec26fb9d2014-06-09 11:37:00 +0200314/* Ethernet support */
315#ifdef CONFIG_SUNXI_EMAC
Hans de Goede8145dea2015-04-16 21:47:06 +0200316#define CONFIG_PHY_ADDR 1
Hans de Goedec26fb9d2014-06-09 11:37:00 +0200317#define CONFIG_MII /* MII PHY management */
Hans de Goede8145dea2015-04-16 21:47:06 +0200318#define CONFIG_PHYLIB
Hans de Goedec26fb9d2014-06-09 11:37:00 +0200319#endif
320
Ian Campbell58358232014-05-05 11:52:28 +0100321#ifdef CONFIG_SUNXI_GMAC
Ian Campbell58358232014-05-05 11:52:28 +0100322#define CONFIG_DW_AUTONEG
323#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
324#define CONFIG_PHY_ADDR 1
325#define CONFIG_MII /* MII PHY management */
326#define CONFIG_PHYLIB
327#endif
328
Roman Byshko3584f302014-07-24 22:54:22 +0200329#ifdef CONFIG_USB_EHCI
Hans de Goede6a72e802015-05-10 14:10:27 +0200330#define CONFIG_USB_OHCI_NEW
331#define CONFIG_USB_OHCI_SUNXI
332#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
Roman Byshko3584f302014-07-24 22:54:22 +0200333#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
Hans de Goede1a800f72015-01-11 17:17:00 +0100334#endif
335
336#ifdef CONFIG_USB_MUSB_SUNXI
337#define CONFIG_MUSB_HOST
338#define CONFIG_MUSB_PIO_ONLY
339#endif
340
341#if defined CONFIG_USB_EHCI || defined CONFIG_USB_MUSB_SUNXI
342#define CONFIG_CMD_USB
Roman Byshko3584f302014-07-24 22:54:22 +0200343#define CONFIG_USB_STORAGE
344#endif
345
Hans de Goede86b49092014-09-18 21:03:34 +0200346#ifdef CONFIG_USB_KEYBOARD
347#define CONFIG_CONSOLE_MUX
348#define CONFIG_PREBOOT
349#define CONFIG_SYS_STDIO_DEREGISTER
Hans de Goedeeab94332015-05-13 14:42:18 +0200350#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
Hans de Goede86b49092014-09-18 21:03:34 +0200351#endif
352
Ian Campbellcba69ee2014-05-05 11:52:26 +0100353#if !defined CONFIG_ENV_IS_IN_MMC && \
354 !defined CONFIG_ENV_IS_IN_NAND && \
355 !defined CONFIG_ENV_IS_IN_FAT && \
356 !defined CONFIG_ENV_IS_IN_SPI_FLASH
357#define CONFIG_ENV_IS_NOWHERE
358#endif
359
Daniel Kochmańskif76eba32015-05-26 17:00:42 +0200360#ifdef CONFIG_SPL_NAND_SUPPORT
361#define CONFIG_NAND
362#define CONFIG_SYS_NAND_SELF_INIT
363#define CONFIG_NAND_SUNXI
364#define CONFIG_CMD_SPL_WRITE_SIZE 0x000400
365#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x008000
366
367/* \todo Make these parameterisable in kernel config ? */
368#define CONFIG_NAND_SUNXI_PAGE_SIZE 8192
369#define CONFIG_NAND_SUNXI_ECC_STEP 1024
370#define CONFIG_NAND_SUNXI_ECC_STRENGTH 40
371#define CONFIG_NAND_SUNXI_ADDR_CYCLES 5
372
373#ifndef CONFIG_NAND_SUNXI_GPC_PORTS
374#error "No NAND GPC ports defined, NAND unsupported"
375#endif
376#endif /* CONFIG_SPL_NAND_SUPPORT */
377
Jonathan Liub41d7d02014-06-14 08:59:09 +0200378#define CONFIG_MISC_INIT_R
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200379#define CONFIG_SYS_CONSOLE_IS_IN_ENV
Jonathan Liub41d7d02014-06-14 08:59:09 +0200380
Ian Campbellcba69ee2014-05-05 11:52:26 +0100381#ifndef CONFIG_SPL_BUILD
382#include <config_distro_defaults.h>
Hans de Goede2ec3a612014-07-31 23:04:45 +0200383
Siarhei Siamashkaa7925072015-01-08 09:02:32 +0200384/* Enable pre-console buffer to get complete log on the VGA console */
385#define CONFIG_PRE_CONSOLE_BUFFER
Hans de Goedea8552c72015-05-05 13:13:36 +0200386#define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 80*25 screens */
Siarhei Siamashkaa7925072015-01-08 09:02:32 +0200387
Hans de Goede8c95c552014-12-24 16:08:30 +0100388/*
389 * 240M RAM (256M minimum minus space for the framebuffer),
390 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
391 * 1M script, 1M pxe and the ramdisk at the end.
392 */
Hans de Goede846e3252014-08-01 09:37:58 +0200393#define MEM_LAYOUT_ENV_SETTINGS \
Hans de Goede8c95c552014-12-24 16:08:30 +0100394 "bootm_size=0xf000000\0" \
Hans de Goedee049fe22015-05-19 22:12:31 +0200395 "kernel_addr_r=" __stringify(SDRAM_OFFSET(2000000)) "\0" \
396 "fdt_addr_r=" __stringify(SDRAM_OFFSET(3000000)) "\0" \
397 "scriptaddr=" __stringify(SDRAM_OFFSET(3100000)) "\0" \
398 "pxefile_addr_r=" __stringify(SDRAM_OFFSET(3200000)) "\0" \
399 "ramdisk_addr_r=" __stringify(SDRAM_OFFSET(3300000)) "\0"
Hans de Goede846e3252014-08-01 09:37:58 +0200400
Chen-Yu Tsai41f8e9f2014-10-07 15:11:49 +0800401#ifdef CONFIG_MMC
402#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
403#else
404#define BOOT_TARGET_DEVICES_MMC(func)
405#endif
406
Hans de Goede2ec3a612014-07-31 23:04:45 +0200407#ifdef CONFIG_AHCI
408#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
409#else
410#define BOOT_TARGET_DEVICES_SCSI(func)
411#endif
412
Chen-Yu Tsai859b3f12014-10-03 20:16:22 +0800413#ifdef CONFIG_USB_EHCI
414#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
415#else
416#define BOOT_TARGET_DEVICES_USB(func)
417#endif
418
Hans de Goede2ec3a612014-07-31 23:04:45 +0200419#define BOOT_TARGET_DEVICES(func) \
Chen-Yu Tsai41f8e9f2014-10-07 15:11:49 +0800420 BOOT_TARGET_DEVICES_MMC(func) \
Hans de Goede2ec3a612014-07-31 23:04:45 +0200421 BOOT_TARGET_DEVICES_SCSI(func) \
Chen-Yu Tsai859b3f12014-10-03 20:16:22 +0800422 BOOT_TARGET_DEVICES_USB(func) \
Hans de Goede2ec3a612014-07-31 23:04:45 +0200423 func(PXE, pxe, na) \
424 func(DHCP, dhcp, na)
425
426#include <config_distro_bootcmd.h>
427
Hans de Goede86b49092014-09-18 21:03:34 +0200428#ifdef CONFIG_USB_KEYBOARD
429#define CONSOLE_STDIN_SETTINGS \
430 "preboot=usb start\0" \
431 "stdin=serial,usbkbd\0"
432#else
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200433#define CONSOLE_STDIN_SETTINGS \
434 "stdin=serial\0"
Hans de Goede86b49092014-09-18 21:03:34 +0200435#endif
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200436
437#ifdef CONFIG_VIDEO
438#define CONSOLE_STDOUT_SETTINGS \
439 "stdout=serial,vga\0" \
440 "stderr=serial,vga\0"
441#else
442#define CONSOLE_STDOUT_SETTINGS \
443 "stdout=serial\0" \
444 "stderr=serial\0"
445#endif
446
447#define CONSOLE_ENV_SETTINGS \
448 CONSOLE_STDIN_SETTINGS \
449 CONSOLE_STDOUT_SETTINGS
450
Hans de Goede2ec3a612014-07-31 23:04:45 +0200451#define CONFIG_EXTRA_ENV_SETTINGS \
Luc Verhaegen7f2c5212014-08-13 07:55:06 +0200452 CONSOLE_ENV_SETTINGS \
Hans de Goede846e3252014-08-01 09:37:58 +0200453 MEM_LAYOUT_ENV_SETTINGS \
Hans de Goede25acd332015-04-18 23:32:23 +0200454 "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
Hans de Goede846e3252014-08-01 09:37:58 +0200455 "console=ttyS0,115200\0" \
Hans de Goede2ec3a612014-07-31 23:04:45 +0200456 BOOTENV
457
458#else /* ifndef CONFIG_SPL_BUILD */
459#define CONFIG_EXTRA_ENV_SETTINGS
Ian Campbellcba69ee2014-05-05 11:52:26 +0100460#endif
461
462#endif /* _SUNXI_COMMON_CONFIG_H */