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Ian Campbellcba69ee2014-05-05 11:52:26 +01001/*
2 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3 *
4 * (C) Copyright 2007-2011
5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6 * Tom Cubie <tangliang@allwinnertech.com>
7 *
8 * Configuration settings for the Allwinner sunxi series of boards.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef _SUNXI_COMMON_CONFIG_H
14#define _SUNXI_COMMON_CONFIG_H
15
16/*
17 * High Level Configuration Options
18 */
19#define CONFIG_SUNXI /* sunxi family */
Ian Campbell50827a52014-05-05 11:52:30 +010020#ifdef CONFIG_SPL_BUILD
21#ifndef CONFIG_SPL_FEL
22#define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */
23#endif
24#endif
Ian Campbellcba69ee2014-05-05 11:52:26 +010025
26#include <asm/arch/cpu.h> /* get chip and board defs */
27
28#define CONFIG_SYS_TEXT_BASE 0x4a000000
29
30/*
31 * Display CPU information
32 */
33#define CONFIG_DISPLAY_CPUINFO
34
35/* Serial & console */
36#define CONFIG_SYS_NS16550
37#define CONFIG_SYS_NS16550_SERIAL
38/* ns16550 reg in the low bits of cpu reg */
39#define CONFIG_SYS_NS16550_REG_SIZE -4
40#define CONFIG_SYS_NS16550_CLK 24000000
41#define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
42#define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
43#define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
44#define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
45
46/* DRAM Base */
47#define CONFIG_SYS_SDRAM_BASE 0x40000000
48#define CONFIG_SYS_INIT_RAM_ADDR 0x0
49#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
50
51#define CONFIG_SYS_INIT_SP_OFFSET \
52 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
53#define CONFIG_SYS_INIT_SP_ADDR \
54 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
55
56#define CONFIG_NR_DRAM_BANKS 1
57#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
58#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
59
Ian Campbella6e50a82014-07-18 20:38:41 +010060#ifdef CONFIG_AHCI
61#define CONFIG_LIBATA
62#define CONFIG_SCSI_AHCI
63#define CONFIG_SCSI_AHCI_PLAT
64#define CONFIG_SUNXI_AHCI
65#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
66#define CONFIG_SYS_SCSI_MAX_LUN 1
67#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
68 CONFIG_SYS_SCSI_MAX_LUN)
69#define CONFIG_CMD_SCSI
70#endif
71
Ian Campbellcba69ee2014-05-05 11:52:26 +010072#define CONFIG_CMD_MEMORY
73#define CONFIG_CMD_SETEXPR
74
75#define CONFIG_SETUP_MEMORY_TAGS
76#define CONFIG_CMDLINE_TAG
77#define CONFIG_INITRD_TAG
78
Ian Campbelle24ea552014-05-05 14:42:31 +010079/* mmc config */
80#define CONFIG_MMC
81#define CONFIG_GENERIC_MMC
82#define CONFIG_CMD_MMC
83#define CONFIG_MMC_SUNXI
84#define CONFIG_MMC_SUNXI_SLOT 0
Ian Campbelle24ea552014-05-05 14:42:31 +010085#define CONFIG_ENV_IS_IN_MMC
86#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */
87
Ian Campbellcba69ee2014-05-05 11:52:26 +010088/* 4MB of malloc() pool */
89#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20))
90
91/*
92 * Miscellaneous configurable options
93 */
94#define CONFIG_CMD_ECHO
95#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
96#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
97#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
98#define CONFIG_SYS_GENERIC_BOARD
99
100/* Boot Argument Buffer Size */
101#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
102
103#define CONFIG_SYS_LOAD_ADDR 0x48000000 /* default load address */
104
105/* standalone support */
106#define CONFIG_STANDALONE_LOAD_ADDR 0x48000000
107
108#define CONFIG_SYS_HZ 1000
109
110/* baudrate */
111#define CONFIG_BAUDRATE 115200
112
113/* The stack sizes are set up in start.S using the settings below */
114#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
115
116/* FLASH and environment organization */
117
118#define CONFIG_SYS_NO_FLASH
119
120#define CONFIG_SYS_MONITOR_LEN (512 << 10) /* 512 KiB */
121#define CONFIG_IDENT_STRING " Allwinner Technology"
122
Ian Campbelle24ea552014-05-05 14:42:31 +0100123#define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */
Ian Campbellcba69ee2014-05-05 11:52:26 +0100124#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
125
126#define CONFIG_EXTRA_ENV_SETTINGS \
127 "bootm_size=0x10000000\0"
128
129#define CONFIG_SYS_BOOT_GET_CMDLINE
130
131#include <config_cmd_default.h>
132
133#define CONFIG_FAT_WRITE /* enable write access */
134
135#define CONFIG_SPL_FRAMEWORK
136#define CONFIG_SPL_LIBCOMMON_SUPPORT
137#define CONFIG_SPL_SERIAL_SUPPORT
138#define CONFIG_SPL_LIBGENERIC_SUPPORT
139
Ian Campbell50827a52014-05-05 11:52:30 +0100140#ifdef CONFIG_SPL_FEL
141
Ian Campbellcba69ee2014-05-05 11:52:26 +0100142#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds"
143#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi"
144#define CONFIG_SPL_TEXT_BASE 0x2000
145#define CONFIG_SPL_MAX_SIZE 0x4000 /* 16 KiB */
Ian Campbell50827a52014-05-05 11:52:30 +0100146
147#else /* CONFIG_SPL */
148
149#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
150#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KiB */
151
152#define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */
153#define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */
154
155#define CONFIG_SPL_LIBDISK_SUPPORT
156#define CONFIG_SPL_MMC_SUPPORT
157
158#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
159
160#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */
161#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
162
163#endif /* CONFIG_SPL */
164
Ian Campbellcba69ee2014-05-05 11:52:26 +0100165/* end of 32 KiB in sram */
166#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
167#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
168#define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000
169#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */
170
171#undef CONFIG_CMD_FPGA
172#undef CONFIG_CMD_NET
173#undef CONFIG_CMD_NFS
174
Hans de Goede66203772014-06-13 22:55:49 +0200175/* I2C */
176#define CONFIG_SPL_I2C_SUPPORT
177#define CONFIG_SYS_I2C
178#define CONFIG_SYS_I2C_MVTWSI
179#define CONFIG_SYS_I2C_SPEED 400000
180#define CONFIG_SYS_I2C_SLAVE 0x7f
181#define CONFIG_CMD_I2C
182
Henrik Nordstrom14bc66b2014-06-13 22:55:50 +0200183/* PMU */
184#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER
185#define CONFIG_SPL_POWER_SUPPORT
186#endif
187
Hans de Goedef84269c2014-06-09 11:36:58 +0200188#ifndef CONFIG_CONS_INDEX
Ian Campbellcba69ee2014-05-05 11:52:26 +0100189#define CONFIG_CONS_INDEX 1 /* UART0 */
Hans de Goedef84269c2014-06-09 11:36:58 +0200190#endif
Ian Campbellcba69ee2014-05-05 11:52:26 +0100191
Ian Campbellabce2c62014-06-05 19:00:15 +0100192/* GPIO */
193#define CONFIG_SUNXI_GPIO
194#define CONFIG_CMD_GPIO
195
Hans de Goedec26fb9d2014-06-09 11:37:00 +0200196/* Ethernet support */
197#ifdef CONFIG_SUNXI_EMAC
198#define CONFIG_MII /* MII PHY management */
199#endif
200
Ian Campbell58358232014-05-05 11:52:28 +0100201#ifdef CONFIG_SUNXI_GMAC
202#define CONFIG_DESIGNWARE_ETH /* GMAC can use designware driver */
203#define CONFIG_DW_AUTONEG
204#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
205#define CONFIG_PHY_ADDR 1
206#define CONFIG_MII /* MII PHY management */
207#define CONFIG_PHYLIB
208#endif
209
210#ifdef CONFIG_CMD_NET
211#define CONFIG_CMD_NFS
212#define CONFIG_CMD_DNS
213#define CONFIG_NETCONSOLE
214#define CONFIG_BOOTP_DNS2
215#define CONFIG_BOOTP_SEND_HOSTNAME
216#endif
217
Roman Byshko3584f302014-07-24 22:54:22 +0200218#ifdef CONFIG_USB_EHCI
219#define CONFIG_CMD_USB
220#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
221#define CONFIG_USB_STORAGE
222#endif
223
Ian Campbellcba69ee2014-05-05 11:52:26 +0100224#if !defined CONFIG_ENV_IS_IN_MMC && \
225 !defined CONFIG_ENV_IS_IN_NAND && \
226 !defined CONFIG_ENV_IS_IN_FAT && \
227 !defined CONFIG_ENV_IS_IN_SPI_FLASH
228#define CONFIG_ENV_IS_NOWHERE
229#endif
230
Jonathan Liub41d7d02014-06-14 08:59:09 +0200231#define CONFIG_MISC_INIT_R
232
Ian Campbellcba69ee2014-05-05 11:52:26 +0100233#ifndef CONFIG_SPL_BUILD
234#include <config_distro_defaults.h>
235#endif
236
237#endif /* _SUNXI_COMMON_CONFIG_H */