blob: 6acc416899bf139ebcf701001a7e665f09cd46f4 [file] [log] [blame]
Vladimir Zapolskiy463ec1c2012-04-19 04:33:10 +00001/*
2 * Embest/Timll DevKit3250 board support
3 *
4 * Copyright (C) 2011 Vladimir Zapolskiy <vz@mleia.com>
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Vladimir Zapolskiy463ec1c2012-04-19 04:33:10 +00007 */
8
9#include <common.h>
10#include <asm/arch/sys_proto.h>
11#include <asm/arch/cpu.h>
12#include <asm/arch/emc.h>
13
14DECLARE_GLOBAL_DATA_PTR;
15
16static struct emc_regs *emc = (struct emc_regs *)EMC_BASE;
17
18int board_early_init_f(void)
19{
20 lpc32xx_uart_init(CONFIG_SYS_LPC32XX_UART);
21
22 return 0;
23}
24
25int board_init(void)
26{
27 /* adress of boot parameters */
28 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
29
30#ifdef CONFIG_SYS_FLASH_CFI
31 /* Use 16-bit memory interface for NOR Flash */
32 emc->stat[0].config = EMC_STAT_CONFIG_PB | EMC_STAT_CONFIG_16BIT;
33
34 /* Change the NOR timings to optimum value to get maximum bandwidth */
35 emc->stat[0].waitwen = EMC_STAT_WAITWEN(1);
36 emc->stat[0].waitoen = EMC_STAT_WAITOEN(1);
37 emc->stat[0].waitrd = EMC_STAT_WAITRD(12);
38 emc->stat[0].waitpage = EMC_STAT_WAITPAGE(12);
39 emc->stat[0].waitwr = EMC_STAT_WAITWR(5);
40 emc->stat[0].waitturn = EMC_STAT_WAITTURN(2);
41#endif
42
43 return 0;
44}
45
46int dram_init(void)
47{
48 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
49 CONFIG_SYS_SDRAM_SIZE);
50
51 return 0;
52}