| Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 2 | /* |
| Patrice Chotard | 1537d38 | 2017-10-23 09:53:59 +0200 | [diff] [blame] | 3 | * Copyright (C) 2014, STMicroelectronics - All Rights Reserved |
| 4 | * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. |
| Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __CONFIG_STV0991_H |
| 8 | #define __CONFIG_STV0991_H |
| Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 9 | #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH |
| Vikas Manocha | 2ce4eaf | 2014-11-18 10:42:23 -0800 | [diff] [blame] | 10 | |
| Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 11 | /* ram memory-related information */ |
| Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 12 | #define PHYS_SDRAM_1 0x00000000 |
| 13 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 14 | #define PHYS_SDRAM_1_SIZE 0x00198000 |
| 15 | |
| Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 16 | /* user interface */ |
| Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 17 | |
| 18 | /* MISC */ |
| Vikas Manocha | 498b7c2 | 2014-12-01 12:27:53 -0800 | [diff] [blame] | 19 | #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 |
| Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 20 | #define CONFIG_SYS_INIT_RAM_ADDR 0x00190000 |
| Bin Meng | a187559 | 2016-02-05 19:30:11 -0800 | [diff] [blame] | 21 | /* U-Boot Load Address */ |
| Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 22 | |
| Vikas Manocha | c55e759 | 2014-11-18 10:42:24 -0800 | [diff] [blame] | 23 | /* Misc configuration */ |
| Vikas Manocha | c55e759 | 2014-11-18 10:42:24 -0800 | [diff] [blame] | 24 | |
| Vikas Manocha | 9fa32b1 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 25 | #endif /* __CONFIG_H */ |