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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Akshay Saraswat79043d82014-11-13 22:38:17 +05302/*
3 * Copyright (C) 2014 Samsung Electronics
4 *
5 * Configuration settings for the SAMSUNG/GOOGLE PEACH-PI board.
Akshay Saraswat79043d82014-11-13 22:38:17 +05306 */
7
8#ifndef __CONFIG_PEACH_PI_H
9#define __CONFIG_PEACH_PI_H
10
Sjoerd Simonsd7e1f022015-03-12 22:33:29 +010011#define MEM_LAYOUT_ENV_SETTINGS \
12 "bootm_size=0x10000000\0" \
13 "kernel_addr_r=0x22000000\0" \
14 "fdt_addr_r=0x23000000\0" \
15 "ramdisk_addr_r=0x23300000\0" \
16 "scriptaddr=0x30000000\0" \
17 "pxefile_addr_r=0x31000000\0"
18
Akshay Saraswat79043d82014-11-13 22:38:17 +053019#include <configs/exynos5420-common.h>
20#include <configs/exynos5-dt-common.h>
Simon Glassbf637ea2015-08-03 08:19:29 -060021#include <configs/exynos5-common.h>
Akshay Saraswat79043d82014-11-13 22:38:17 +053022
Hyungwon Hwang43900da2014-12-12 14:45:44 +090023#define CONFIG_SYS_SDRAM_BASE 0x20000000
Hyungwon Hwang43900da2014-12-12 14:45:44 +090024
Akshay Saraswat79043d82014-11-13 22:38:17 +053025#define CONFIG_POWER_TPS65090_EC
Akshay Saraswat79043d82014-11-13 22:38:17 +053026
Akshay Saraswat43581c82014-11-13 22:38:19 +053027/* DRAM Memory Banks */
Akshay Saraswat43581c82014-11-13 22:38:19 +053028#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
29
Akshay Saraswat79043d82014-11-13 22:38:17 +053030#endif /* __CONFIG_PEACH_PI_H */