Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Overview: |
| 3 | * Platform independend driver for NDFC (NanD Flash Controller) |
Stefan Roese | 5d841fa | 2009-05-20 10:58:01 +0200 | [diff] [blame^] | 4 | * integrated into IBM/AMCC PPC4xx cores |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 5 | * |
Stefan Roese | 5d841fa | 2009-05-20 10:58:01 +0200 | [diff] [blame^] | 6 | * (C) Copyright 2006-2009 |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 7 | * Stefan Roese, DENX Software Engineering, sr@denx.de. |
| 8 | * |
| 9 | * Based on original work by |
| 10 | * Thomas Gleixner |
| 11 | * Copyright 2006 IBM |
| 12 | * |
| 13 | * See file CREDITS for list of people who contributed to this |
| 14 | * project. |
| 15 | * |
| 16 | * This program is free software; you can redistribute it and/or |
| 17 | * modify it under the terms of the GNU General Public License as |
| 18 | * published by the Free Software Foundation; either version 2 of |
| 19 | * the License, or (at your option) any later version. |
| 20 | * |
| 21 | * This program is distributed in the hope that it will be useful, |
| 22 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 23 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 24 | * GNU General Public License for more details. |
| 25 | * |
| 26 | * You should have received a copy of the GNU General Public License |
| 27 | * along with this program; if not, write to the Free Software |
| 28 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 29 | * MA 02111-1307 USA |
| 30 | */ |
| 31 | |
| 32 | #include <common.h> |
| 33 | |
Jean-Christophe PLAGNIOL-VILLARD | cc4a0ce | 2008-08-13 01:40:43 +0200 | [diff] [blame] | 34 | #if defined(CONFIG_CMD_NAND) && !defined(CONFIG_NAND_LEGACY) && \ |
Stefan Roese | 5d841fa | 2009-05-20 10:58:01 +0200 | [diff] [blame^] | 35 | defined(CONFIG_NAND_NDFC) |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 36 | |
| 37 | #include <nand.h> |
| 38 | #include <linux/mtd/ndfc.h> |
Stefan Roese | 91da09c | 2007-06-01 15:15:12 +0200 | [diff] [blame] | 39 | #include <linux/mtd/nand_ecc.h> |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 40 | #include <asm/processor.h> |
Stefan Roese | 91da09c | 2007-06-01 15:15:12 +0200 | [diff] [blame] | 41 | #include <asm/io.h> |
Stefan Roese | 6f3dfc1 | 2007-05-22 12:46:10 +0200 | [diff] [blame] | 42 | #include <ppc4xx.h> |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 43 | |
Stefan Roese | 3df2ece | 2008-01-05 16:47:58 +0100 | [diff] [blame] | 44 | /* |
| 45 | * We need to store the info, which chip-select (CS) is used for the |
| 46 | * chip number. For example on Sequoia NAND chip #0 uses |
| 47 | * CS #3. |
| 48 | */ |
| 49 | static int ndfc_cs[NDFC_MAX_BANKS]; |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 50 | |
William Juul | cfa460a | 2007-10-31 13:53:06 +0100 | [diff] [blame] | 51 | static void ndfc_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 52 | { |
William Juul | 5e1dae5 | 2007-11-09 13:32:30 +0100 | [diff] [blame] | 53 | struct nand_chip *this = mtd->priv; |
Stefan Roese | 3df2ece | 2008-01-05 16:47:58 +0100 | [diff] [blame] | 54 | ulong base = (ulong) this->IO_ADDR_W & 0xffffff00; |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 55 | |
Stefan Roese | 3df2ece | 2008-01-05 16:47:58 +0100 | [diff] [blame] | 56 | if (cmd == NAND_CMD_NONE) |
| 57 | return; |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 58 | |
Stefan Roese | 3df2ece | 2008-01-05 16:47:58 +0100 | [diff] [blame] | 59 | if (ctrl & NAND_CLE) |
| 60 | out_8((u8 *)(base + NDFC_CMD), cmd & 0xFF); |
| 61 | else |
| 62 | out_8((u8 *)(base + NDFC_ALE), cmd & 0xFF); |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 63 | } |
| 64 | |
| 65 | static int ndfc_dev_ready(struct mtd_info *mtdinfo) |
| 66 | { |
Wolfgang Denk | 511d0c7 | 2006-10-09 00:42:01 +0200 | [diff] [blame] | 67 | struct nand_chip *this = mtdinfo->priv; |
Stefan Roese | 3df2ece | 2008-01-05 16:47:58 +0100 | [diff] [blame] | 68 | ulong base = (ulong) this->IO_ADDR_W & 0xffffff00; |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 69 | |
Stefan Roese | 3df2ece | 2008-01-05 16:47:58 +0100 | [diff] [blame] | 70 | return (in_be32((u32 *)(base + NDFC_STAT)) & NDFC_STAT_IS_READY); |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 71 | } |
| 72 | |
Stefan Roese | 91da09c | 2007-06-01 15:15:12 +0200 | [diff] [blame] | 73 | static void ndfc_enable_hwecc(struct mtd_info *mtdinfo, int mode) |
| 74 | { |
| 75 | struct nand_chip *this = mtdinfo->priv; |
Stefan Roese | 3df2ece | 2008-01-05 16:47:58 +0100 | [diff] [blame] | 76 | ulong base = (ulong) this->IO_ADDR_W & 0xffffff00; |
Stefan Roese | 91da09c | 2007-06-01 15:15:12 +0200 | [diff] [blame] | 77 | u32 ccr; |
| 78 | |
| 79 | ccr = in_be32((u32 *)(base + NDFC_CCR)); |
| 80 | ccr |= NDFC_CCR_RESET_ECC; |
| 81 | out_be32((u32 *)(base + NDFC_CCR), ccr); |
| 82 | } |
| 83 | |
| 84 | static int ndfc_calculate_ecc(struct mtd_info *mtdinfo, |
| 85 | const u_char *dat, u_char *ecc_code) |
| 86 | { |
| 87 | struct nand_chip *this = mtdinfo->priv; |
Stefan Roese | 3df2ece | 2008-01-05 16:47:58 +0100 | [diff] [blame] | 88 | ulong base = (ulong) this->IO_ADDR_W & 0xffffff00; |
Stefan Roese | 91da09c | 2007-06-01 15:15:12 +0200 | [diff] [blame] | 89 | u32 ecc; |
| 90 | u8 *p = (u8 *)&ecc; |
| 91 | |
| 92 | ecc = in_be32((u32 *)(base + NDFC_ECC)); |
| 93 | |
| 94 | /* The NDFC uses Smart Media (SMC) bytes order |
| 95 | */ |
Stefan Roese | ff02f13 | 2008-02-01 09:38:29 +0100 | [diff] [blame] | 96 | ecc_code[0] = p[1]; |
| 97 | ecc_code[1] = p[2]; |
Stefan Roese | 91da09c | 2007-06-01 15:15:12 +0200 | [diff] [blame] | 98 | ecc_code[2] = p[3]; |
| 99 | |
| 100 | return 0; |
| 101 | } |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 102 | |
| 103 | /* |
| 104 | * Speedups for buffer read/write/verify |
| 105 | * |
| 106 | * NDFC allows 32bit read/write of data. So we can speed up the buffer |
| 107 | * functions. No further checking, as nand_base will always read/write |
| 108 | * page aligned. |
| 109 | */ |
| 110 | static void ndfc_read_buf(struct mtd_info *mtdinfo, uint8_t *buf, int len) |
| 111 | { |
Wolfgang Denk | 511d0c7 | 2006-10-09 00:42:01 +0200 | [diff] [blame] | 112 | struct nand_chip *this = mtdinfo->priv; |
Stefan Roese | 3df2ece | 2008-01-05 16:47:58 +0100 | [diff] [blame] | 113 | ulong base = (ulong) this->IO_ADDR_W & 0xffffff00; |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 114 | uint32_t *p = (uint32_t *) buf; |
| 115 | |
Stefan Roese | 43a2b0e | 2006-10-20 14:28:52 +0200 | [diff] [blame] | 116 | for (;len > 0; len -= 4) |
Stefan Roese | 91da09c | 2007-06-01 15:15:12 +0200 | [diff] [blame] | 117 | *p++ = in_be32((u32 *)(base + NDFC_DATA)); |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 118 | } |
| 119 | |
Stefan Roese | 91da09c | 2007-06-01 15:15:12 +0200 | [diff] [blame] | 120 | #ifndef CONFIG_NAND_SPL |
| 121 | /* |
| 122 | * Don't use these speedup functions in NAND boot image, since the image |
| 123 | * has to fit into 4kByte. |
| 124 | */ |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 125 | static void ndfc_write_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len) |
| 126 | { |
Wolfgang Denk | 511d0c7 | 2006-10-09 00:42:01 +0200 | [diff] [blame] | 127 | struct nand_chip *this = mtdinfo->priv; |
Stefan Roese | 3df2ece | 2008-01-05 16:47:58 +0100 | [diff] [blame] | 128 | ulong base = (ulong) this->IO_ADDR_W & 0xffffff00; |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 129 | uint32_t *p = (uint32_t *) buf; |
| 130 | |
Stefan Roese | 43a2b0e | 2006-10-20 14:28:52 +0200 | [diff] [blame] | 131 | for (; len > 0; len -= 4) |
Stefan Roese | 91da09c | 2007-06-01 15:15:12 +0200 | [diff] [blame] | 132 | out_be32((u32 *)(base + NDFC_DATA), *p++); |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 133 | } |
| 134 | |
| 135 | static int ndfc_verify_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len) |
| 136 | { |
Wolfgang Denk | 511d0c7 | 2006-10-09 00:42:01 +0200 | [diff] [blame] | 137 | struct nand_chip *this = mtdinfo->priv; |
Stefan Roese | 3df2ece | 2008-01-05 16:47:58 +0100 | [diff] [blame] | 138 | ulong base = (ulong) this->IO_ADDR_W & 0xffffff00; |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 139 | uint32_t *p = (uint32_t *) buf; |
| 140 | |
Stefan Roese | 43a2b0e | 2006-10-20 14:28:52 +0200 | [diff] [blame] | 141 | for (; len > 0; len -= 4) |
Stefan Roese | 91da09c | 2007-06-01 15:15:12 +0200 | [diff] [blame] | 142 | if (*p++ != in_be32((u32 *)(base + NDFC_DATA))) |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 143 | return -1; |
| 144 | |
| 145 | return 0; |
| 146 | } |
| 147 | #endif /* #ifndef CONFIG_NAND_SPL */ |
| 148 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 149 | #ifndef CONFIG_SYS_NAND_BCR |
| 150 | #define CONFIG_SYS_NAND_BCR 0x80002222 |
Wolfgang Ocker | 52aef8f | 2008-08-26 19:55:23 +0200 | [diff] [blame] | 151 | #endif |
| 152 | |
Stefan Roese | 43a2b0e | 2006-10-20 14:28:52 +0200 | [diff] [blame] | 153 | void board_nand_select_device(struct nand_chip *nand, int chip) |
| 154 | { |
Stefan Roese | 7ade0c6 | 2006-10-24 18:06:48 +0200 | [diff] [blame] | 155 | /* |
| 156 | * Don't use "chip" to address the NAND device, |
| 157 | * generate the cs from the address where it is encoded. |
| 158 | */ |
Stefan Roese | 3df2ece | 2008-01-05 16:47:58 +0100 | [diff] [blame] | 159 | ulong base = (ulong)nand->IO_ADDR_W & 0xffffff00; |
| 160 | int cs = ndfc_cs[chip]; |
Stefan Roese | 43a2b0e | 2006-10-20 14:28:52 +0200 | [diff] [blame] | 161 | |
| 162 | /* Set NandFlash Core Configuration Register */ |
Stefan Roese | 91da09c | 2007-06-01 15:15:12 +0200 | [diff] [blame] | 163 | /* 1 col x 2 rows */ |
| 164 | out_be32((u32 *)(base + NDFC_CCR), 0x00000000 | (cs << 24)); |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 165 | out_be32((u32 *)(base + NDFC_BCFG0 + (cs << 2)), CONFIG_SYS_NAND_BCR); |
Stefan Roese | 43a2b0e | 2006-10-20 14:28:52 +0200 | [diff] [blame] | 166 | } |
| 167 | |
Stefan Roese | c2b4b2e | 2008-08-29 11:56:49 +0200 | [diff] [blame] | 168 | static void ndfc_select_chip(struct mtd_info *mtd, int chip) |
| 169 | { |
| 170 | /* |
| 171 | * Nothing to do here! |
| 172 | */ |
| 173 | } |
| 174 | |
Heiko Schocher | fa23044 | 2006-12-21 17:17:02 +0100 | [diff] [blame] | 175 | int board_nand_init(struct nand_chip *nand) |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 176 | { |
Stefan Roese | 7ade0c6 | 2006-10-24 18:06:48 +0200 | [diff] [blame] | 177 | int cs = (ulong)nand->IO_ADDR_W & 0x00000003; |
Stefan Roese | 3df2ece | 2008-01-05 16:47:58 +0100 | [diff] [blame] | 178 | ulong base = (ulong)nand->IO_ADDR_W & 0xffffff00; |
| 179 | static int chip = 0; |
Stefan Roese | 43a2b0e | 2006-10-20 14:28:52 +0200 | [diff] [blame] | 180 | |
Stefan Roese | 3df2ece | 2008-01-05 16:47:58 +0100 | [diff] [blame] | 181 | /* |
| 182 | * Save chip-select for this chip # |
| 183 | */ |
| 184 | ndfc_cs[chip] = cs; |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 185 | |
Stefan Roese | 3df2ece | 2008-01-05 16:47:58 +0100 | [diff] [blame] | 186 | /* |
| 187 | * Select required NAND chip in NDFC |
| 188 | */ |
| 189 | board_nand_select_device(nand, chip); |
| 190 | |
| 191 | nand->IO_ADDR_R = (void __iomem *)(base + NDFC_DATA); |
| 192 | nand->IO_ADDR_W = (void __iomem *)(base + NDFC_DATA); |
| 193 | nand->cmd_ctrl = ndfc_hwcontrol; |
| 194 | nand->chip_delay = 50; |
| 195 | nand->read_buf = ndfc_read_buf; |
| 196 | nand->dev_ready = ndfc_dev_ready; |
William Juul | 5e1dae5 | 2007-11-09 13:32:30 +0100 | [diff] [blame] | 197 | nand->ecc.correct = nand_correct_data; |
| 198 | nand->ecc.hwctl = ndfc_enable_hwecc; |
| 199 | nand->ecc.calculate = ndfc_calculate_ecc; |
| 200 | nand->ecc.mode = NAND_ECC_HW; |
| 201 | nand->ecc.size = 256; |
| 202 | nand->ecc.bytes = 3; |
Stefan Roese | c2b4b2e | 2008-08-29 11:56:49 +0200 | [diff] [blame] | 203 | nand->select_chip = ndfc_select_chip; |
Stefan Roese | 91da09c | 2007-06-01 15:15:12 +0200 | [diff] [blame] | 204 | |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 205 | #ifndef CONFIG_NAND_SPL |
| 206 | nand->write_buf = ndfc_write_buf; |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 207 | nand->verify_buf = ndfc_verify_buf; |
| 208 | #else |
| 209 | /* |
| 210 | * Setup EBC (CS0 only right now) |
| 211 | */ |
Stefan Roese | 6f3dfc1 | 2007-05-22 12:46:10 +0200 | [diff] [blame] | 212 | mtebc(EBC0_CFG, 0xb8400000); |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 213 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 214 | mtebc(pb0cr, CONFIG_SYS_EBC_PB0CR); |
| 215 | mtebc(pb0ap, CONFIG_SYS_EBC_PB0AP); |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 216 | #endif |
| 217 | |
Stefan Roese | 3df2ece | 2008-01-05 16:47:58 +0100 | [diff] [blame] | 218 | chip++; |
Stefan Roese | dbbd125 | 2007-10-05 17:10:59 +0200 | [diff] [blame] | 219 | |
Heiko Schocher | fa23044 | 2006-12-21 17:17:02 +0100 | [diff] [blame] | 220 | return 0; |
Stefan Roese | 887e2ec | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 221 | } |
| 222 | |
| 223 | #endif |