| TsiChungLiew | a1436a8 | 2007-08-16 13:20:50 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. |
| 3 | * TsiChung Liew (Tsi-Chung.Liew@freescale.com) |
| 4 | * |
| Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
| TsiChungLiew | a1436a8 | 2007-08-16 13:20:50 -0500 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef m5253_h |
| 9 | #define m5253_h |
| 10 | /****************************************************************************/ |
| 11 | |
| 12 | /* |
| 13 | * PLL Module (PLL) |
| 14 | */ |
| 15 | |
| 16 | /* Register read/write macros */ |
| 17 | #define PLL_PLLCR (0x000180) |
| 18 | |
| 19 | #define SIM_RSR (0x000000) |
| 20 | #define SIM_SYPCR (0x000001) |
| 21 | #define SIM_SWIVR (0x000002) |
| 22 | #define SIM_SWSR (0x000003) |
| 23 | #define SIM_MPARK (0x00000C) |
| 24 | |
| 25 | /* Bit definitions and macros for RSR */ |
| 26 | #define SIM_RSR_SWTR (0x20) |
| 27 | #define SIM_RSR_HRST (0x80) |
| 28 | |
| 29 | /* Register read/write macros */ |
| 30 | #define CIM_MISCCR (0x000500) |
| 31 | #define CIM_ATA_DADDR (0x000504) |
| 32 | #define CIM_ATA_DCOUNT (0x000508) |
| 33 | #define CIM_RTC_TIME (0x00050C) |
| 34 | #define CIM_USB_CANCLK (0x000510) |
| 35 | |
| 36 | /* Bit definitions and macros for MISCCR */ |
| 37 | #define CIM_MISCCR_ADTA (0x00000001) |
| 38 | #define CIM_MISCCR_ADTD (0x00000002) |
| 39 | #define CIM_MISCCR_ADIE (0x00000004) |
| 40 | #define CIM_MISCCR_ADIC (0x00000008) |
| 41 | #define CIM_MISCCR_ADIP (0x00000010) |
| 42 | #define CIM_MISCCR_CPUEND (0x00000020) |
| 43 | #define CIM_MISCCR_DMAEND (0x00000040) |
| 44 | #define CIM_MISCCR_RTCCLR (0x00000080) |
| 45 | #define CIM_MISCCR_RTCPL (0x00000100) |
| 46 | #define CIM_MISCCR_URIE (0x00000800) |
| 47 | #define CIM_MISCCR_URIC (0x00001000) |
| 48 | #define CIM_MISCCR_URIP (0x00002000) |
| 49 | |
| 50 | /* Bit definitions and macros for ATA_DADDR */ |
| 51 | #define CIM_ATA_DADDR_ATAADDR(x) (((x)&0x00003FFF)<<2) |
| 52 | #define CIM_ATA_DADDR_RAMADDR(x) (((x)&0x00003FFF)<<18) |
| 53 | |
| 54 | /* Bit definitions and macros for ATA_DCOUNT */ |
| 55 | #define CIM_ATA_DCOUNT_COUNT(x) (((x)&0x0000FFFF)) |
| 56 | |
| 57 | #endif /* m5253_h */ |