blob: d6adc0f721b85cb6b352d1993641da444aa62919 [file] [log] [blame]
Simon Glassd19de0d2014-12-10 08:55:50 -07001/*
2 * Simulate an I2C port
3 *
4 * Copyright (c) 2014 Google, Inc
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#include <common.h>
10#include <dm.h>
11#include <errno.h>
12#include <fdtdec.h>
13#include <i2c.h>
14#include <asm/test.h>
15#include <dm/lists.h>
16#include <dm/device-internal.h>
17#include <dm/root.h>
18
19DECLARE_GLOBAL_DATA_PTR;
20
21struct dm_sandbox_i2c_emul_priv {
22 struct udevice *emul;
23};
24
25static int get_emul(struct udevice *dev, struct udevice **devp,
26 struct dm_i2c_ops **opsp)
27{
Simon Glasse6f66ec2015-01-25 08:27:13 -070028 struct dm_i2c_chip *plat;
Simon Glassd19de0d2014-12-10 08:55:50 -070029 int ret;
30
31 *devp = NULL;
32 *opsp = NULL;
Simon Glasse6f66ec2015-01-25 08:27:13 -070033 plat = dev_get_parent_platdata(dev);
34 if (!plat->emul) {
Simon Glassd19de0d2014-12-10 08:55:50 -070035 ret = dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset,
36 false);
37 if (ret)
38 return ret;
39
Simon Glasse6f66ec2015-01-25 08:27:13 -070040 ret = device_get_child(dev, 0, &plat->emul);
Simon Glassd19de0d2014-12-10 08:55:50 -070041 if (ret)
42 return ret;
43 }
Simon Glasse6f66ec2015-01-25 08:27:13 -070044 *devp = plat->emul;
45 *opsp = i2c_get_ops(plat->emul);
Simon Glassd19de0d2014-12-10 08:55:50 -070046
47 return 0;
48}
49
50static int sandbox_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
51 int nmsgs)
52{
Simon Glasse564f052015-03-05 12:25:20 -070053 struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus);
Simon Glassd19de0d2014-12-10 08:55:50 -070054 struct dm_i2c_ops *ops;
55 struct udevice *emul, *dev;
56 bool is_read;
57 int ret;
58
59 /* Special test code to return success but with no emulation */
60 if (msg->addr == SANDBOX_I2C_TEST_ADDR)
61 return 0;
62
Simon Glass25ab4b02015-01-25 08:26:55 -070063 ret = i2c_get_chip(bus, msg->addr, 1, &dev);
Simon Glassd19de0d2014-12-10 08:55:50 -070064 if (ret)
65 return ret;
66
67 ret = get_emul(dev, &emul, &ops);
68 if (ret)
69 return ret;
70
71 /*
72 * For testing, don't allow writing above 100KHz for writes and
73 * 400KHz for reads
74 */
75 is_read = nmsgs > 1;
76 if (i2c->speed_hz > (is_read ? 400000 : 100000))
77 return -EINVAL;
78 return ops->xfer(emul, msg, nmsgs);
79}
80
81static const struct dm_i2c_ops sandbox_i2c_ops = {
82 .xfer = sandbox_i2c_xfer,
83};
84
Simon Glassd19de0d2014-12-10 08:55:50 -070085static const struct udevice_id sandbox_i2c_ids[] = {
86 { .compatible = "sandbox,i2c" },
87 { }
88};
89
90U_BOOT_DRIVER(i2c_sandbox) = {
91 .name = "i2c_sandbox",
92 .id = UCLASS_I2C,
93 .of_match = sandbox_i2c_ids,
Simon Glassd19de0d2014-12-10 08:55:50 -070094 .ops = &sandbox_i2c_ops,
95};