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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2001
3 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
4 *
5 * (C) Copyright 2002
6 * Gregory E. Allen, gallen@arlut.utexas.edu
7 * Matthew E. Karger, karger@arlut.utexas.edu
8 * Applied Research Laboratories, The University of Texas at Austin
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29#include <common.h>
30#include <mpc824x.h>
31#include <asm/processor.h>
32#include <asm/io.h>
wdenk7a8e9bed2003-05-31 18:35:21 +000033#include <asm/mmu.h>
wdenkc6097192002-11-03 00:24:07 +000034#include <pci.h>
35
36#define SAVE_SZ 32
37
38
39int checkboard(void)
40{
41 ulong busfreq = get_bus_freq(0);
42 char buf[32];
43
44 printf("Board: UTX8245 Local Bus at %s MHz\n", strmhz(buf, busfreq));
45 return 0;
46}
47
48
Becky Bruce9973e3c2008-06-09 16:03:40 -050049phys_size_t initdram(int board_type)
wdenkc6097192002-11-03 00:24:07 +000050{
wdenkc83bf6a2004-01-06 22:38:14 +000051 long size;
52 long new_bank0_end;
wdenk498b8db2004-04-18 22:26:17 +000053 long new_bank1_end;
wdenkc83bf6a2004-01-06 22:38:14 +000054 long mear1;
55 long emear1;
wdenkc6097192002-11-03 00:24:07 +000056
wdenkc83bf6a2004-01-06 22:38:14 +000057 size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
wdenkc6097192002-11-03 00:24:07 +000058
wdenk498b8db2004-04-18 22:26:17 +000059 new_bank0_end = size/2 - 1;
60 new_bank1_end = size - 1;
wdenkc83bf6a2004-01-06 22:38:14 +000061 mear1 = mpc824x_mpc107_getreg(MEAR1);
62 emear1 = mpc824x_mpc107_getreg(EMEAR1);
wdenk498b8db2004-04-18 22:26:17 +000063
64 mear1 = (mear1 & 0xFFFF0000) |
65 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) |
66 ((new_bank1_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT << 8);
67 emear1 = (emear1 & 0xFFFF0000) |
68 ((new_bank0_end & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) |
69 ((new_bank1_end & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT << 8);
wdenke35745b2004-04-18 23:32:11 +000070
wdenkc83bf6a2004-01-06 22:38:14 +000071 mpc824x_mpc107_setreg(MEAR1, mear1);
72 mpc824x_mpc107_setreg(EMEAR1, emear1);
wdenkc6097192002-11-03 00:24:07 +000073
wdenkc83bf6a2004-01-06 22:38:14 +000074 return (size);
wdenkc6097192002-11-03 00:24:07 +000075}
76
77
78/*
79 * Initialize PCI Devices, report devices found.
80 */
81
82static struct pci_config_table pci_utx8245_config_table[] = {
83#ifndef CONFIG_PCI_PNP
wdenk7a8e9bed2003-05-31 18:35:21 +000084 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0C, PCI_ANY_ID,
wdenkc6097192002-11-03 00:24:07 +000085 pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
86 PCI_ENET0_MEMADDR,
87 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
wdenk7a8e9bed2003-05-31 18:35:21 +000088 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0B, PCI_ANY_ID,
wdenkc6097192002-11-03 00:24:07 +000089 pci_cfgfunc_config_device, { PCI_FIREWIRE_IOADDR,
90 PCI_FIREWIRE_MEMADDR,
91 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
92#endif /*CONFIG_PCI_PNP*/
93 { }
94};
95
96
97static void pci_utx8245_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
98{
99 if (PCI_DEV(dev) == 11)
100 /* assign serial interrupt line 9 (int25) to FireWire */
101 pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 25);
102
103 else if (PCI_DEV(dev) == 12)
104 /* assign serial interrupt line 8 (int24) to Ethernet */
105 pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 24);
wdenk7a8e9bed2003-05-31 18:35:21 +0000106
107 else if (PCI_DEV(dev) == 14)
108 /* assign serial interrupt line 0 (int16) to PMC slot 0 */
109 pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 16);
110
111 else if (PCI_DEV(dev) == 15)
112 /* assign serial interrupt line 1 (int17) to PMC slot 1 */
113 pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 17);
wdenkc6097192002-11-03 00:24:07 +0000114}
115
116static struct pci_controller utx8245_hose = {
117#ifndef CONFIG_PCI_PNP
118 config_table: pci_utx8245_config_table,
119 fixup_irq: pci_utx8245_fixup_irq,
120 write_byte: pci_hose_write_config_byte
121#endif /*CONFIG_PCI_PNP*/
122};
123
stroesead10dd92003-02-14 11:21:23 +0000124void pci_init_board (void)
wdenkc6097192002-11-03 00:24:07 +0000125{
126 pci_mpc824x_init(&utx8245_hose);
127
128 icache_enable();
129}