blob: e7b66d81a499e683bba22b21110798f75dcb9918 [file] [log] [blame]
Stephen Warrene04bfda2014-03-25 11:39:33 -06001/dts-v1/;
2
3#include "tegra124.dtsi"
4
5/ {
6 model = "NVIDIA Jetson TK1";
7 compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
8
Simon Glassc3691392014-09-04 16:27:35 -06009 chosen {
10 stdout-path = &uartd;
11 };
12
Stephen Warrene04bfda2014-03-25 11:39:33 -060013 aliases {
14 i2c0 = "/i2c@7000d000";
15 i2c1 = "/i2c@7000c000";
16 i2c2 = "/i2c@7000c400";
17 i2c3 = "/i2c@7000c500";
18 i2c4 = "/i2c@7000c700";
Stephen Warrene04bfda2014-03-25 11:39:33 -060019 sdhci0 = "/sdhci@700b0600";
20 sdhci1 = "/sdhci@700b0400";
21 spi0 = "/spi@7000d400";
22 spi1 = "/spi@7000da00";
Stephen Warrene6607cf2014-05-29 15:29:40 -060023 usb0 = "/usb@7d000000";
24 usb1 = "/usb@7d008000";
Stephen Warrene04bfda2014-03-25 11:39:33 -060025 };
26
27 memory {
28 device_type = "memory";
29 reg = <0x80000000 0x80000000>;
30 };
31
Thierry Reding6e2fca92014-12-09 22:25:21 -070032 pcie-controller@01003000 {
33 status = "okay";
34
35 avddio-pex-supply = <&vdd_1v05_run>;
36 dvddio-pex-supply = <&vdd_1v05_run>;
37 avdd-pex-pll-supply = <&vdd_1v05_run>;
38 hvdd-pex-supply = <&vdd_3v3_lp0>;
39 hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
40 vddio-pex-ctl-supply = <&vdd_3v3_lp0>;
41 avdd-pll-erefe-supply = <&avdd_1v05_run>;
42
43 pci@1,0 {
44 status = "okay";
45 };
46
47 pci@2,0 {
48 status = "okay";
49 };
50 };
51
Stephen Warrene04bfda2014-03-25 11:39:33 -060052 i2c@7000c000 {
53 status = "okay";
54 clock-frequency = <100000>;
55 };
56
57 i2c@7000c400 {
58 status = "okay";
59 clock-frequency = <100000>;
60 };
61
62 i2c@7000c500 {
63 status = "okay";
64 clock-frequency = <100000>;
65 };
66
67 i2c@7000c700 {
68 status = "okay";
69 clock-frequency = <100000>;
70 };
71
Thierry Reding6e2fca92014-12-09 22:25:21 -070072 /* Expansion PWR_I2C_*, on-board components */
Stephen Warrene04bfda2014-03-25 11:39:33 -060073 i2c@7000d000 {
74 status = "okay";
75 clock-frequency = <400000>;
Thierry Reding6e2fca92014-12-09 22:25:21 -070076
77 pmic: pmic@40 {
78 compatible = "ams,as3722";
79 reg = <0x40>;
80 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
81
82 ams,system-power-controller;
83
84 #interrupt-cells = <2>;
85 interrupt-controller;
86
87 gpio-controller;
88 #gpio-cells = <2>;
89
90 pinctrl-names = "default";
91 pinctrl-0 = <&as3722_default>;
92
93 as3722_default: pinmux {
94 gpio0 {
95 pins = "gpio0";
96 function = "gpio";
97 bias-pull-down;
98 };
99
100 gpio1_2_4_7 {
101 pins = "gpio1", "gpio2", "gpio4", "gpio7";
102 function = "gpio";
103 bias-pull-up;
104 };
105
106 gpio3_5_6 {
107 pins = "gpio3", "gpio5", "gpio6";
108 bias-high-impedance;
109 };
110 };
111
112 regulators {
113 vsup-sd2-supply = <&vdd_5v0_sys>;
114 vsup-sd3-supply = <&vdd_5v0_sys>;
115 vsup-sd4-supply = <&vdd_5v0_sys>;
116 vsup-sd5-supply = <&vdd_5v0_sys>;
117 vin-ldo0-supply = <&vdd_1v35_lp0>;
118 vin-ldo1-6-supply = <&vdd_3v3_run>;
119 vin-ldo2-5-7-supply = <&vddio_1v8>;
120 vin-ldo3-4-supply = <&vdd_3v3_sys>;
121 vin-ldo9-10-supply = <&vdd_5v0_sys>;
122 vin-ldo11-supply = <&vdd_3v3_run>;
123
124 sd0 {
125 regulator-name = "+VDD_CPU_AP";
126 regulator-min-microvolt = <700000>;
127 regulator-max-microvolt = <1400000>;
128 regulator-min-microamp = <3500000>;
129 regulator-max-microamp = <3500000>;
130 regulator-always-on;
131 regulator-boot-on;
132 ams,ext-control = <2>;
133 };
134
135 sd1 {
136 regulator-name = "+VDD_CORE";
137 regulator-min-microvolt = <700000>;
138 regulator-max-microvolt = <1350000>;
139 regulator-min-microamp = <2500000>;
140 regulator-max-microamp = <2500000>;
141 regulator-always-on;
142 regulator-boot-on;
143 ams,ext-control = <1>;
144 };
145
146 vdd_1v35_lp0: sd2 {
147 regulator-name = "+1.35V_LP0(sd2)";
148 regulator-min-microvolt = <1350000>;
149 regulator-max-microvolt = <1350000>;
150 regulator-always-on;
151 regulator-boot-on;
152 };
153
154 sd3 {
155 regulator-name = "+1.35V_LP0(sd3)";
156 regulator-min-microvolt = <1350000>;
157 regulator-max-microvolt = <1350000>;
158 regulator-always-on;
159 regulator-boot-on;
160 };
161
162 vdd_1v05_run: sd4 {
163 regulator-name = "+1.05V_RUN";
164 regulator-min-microvolt = <1050000>;
165 regulator-max-microvolt = <1050000>;
166 };
167
168 vddio_1v8: sd5 {
169 regulator-name = "+1.8V_VDDIO";
170 regulator-min-microvolt = <1800000>;
171 regulator-max-microvolt = <1800000>;
172 regulator-boot-on;
173 regulator-always-on;
174 };
175
176 vdd_gpu: sd6 {
177 regulator-name = "+VDD_GPU_AP";
178 regulator-min-microvolt = <650000>;
179 regulator-max-microvolt = <1200000>;
180 regulator-min-microamp = <3500000>;
181 regulator-max-microamp = <3500000>;
182 regulator-boot-on;
183 regulator-always-on;
184 };
185
186 avdd_1v05_run: ldo0 {
187 regulator-name = "+1.05V_RUN_AVDD";
188 regulator-min-microvolt = <1050000>;
189 regulator-max-microvolt = <1050000>;
190 regulator-boot-on;
191 regulator-always-on;
192 ams,ext-control = <1>;
193 };
194
195 ldo1 {
196 regulator-name = "+1.8V_RUN_CAM";
197 regulator-min-microvolt = <1800000>;
198 regulator-max-microvolt = <1800000>;
199 };
200
201 ldo2 {
202 regulator-name = "+1.2V_GEN_AVDD";
203 regulator-min-microvolt = <1200000>;
204 regulator-max-microvolt = <1200000>;
205 regulator-boot-on;
206 regulator-always-on;
207 };
208
209 ldo3 {
210 regulator-name = "+1.05V_LP0_VDD_RTC";
211 regulator-min-microvolt = <1000000>;
212 regulator-max-microvolt = <1000000>;
213 regulator-boot-on;
214 regulator-always-on;
215 ams,enable-tracking;
216 };
217
218 ldo4 {
219 regulator-name = "+2.8V_RUN_CAM";
220 regulator-min-microvolt = <2800000>;
221 regulator-max-microvolt = <2800000>;
222 };
223
224 ldo5 {
225 regulator-name = "+1.2V_RUN_CAM_FRONT";
226 regulator-min-microvolt = <1200000>;
227 regulator-max-microvolt = <1200000>;
228 };
229
230 vddio_sdmmc3: ldo6 {
231 regulator-name = "+VDDIO_SDMMC3";
232 regulator-min-microvolt = <1800000>;
233 regulator-max-microvolt = <3300000>;
234 };
235
236 ldo7 {
237 regulator-name = "+1.05V_RUN_CAM_REAR";
238 regulator-min-microvolt = <1050000>;
239 regulator-max-microvolt = <1050000>;
240 };
241
242 ldo9 {
243 regulator-name = "+3.3V_RUN_TOUCH";
244 regulator-min-microvolt = <2800000>;
245 regulator-max-microvolt = <2800000>;
246 };
247
248 ldo10 {
249 regulator-name = "+2.8V_RUN_CAM_AF";
250 regulator-min-microvolt = <2800000>;
251 regulator-max-microvolt = <2800000>;
252 };
253
254 ldo11 {
255 regulator-name = "+1.8V_RUN_VPP_FUSE";
256 regulator-min-microvolt = <1800000>;
257 regulator-max-microvolt = <1800000>;
258 };
259 };
260 };
Stephen Warrene04bfda2014-03-25 11:39:33 -0600261 };
262
263 i2c@7000d100 {
264 status = "okay";
265 clock-frequency = <400000>;
266 };
267
268 spi@7000d400 {
269 status = "okay";
270 spi-max-frequency = <25000000>;
271 };
272
273 spi@7000da00 {
274 status = "okay";
275 spi-max-frequency = <25000000>;
276 };
277
Thierry Redingb02f3e02014-12-09 22:25:11 -0700278 padctl@7009f000 {
279 pinctrl-0 = <&padctl_default>;
280 pinctrl-names = "default";
281
282 padctl_default: pinmux {
283 usb3 {
284 nvidia,lanes = "pcie-0", "pcie-1";
285 nvidia,function = "usb3";
286 nvidia,iddq = <0>;
287 };
288
289 pcie {
290 nvidia,lanes = "pcie-2", "pcie-3",
291 "pcie-4";
292 nvidia,function = "pcie";
293 nvidia,iddq = <0>;
294 };
295
296 sata {
297 nvidia,lanes = "sata-0";
298 nvidia,function = "sata";
299 nvidia,iddq = <0>;
300 };
301 };
302 };
303
Stephen Warrene04bfda2014-03-25 11:39:33 -0600304 sdhci@700b0400 {
305 status = "okay";
Simon Glass2b2b50b2015-01-05 20:05:41 -0700306 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
307 power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
308 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
Stephen Warrene04bfda2014-03-25 11:39:33 -0600309 bus-width = <4>;
310 };
311
312 sdhci@700b0600 {
313 status = "okay";
314 bus-width = <8>;
315 };
316
Stephen Warrene6607cf2014-05-29 15:29:40 -0600317 usb@7d000000 {
318 status = "okay";
319 dr_mode = "otg";
Simon Glass2b2b50b2015-01-05 20:05:41 -0700320 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
Stephen Warrene6607cf2014-05-29 15:29:40 -0600321 };
322
Stephen Warrene04bfda2014-03-25 11:39:33 -0600323 usb@7d008000 {
324 status = "okay";
Simon Glass2b2b50b2015-01-05 20:05:41 -0700325 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
Stephen Warrene04bfda2014-03-25 11:39:33 -0600326 };
Thierry Reding6e2fca92014-12-09 22:25:21 -0700327
328 regulators {
329 compatible = "simple-bus";
330 #address-cells = <1>;
331 #size-cells = <0>;
332
333 vdd_mux: regulator@0 {
334 compatible = "regulator-fixed";
335 reg = <0>;
336 regulator-name = "+VDD_MUX";
337 regulator-min-microvolt = <12000000>;
338 regulator-max-microvolt = <12000000>;
339 regulator-always-on;
340 regulator-boot-on;
341 };
342
343 vdd_5v0_sys: regulator@1 {
344 compatible = "regulator-fixed";
345 reg = <1>;
346 regulator-name = "+5V_SYS";
347 regulator-min-microvolt = <5000000>;
348 regulator-max-microvolt = <5000000>;
349 regulator-always-on;
350 regulator-boot-on;
351 vin-supply = <&vdd_mux>;
352 };
353
354 vdd_3v3_sys: regulator@2 {
355 compatible = "regulator-fixed";
356 reg = <2>;
357 regulator-name = "+3.3V_SYS";
358 regulator-min-microvolt = <3300000>;
359 regulator-max-microvolt = <3300000>;
360 regulator-always-on;
361 regulator-boot-on;
362 vin-supply = <&vdd_mux>;
363 };
364
365 vdd_3v3_run: regulator@3 {
366 compatible = "regulator-fixed";
367 reg = <3>;
368 regulator-name = "+3.3V_RUN";
369 regulator-min-microvolt = <3300000>;
370 regulator-max-microvolt = <3300000>;
371 regulator-always-on;
372 regulator-boot-on;
373 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
374 enable-active-high;
375 vin-supply = <&vdd_3v3_sys>;
376 };
377
378 vdd_3v3_hdmi: regulator@4 {
379 compatible = "regulator-fixed";
380 reg = <4>;
381 regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
382 regulator-min-microvolt = <3300000>;
383 regulator-max-microvolt = <3300000>;
384 vin-supply = <&vdd_3v3_run>;
385 };
386
387 vdd_usb1_vbus: regulator@7 {
388 compatible = "regulator-fixed";
389 reg = <7>;
390 regulator-name = "+USB0_VBUS_SW";
391 regulator-min-microvolt = <5000000>;
392 regulator-max-microvolt = <5000000>;
393 gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
394 enable-active-high;
395 gpio-open-drain;
396 vin-supply = <&vdd_5v0_sys>;
397 };
398
399 vdd_usb3_vbus: regulator@8 {
400 compatible = "regulator-fixed";
401 reg = <8>;
402 regulator-name = "+5V_USB_HS";
403 regulator-min-microvolt = <5000000>;
404 regulator-max-microvolt = <5000000>;
405 gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
406 enable-active-high;
407 gpio-open-drain;
408 vin-supply = <&vdd_5v0_sys>;
409 };
410
411 vdd_3v3_lp0: regulator@10 {
412 compatible = "regulator-fixed";
413 reg = <10>;
414 regulator-name = "+3.3V_LP0";
415 regulator-min-microvolt = <3300000>;
416 regulator-max-microvolt = <3300000>;
417 regulator-always-on;
418 regulator-boot-on;
419 gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
420 enable-active-high;
421 vin-supply = <&vdd_3v3_sys>;
422 };
423
424 vdd_hdmi_pll: regulator@11 {
425 compatible = "regulator-fixed";
426 reg = <11>;
427 regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
428 regulator-min-microvolt = <1050000>;
429 regulator-max-microvolt = <1050000>;
430 gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
431 vin-supply = <&vdd_1v05_run>;
432 };
433
434 vdd_5v0_hdmi: regulator@12 {
435 compatible = "regulator-fixed";
436 reg = <12>;
437 regulator-name = "+5V_HDMI_CON";
438 regulator-min-microvolt = <5000000>;
439 regulator-max-microvolt = <5000000>;
440 gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
441 enable-active-high;
442 vin-supply = <&vdd_5v0_sys>;
443 };
444
445 /* Molex power connector */
446 vdd_5v0_sata: regulator@13 {
447 compatible = "regulator-fixed";
448 reg = <13>;
449 regulator-name = "+5V_SATA";
450 regulator-min-microvolt = <5000000>;
451 regulator-max-microvolt = <5000000>;
452 gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
453 enable-active-high;
454 vin-supply = <&vdd_5v0_sys>;
455 };
456
457 vdd_12v0_sata: regulator@14 {
458 compatible = "regulator-fixed";
459 reg = <14>;
460 regulator-name = "+12V_SATA";
461 regulator-min-microvolt = <12000000>;
462 regulator-max-microvolt = <12000000>;
463 gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
464 enable-active-high;
465 vin-supply = <&vdd_mux>;
466 };
467 };
Stephen Warrene04bfda2014-03-25 11:39:33 -0600468};