Heiko Schocher | 2605e90 | 2007-02-16 07:57:42 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007 |
| 3 | * Heiko Schocher, DENX Software Engineering, hs@denx.de. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #ifndef __CONFIG_H |
| 25 | #define __CONFIG_H |
| 26 | |
| 27 | /* |
| 28 | * High Level Configuration Options |
| 29 | * (easy to change) |
| 30 | */ |
| 31 | |
| 32 | #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ |
| 33 | #define CONFIG_MPC5200 1 /* especially an MPC5200 */ |
| 34 | #define CONFIG_JUPITER 1 /* ... on Jupiter board */ |
| 35 | |
| 36 | #define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ |
| 37 | |
| 38 | #define CONFIG_BOARD_EARLY_INIT_R 1 |
| 39 | #define CONFIG_BOARD_EARLY_INIT_F 1 |
| 40 | |
| 41 | #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ |
| 42 | #define BOOTFLAG_WARM 0x02 /* Software reboot */ |
| 43 | |
Heiko Schocher | 2605e90 | 2007-02-16 07:57:42 +0100 | [diff] [blame] | 44 | /* |
| 45 | * Serial console configuration |
| 46 | */ |
| 47 | #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */ |
| 48 | #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ |
| 49 | #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } |
| 50 | |
| 51 | /* |
| 52 | * PCI Mapping: |
| 53 | * 0x40000000 - 0x4fffffff - PCI Memory |
| 54 | * 0x50000000 - 0x50ffffff - PCI IO Space |
| 55 | */ |
Wolfgang Denk | 769104c | 2007-03-08 21:49:27 +0100 | [diff] [blame] | 56 | /*#define CONFIG_PCI */ |
Heiko Schocher | 2605e90 | 2007-02-16 07:57:42 +0100 | [diff] [blame] | 57 | |
| 58 | #if defined(CONFIG_PCI) |
| 59 | #define CONFIG_PCI_PNP 1 |
| 60 | #define CONFIG_PCI_SCAN_SHOW 1 |
| 61 | |
| 62 | #define CONFIG_PCI_MEM_BUS 0x40000000 |
| 63 | #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS |
| 64 | #define CONFIG_PCI_MEM_SIZE 0x10000000 |
| 65 | |
| 66 | #define CONFIG_PCI_IO_BUS 0x50000000 |
| 67 | #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS |
| 68 | #define CONFIG_PCI_IO_SIZE 0x01000000 |
Heiko Schocher | 2605e90 | 2007-02-16 07:57:42 +0100 | [diff] [blame] | 69 | #endif |
| 70 | |
| 71 | #define CFG_XLB_PIPELINING 1 |
| 72 | |
| 73 | #define CONFIG_NET_MULTI 1 |
| 74 | #define CONFIG_MII 1 |
| 75 | #define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ |
| 76 | |
| 77 | /* Partitions */ |
| 78 | #define CONFIG_MAC_PARTITION |
| 79 | #define CONFIG_DOS_PARTITION |
| 80 | #define CONFIG_ISO_PARTITION |
| 81 | |
| 82 | #define CONFIG_TIMESTAMP /* Print image info with timestamp */ |
| 83 | |
Heiko Schocher | 2605e90 | 2007-02-16 07:57:42 +0100 | [diff] [blame] | 84 | |
Jon Loeliger | bc234c1 | 2007-07-04 22:32:51 -0500 | [diff] [blame] | 85 | /* |
Jon Loeliger | 7f5c015 | 2007-07-10 09:38:02 -0500 | [diff] [blame] | 86 | * BOOTP options |
| 87 | */ |
| 88 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 89 | #define CONFIG_BOOTP_BOOTPATH |
| 90 | #define CONFIG_BOOTP_GATEWAY |
| 91 | #define CONFIG_BOOTP_HOSTNAME |
| 92 | |
| 93 | |
| 94 | /* |
Jon Loeliger | bc234c1 | 2007-07-04 22:32:51 -0500 | [diff] [blame] | 95 | * Command line configuration. |
| 96 | */ |
| 97 | #include <config_cmd_default.h> |
| 98 | |
| 99 | #define CONFIG_CMD_NFS |
| 100 | #define CONFIG_CMD_SNTP |
| 101 | |
Jon Loeliger | 7f5c015 | 2007-07-10 09:38:02 -0500 | [diff] [blame] | 102 | #if defined(CONFIG_PCI) |
| 103 | #define CODFIG_CMD_PCI |
| 104 | #endif |
| 105 | |
Heiko Schocher | 2605e90 | 2007-02-16 07:57:42 +0100 | [diff] [blame] | 106 | |
| 107 | /* |
| 108 | * Autobooting |
| 109 | */ |
| 110 | #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ |
| 111 | |
| 112 | #define CONFIG_PREBOOT "echo;" \ |
Wolfgang Denk | 32bf3d1 | 2008-03-03 12:16:44 +0100 | [diff] [blame] | 113 | "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ |
Heiko Schocher | 2605e90 | 2007-02-16 07:57:42 +0100 | [diff] [blame] | 114 | "echo" |
| 115 | |
| 116 | #undef CONFIG_BOOTARGS |
| 117 | |
| 118 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 119 | "netdev=eth0\0" \ |
| 120 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ |
| 121 | "nfsroot=${serverip}:${rootpath}\0" \ |
| 122 | "ramargs=setenv bootargs root=/dev/ram rw\0" \ |
| 123 | "addip=setenv bootargs ${bootargs} " \ |
| 124 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ |
| 125 | ":${hostname}:${netdev}:off panic=1\0" \ |
Wolfgang Denk | a7090b9 | 2007-03-13 16:05:55 +0100 | [diff] [blame] | 126 | "flash_nfs=run nfsargs addip addcons;" \ |
Heiko Schocher | 2605e90 | 2007-02-16 07:57:42 +0100 | [diff] [blame] | 127 | "bootm ${kernel_addr}\0" \ |
| 128 | "flash_self=run ramargs addip;" \ |
| 129 | "bootm ${kernel_addr} ${ramdisk_addr}\0" \ |
Wolfgang Denk | a7090b9 | 2007-03-13 16:05:55 +0100 | [diff] [blame] | 130 | "addcons=setenv bootargs ${bootargs} console=${contyp}," \ |
Heiko Schocher | 8502e30 | 2007-03-13 09:40:59 +0100 | [diff] [blame] | 131 | "${baudrate}\0" \ |
| 132 | "contyp=ttyS0\0" \ |
Wolfgang Denk | a7090b9 | 2007-03-13 16:05:55 +0100 | [diff] [blame] | 133 | "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \ |
Heiko Schocher | 8502e30 | 2007-03-13 09:40:59 +0100 | [diff] [blame] | 134 | "bootm\0" \ |
| 135 | "rootpath=/opt/eldk/ppc_6xx\0" \ |
Heiko Schocher | 2605e90 | 2007-02-16 07:57:42 +0100 | [diff] [blame] | 136 | "bootfile=/tftpboot/jupiter/uImage\0" \ |
| 137 | "" |
| 138 | |
| 139 | #define CONFIG_BOOTCOMMAND "run flash_self" |
| 140 | |
| 141 | /* |
| 142 | * IPB Bus clocking configuration. |
| 143 | */ |
| 144 | #undef CFG_IPBSPEED_133 /* define for 133MHz speed */ |
| 145 | |
| 146 | #if 0 |
| 147 | /* pass open firmware flat tree */ |
Grant Likely | cf2817a | 2007-09-06 09:46:23 -0600 | [diff] [blame] | 148 | #define CONFIG_OF_LIBFDT 1 |
Heiko Schocher | 2605e90 | 2007-02-16 07:57:42 +0100 | [diff] [blame] | 149 | #define CONFIG_OF_BOARD_SETUP 1 |
| 150 | |
Heiko Schocher | 2605e90 | 2007-02-16 07:57:42 +0100 | [diff] [blame] | 151 | #define OF_CPU "PowerPC,5200@0" |
| 152 | #define OF_SOC "soc5200@f0000000" |
| 153 | #define OF_TBCLK (bd->bi_busfreq / 8) |
| 154 | #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000" |
| 155 | #endif |
| 156 | |
| 157 | #if 0 |
| 158 | /* |
| 159 | * I2C configuration |
| 160 | */ |
| 161 | #define CONFIG_HARD_I2C 1 /* I2C with hardware support */ |
| 162 | #define CFG_I2C_MODULE 2 /* Select I2C module #1 or #2 */ |
| 163 | |
| 164 | #define CFG_I2C_SPEED 100000 /* 100 kHz */ |
| 165 | #define CFG_I2C_SLAVE 0x7F |
| 166 | |
| 167 | /* |
| 168 | * EEPROM configuration |
| 169 | */ |
| 170 | #define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */ |
| 171 | #define CFG_I2C_EEPROM_ADDR_LEN 1 |
| 172 | #define CFG_EEPROM_PAGE_WRITE_BITS 3 |
| 173 | #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 70 |
| 174 | #endif |
| 175 | |
| 176 | /* |
| 177 | * Flash configuration |
| 178 | */ |
| 179 | #define CFG_FLASH_BASE 0xFF000000 |
| 180 | #define CFG_FLASH_SIZE 0x01000000 |
| 181 | |
| 182 | #define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */ |
| 183 | |
| 184 | #define CFG_ENV_ADDR (TEXT_BASE + 0x40000) /* third sector */ |
| 185 | |
| 186 | #define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ |
| 187 | #define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ |
| 188 | |
| 189 | #define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks */ |
| 190 | |
| 191 | #define CFG_FLASH_CFI_DRIVER |
| 192 | #define CFG_FLASH_CFI |
| 193 | #define CFG_FLASH_EMPTY_INFO |
| 194 | #define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT |
| 195 | #define CFG_UPDATE_FLASH_SIZE 1 |
| 196 | #define CFG_FLASH_USE_BUFFER_WRITE 1 |
| 197 | |
| 198 | /* |
| 199 | * Environment settings |
| 200 | */ |
| 201 | #define CFG_ENV_IS_IN_FLASH 1 |
| 202 | #define CFG_ENV_SIZE 0x20000 |
| 203 | #define CFG_ENV_SECT_SIZE 0x20000 |
| 204 | #define CONFIG_ENV_OVERWRITE 1 |
| 205 | |
Heiko Schocher | 8502e30 | 2007-03-13 09:40:59 +0100 | [diff] [blame] | 206 | /* Address and size of Redundant Environment Sector */ |
| 207 | #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE) |
| 208 | #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) |
| 209 | |
Heiko Schocher | 2605e90 | 2007-02-16 07:57:42 +0100 | [diff] [blame] | 210 | /* |
| 211 | * Memory map |
| 212 | */ |
| 213 | #define CFG_MBAR 0xF0000000 |
| 214 | #define CFG_SDRAM_BASE 0x00000000 |
| 215 | #define CFG_DEFAULT_MBAR 0x80000000 |
| 216 | |
| 217 | /* Use SRAM until RAM will be available */ |
| 218 | #define CFG_INIT_RAM_ADDR MPC5XXX_SRAM |
| 219 | #define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */ |
| 220 | |
| 221 | |
| 222 | #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ |
| 223 | #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) |
| 224 | #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET |
| 225 | |
| 226 | #define CFG_MONITOR_BASE TEXT_BASE |
| 227 | #if (CFG_MONITOR_BASE < CFG_FLASH_BASE) |
| 228 | # define CFG_RAMBOOT 1 |
| 229 | #endif |
| 230 | |
| 231 | #define CFG_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ |
| 232 | #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ |
| 233 | #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
| 234 | |
| 235 | /* |
| 236 | * Ethernet configuration |
| 237 | */ |
| 238 | #define CONFIG_MPC5xxx_FEC 1 |
| 239 | /* |
| 240 | * Define CONFIG_FEC_10MBIT to force FEC at 10Mb |
| 241 | */ |
| 242 | /* #define CONFIG_FEC_10MBIT 1 */ |
| 243 | #define CONFIG_PHY_ADDR 0x00 |
| 244 | |
| 245 | /* |
| 246 | * GPIO configuration |
| 247 | */ |
| 248 | #define CFG_GPS_PORT_CONFIG 0x10000004 |
| 249 | |
| 250 | /* |
| 251 | * Miscellaneous configurable options |
| 252 | */ |
| 253 | #define CFG_LONGHELP /* undef to save memory */ |
| 254 | #define CFG_PROMPT "=> " /* Monitor Command Prompt */ |
Heiko Schocher | 8502e30 | 2007-03-13 09:40:59 +0100 | [diff] [blame] | 255 | |
| 256 | #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ |
| 257 | #define CFG_HUSH_PARSER 1 /* Use the HUSH parser */ |
| 258 | #ifdef CFG_HUSH_PARSER |
| 259 | #define CFG_PROMPT_HUSH_PS2 "> " |
| 260 | #endif |
Jon Loeliger | bc234c1 | 2007-07-04 22:32:51 -0500 | [diff] [blame] | 261 | #if defined(CONFIG_CMD_KGDB) |
Heiko Schocher | 2605e90 | 2007-02-16 07:57:42 +0100 | [diff] [blame] | 262 | #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ |
| 263 | #else |
| 264 | #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
| 265 | #endif |
| 266 | #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
| 267 | #define CFG_MAXARGS 16 /* max number of command args */ |
| 268 | #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
| 269 | |
| 270 | #define CFG_MEMTEST_START 0x00100000 /* memtest works on */ |
| 271 | #define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ |
| 272 | #define CFG_ALT_MEMTEST 1 |
| 273 | |
| 274 | #define CFG_LOAD_ADDR 0x200000 /* default load address */ |
| 275 | |
| 276 | #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ |
| 277 | |
Jon Loeliger | bc234c1 | 2007-07-04 22:32:51 -0500 | [diff] [blame] | 278 | #define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ |
| 279 | #if defined(CONFIG_CMD_KGDB) |
| 280 | # define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ |
| 281 | #endif |
| 282 | |
Heiko Schocher | 2605e90 | 2007-02-16 07:57:42 +0100 | [diff] [blame] | 283 | /* |
| 284 | * Various low-level settings |
| 285 | */ |
| 286 | #define CFG_HID0_INIT HID0_ICE | HID0_ICFI |
| 287 | #define CFG_HID0_FINAL HID0_ICE |
| 288 | |
| 289 | #define CFG_BOOTCS_START CFG_FLASH_BASE |
| 290 | #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE |
| 291 | #define CFG_BOOTCS_CFG 0x00047801 |
| 292 | #define CFG_CS0_START CFG_FLASH_BASE |
| 293 | #define CFG_CS0_SIZE CFG_FLASH_SIZE |
| 294 | |
| 295 | #define CFG_CS_BURST 0x00000000 |
| 296 | #define CFG_CS_DEADCYCLE 0x33333333 |
| 297 | |
| 298 | #define CFG_RESET_ADDRESS 0xff000000 |
| 299 | |
| 300 | #endif /* __CONFIG_H */ |