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Ricardo Ribalda Delgadod865fd02008-07-17 11:44:12 +02001/*
2 * (C) Copyright 2008
3 * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
4 * This work has been supported by: QTechnology http://qtec.com/
5 * Based on interrupts.c Wolfgang Denk-DENX Software Engineering-wd@denx.de
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Ricardo Ribalda Delgadod865fd02008-07-17 11:44:12 +02007*/
8#include <common.h>
9#include <watchdog.h>
10#include <command.h>
11#include <asm/processor.h>
12#include <asm/interrupt.h>
Stefan Roeseb36df562010-09-09 19:18:00 +020013#include <asm/ppc4xx.h>
Ricardo Ribalda Delgadod865fd02008-07-17 11:44:12 +020014#include <ppc_asm.tmpl>
15#include <commproc.h>
16#include <asm/io.h>
17#include <asm/xilinx_irq.h>
18
19DECLARE_GLOBAL_DATA_PTR;
20
21void pic_enable(void)
22{
23 debug("Xilinx PIC at 0x%8x\n", intc);
24
25 /*
26 * Disable all external interrupts until they are
27 * explicitly requested.
28 */
29 out_be32((u32 *) IER, 0);
30
31 /* Acknowledge any pending interrupts just in case. */
32 out_be32((u32 *) IAR, 0xffffffff);
33
34 /* Turn on the Master Enable. */
35 out_be32((u32 *) MER, 0x3UL);
36
37 return;
38}
39
40int xilinx_pic_irq_get(void)
41{
42 u32 irq;
43 irq = in_be32((u32 *) IVR);
44
45 /* If no interrupt is pending then all bits of the IVR are set to 1. As
46 * the IVR is as many bits wide as numbers of inputs are available.
47 * Therefore, if all bits of the IVR are set to one, its content will
48 * be bigger than XPAR_INTC_MAX_NUM_INTR_INPUTS.
49 */
50 if (irq >= XPAR_INTC_MAX_NUM_INTR_INPUTS)
51 irq = -1; /* report no pending interrupt. */
52
53 debug("get_irq: %d\n", irq);
54 return (irq);
55}
56
57void pic_irq_enable(unsigned int irq)
58{
59 u32 mask = IRQ_MASK(irq);
60 debug("enable: %d\n", irq);
61 out_be32((u32 *) SIE, mask);
62}
63
64void pic_irq_disable(unsigned int irq)
65{
66 u32 mask = IRQ_MASK(irq);
67 debug("disable: %d\n", irq);
68 out_be32((u32 *) CIE, mask);
69}
70
71void pic_irq_ack(unsigned int irq)
72{
73 u32 mask = IRQ_MASK(irq);
74 debug("ack: %d\n", irq);
75 out_be32((u32 *) IAR, mask);
76}
77
78void external_interrupt(struct pt_regs *regs)
79{
80 int irq;
81
82 irq = xilinx_pic_irq_get();
83 if (irq < 0)
84 return;
85
86 interrupt_run_handler(irq);
87
88 return;
89}