blob: c4c1202789d3ad1306c6c1a33815a53ae427be79 [file] [log] [blame]
Patrick Delaunaya6743132018-07-09 15:17:19 +02001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
Patrick Delaunay3d2d1152018-03-12 10:46:17 +01002/*
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 */
Patrick Delaunay3d2d1152018-03-12 10:46:17 +01006/dts-v1/;
7
Patrick Delaunay1a4f57c2020-03-06 17:54:41 +01008#include "stm32mp157.dtsi"
9#include "stm32mp15xc.dtsi"
10#include "stm32mp15-pinctrl.dtsi"
11#include "stm32mp15xxaa-pinctrl.dtsi"
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010012#include <dt-bindings/gpio/gpio.h>
Patrick Delaunayd46c22b2019-02-04 11:26:16 +010013#include <dt-bindings/mfd/st,stpmic1.h>
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010014
15/ {
Patrick Delaunaya6743132018-07-09 15:17:19 +020016 model = "STMicroelectronics STM32MP157C eval daughter";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010017 compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
18
19 chosen {
Patrice Chotard23661602019-02-12 16:50:38 +010020 stdout-path = "serial0:115200n8";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010021 };
22
Patrick Delaunaya6743132018-07-09 15:17:19 +020023 memory@c0000000 {
Patrick Delaunay35a54d42019-07-11 11:15:28 +020024 device_type = "memory";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010025 reg = <0xC0000000 0x40000000>;
26 };
Patrice Chotard21299d32018-04-26 17:13:11 +020027
Patrick Delaunayfe915332019-07-30 19:16:12 +020028 reserved-memory {
29 #address-cells = <1>;
30 #size-cells = <1>;
31 ranges;
32
Patrick Delaunay62d620c2019-11-06 16:16:33 +010033 mcuram2: mcuram2@10000000 {
34 compatible = "shared-dma-pool";
35 reg = <0x10000000 0x40000>;
36 no-map;
37 };
38
39 vdev0vring0: vdev0vring0@10040000 {
40 compatible = "shared-dma-pool";
41 reg = <0x10040000 0x1000>;
42 no-map;
43 };
44
45 vdev0vring1: vdev0vring1@10041000 {
46 compatible = "shared-dma-pool";
47 reg = <0x10041000 0x1000>;
48 no-map;
49 };
50
51 vdev0buffer: vdev0buffer@10042000 {
52 compatible = "shared-dma-pool";
53 reg = <0x10042000 0x4000>;
54 no-map;
55 };
56
57 mcuram: mcuram@30000000 {
58 compatible = "shared-dma-pool";
59 reg = <0x30000000 0x40000>;
60 no-map;
61 };
62
63 retram: retram@38000000 {
64 compatible = "shared-dma-pool";
65 reg = <0x38000000 0x10000>;
66 no-map;
67 };
68
Patrick Delaunayfe915332019-07-30 19:16:12 +020069 gpu_reserved: gpu@e8000000 {
70 reg = <0xe8000000 0x8000000>;
71 no-map;
72 };
73 };
74
Patrice Chotard23661602019-02-12 16:50:38 +010075 aliases {
76 serial0 = &uart4;
77 };
78
Patrice Chotard21299d32018-04-26 17:13:11 +020079 sd_switch: regulator-sd_switch {
80 compatible = "regulator-gpio";
81 regulator-name = "sd_switch";
82 regulator-min-microvolt = <1800000>;
83 regulator-max-microvolt = <2900000>;
84 regulator-type = "voltage";
85 regulator-always-on;
86
87 gpios = <&gpiof 14 GPIO_ACTIVE_HIGH>;
88 gpios-states = <0>;
Patrick Delaunayd35a5af2020-01-28 10:11:00 +010089 states = <1800000 0x1>,
90 <2900000 0x0>;
91 };
92};
93
Patrick Delaunay1a4f57c2020-03-06 17:54:41 +010094&adc {
95 /* ANA0, ANA1 are dedicated pins and don't need pinctrl: only in6. */
96 pinctrl-0 = <&adc1_in6_pins_a>;
97 pinctrl-names = "default";
98 vdd-supply = <&vdd>;
99 vdda-supply = <&vdda>;
100 vref-supply = <&vdda>;
101 status = "disabled";
102 adc1: adc@0 {
103 st,adc-channels = <0 1 6>;
104 /* 16.5 ck_cycles sampling time */
105 st,min-sample-time-nsecs = <400>;
106 status = "okay";
107 };
108};
109
Patrick Delaunay6f2e0ad2020-05-25 12:19:42 +0200110&cpu0{
111 cpu-supply = <&vddcore>;
112};
113
114&cpu1{
115 cpu-supply = <&vddcore>;
116};
117
Patrick Delaunayd35a5af2020-01-28 10:11:00 +0100118&dac {
119 pinctrl-names = "default";
120 pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
121 vref-supply = <&vdda>;
122 status = "disabled";
123 dac1: dac@1 {
124 status = "okay";
125 };
126 dac2: dac@2 {
127 status = "okay";
Patrice Chotard21299d32018-04-26 17:13:11 +0200128 };
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100129};
130
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200131&dts {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100132 status = "okay";
133};
134
Patrick Delaunayfe915332019-07-30 19:16:12 +0200135&gpu {
136 contiguous-area = <&gpu_reserved>;
137 status = "okay";
138};
139
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100140&i2c4 {
Patrick Delaunay1b28a5e2020-04-30 15:52:46 +0200141 pinctrl-names = "default", "sleep";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100142 pinctrl-0 = <&i2c4_pins_a>;
Patrick Delaunay1b28a5e2020-04-30 15:52:46 +0200143 pinctrl-1 = <&i2c4_pins_sleep_a>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100144 i2c-scl-rising-time-ns = <185>;
145 i2c-scl-falling-time-ns = <20>;
Patrick Delaunay1b28a5e2020-04-30 15:52:46 +0200146 clock-frequency = <400000>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100147 status = "okay";
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200148 /* spare dmas for other usage */
149 /delete-property/dmas;
150 /delete-property/dma-names;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100151
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200152 pmic: stpmic@33 {
Patrick Delaunay42f01aa2019-02-04 11:26:17 +0100153 compatible = "st,stpmic1";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100154 reg = <0x33>;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200155 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100156 interrupt-controller;
157 #interrupt-cells = <2>;
158 status = "okay";
Patrice Chotard21299d32018-04-26 17:13:11 +0200159
Patrice Chotard21299d32018-04-26 17:13:11 +0200160 regulators {
Patrick Delaunay42f01aa2019-02-04 11:26:17 +0100161 compatible = "st,stpmic1-regulators";
Patrice Chotard21299d32018-04-26 17:13:11 +0200162 ldo1-supply = <&v3v3>;
163 ldo2-supply = <&v3v3>;
164 ldo3-supply = <&vdd_ddr>;
165 ldo5-supply = <&v3v3>;
166 ldo6-supply = <&v3v3>;
167 pwr_sw1-supply = <&bst_out>;
168 pwr_sw2-supply = <&bst_out>;
169
170 vddcore: buck1 {
171 regulator-name = "vddcore";
Patrick Delaunayd35a5af2020-01-28 10:11:00 +0100172 regulator-min-microvolt = <1200000>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200173 regulator-max-microvolt = <1350000>;
174 regulator-always-on;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200175 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200176 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200177 };
178
179 vdd_ddr: buck2 {
180 regulator-name = "vdd_ddr";
181 regulator-min-microvolt = <1350000>;
182 regulator-max-microvolt = <1350000>;
183 regulator-always-on;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200184 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200185 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200186 };
187
188 vdd: buck3 {
189 regulator-name = "vdd";
190 regulator-min-microvolt = <3300000>;
191 regulator-max-microvolt = <3300000>;
192 regulator-always-on;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200193 st,mask-reset;
194 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200195 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200196 };
197
198 v3v3: buck4 {
199 regulator-name = "v3v3";
200 regulator-min-microvolt = <3300000>;
201 regulator-max-microvolt = <3300000>;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200202 regulator-always-on;
Patrice Chotard21299d32018-04-26 17:13:11 +0200203 regulator-over-current-protection;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200204 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200205 };
206
207 vdda: ldo1 {
208 regulator-name = "vdda";
209 regulator-min-microvolt = <2900000>;
210 regulator-max-microvolt = <2900000>;
211 interrupts = <IT_CURLIM_LDO1 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200212 };
213
214 v2v8: ldo2 {
215 regulator-name = "v2v8";
216 regulator-min-microvolt = <2800000>;
217 regulator-max-microvolt = <2800000>;
218 interrupts = <IT_CURLIM_LDO2 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200219 };
220
221 vtt_ddr: ldo3 {
222 regulator-name = "vtt_ddr";
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200223 regulator-min-microvolt = <500000>;
224 regulator-max-microvolt = <750000>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200225 regulator-always-on;
226 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200227 };
228
229 vdd_usb: ldo4 {
230 regulator-name = "vdd_usb";
Patrice Chotard21299d32018-04-26 17:13:11 +0200231 interrupts = <IT_CURLIM_LDO4 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200232 };
233
234 vdd_sd: ldo5 {
235 regulator-name = "vdd_sd";
236 regulator-min-microvolt = <2900000>;
237 regulator-max-microvolt = <2900000>;
238 interrupts = <IT_CURLIM_LDO5 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200239 regulator-boot-on;
Patrice Chotard21299d32018-04-26 17:13:11 +0200240 };
241
242 v1v8: ldo6 {
243 regulator-name = "v1v8";
244 regulator-min-microvolt = <1800000>;
245 regulator-max-microvolt = <1800000>;
246 interrupts = <IT_CURLIM_LDO6 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200247 };
248
249 vref_ddr: vref_ddr {
250 regulator-name = "vref_ddr";
251 regulator-always-on;
Patrice Chotard21299d32018-04-26 17:13:11 +0200252 };
253
Patrick Delaunaye07a86b2019-11-06 16:16:32 +0100254 bst_out: boost {
Patrice Chotard21299d32018-04-26 17:13:11 +0200255 regulator-name = "bst_out";
256 interrupts = <IT_OCP_BOOST 0>;
Patrick Delaunaye07a86b2019-11-06 16:16:32 +0100257 };
Patrice Chotard21299d32018-04-26 17:13:11 +0200258
259 vbus_otg: pwr_sw1 {
260 regulator-name = "vbus_otg";
261 interrupts = <IT_OCP_OTG 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200262 };
263
264 vbus_sw: pwr_sw2 {
265 regulator-name = "vbus_sw";
266 interrupts = <IT_OCP_SWOUT 0>;
Patrick Delaunayd35a5af2020-01-28 10:11:00 +0100267 regulator-active-discharge = <1>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200268 };
269 };
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200270
271 onkey {
272 compatible = "st,stpmic1-onkey";
273 interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
274 interrupt-names = "onkey-falling", "onkey-rising";
275 power-off-time-sec = <10>;
276 status = "okay";
277 };
278
279 watchdog {
280 compatible = "st,stpmic1-wdt";
281 status = "disabled";
282 };
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100283 };
284};
285
Fabien Dessenne1958dae2019-05-14 11:20:37 +0200286&ipcc {
287 status = "okay";
288};
289
Patrice Chotard23661602019-02-12 16:50:38 +0100290&iwdg2 {
291 timeout-sec = <32>;
292 status = "okay";
293};
294
Patrick Delaunay5d2901a2019-08-02 15:07:18 +0200295&m4_rproc {
Patrick Delaunay62d620c2019-11-06 16:16:33 +0100296 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
297 <&vdev0vring1>, <&vdev0buffer>;
Patrick Delaunay5d2901a2019-08-02 15:07:18 +0200298 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
299 mbox-names = "vq0", "vq1", "shutdown";
Patrick Delaunay62d620c2019-11-06 16:16:33 +0100300 interrupt-parent = <&exti>;
301 interrupts = <68 1>;
Patrick Delaunay5d2901a2019-08-02 15:07:18 +0200302 status = "okay";
303};
304
Patrick Delaunay7915b992020-01-28 10:10:59 +0100305&pwr_regulators {
306 vdd-supply = <&vdd>;
307 vdd_3v3_usbfs-supply = <&vdd_usb>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200308};
309
Patrice Chotard23661602019-02-12 16:50:38 +0100310&rng1 {
311 status = "okay";
312};
313
314&rtc {
315 status = "okay";
316};
317
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100318&sdmmc1 {
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200319 pinctrl-names = "default", "opendrain", "sleep";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100320 pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200321 pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
322 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
Patrick Delaunay1b28a5e2020-04-30 15:52:46 +0200323 cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
324 disable-wp;
Patrice Chotardc89b87c2019-02-12 17:17:58 +0100325 st,sig-dir;
326 st,neg-edge;
327 st,use-ckin;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100328 bus-width = <4>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200329 vmmc-supply = <&vdd_sd>;
330 vqmmc-supply = <&sd_switch>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100331 status = "okay";
332};
333
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100334&sdmmc2 {
Patrick Delaunay4d7d0e22019-11-06 16:16:34 +0100335 pinctrl-names = "default", "opendrain", "sleep";
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100336 pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
Patrick Delaunay4d7d0e22019-11-06 16:16:34 +0100337 pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
338 pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100339 non-removable;
340 no-sd;
341 no-sdio;
Patrice Chotardc89b87c2019-02-12 17:17:58 +0100342 st,neg-edge;
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100343 bus-width = <8>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200344 vmmc-supply = <&v3v3>;
Patrick Delaunay1b28a5e2020-04-30 15:52:46 +0200345 vqmmc-supply = <&vdd>;
Patrick Delaunay4d7d0e22019-11-06 16:16:34 +0100346 mmc-ddr-3_3v;
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100347 status = "okay";
348};
349
Patrice Chotard23661602019-02-12 16:50:38 +0100350&timers6 {
351 status = "okay";
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200352 /* spare dmas for other usage */
353 /delete-property/dmas;
354 /delete-property/dma-names;
Patrice Chotard23661602019-02-12 16:50:38 +0100355 timer@5 {
356 status = "okay";
357 };
358};
359
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100360&uart4 {
361 pinctrl-names = "default";
362 pinctrl-0 = <&uart4_pins_a>;
363 status = "okay";
364};
Patrick Delaunaya6743132018-07-09 15:17:19 +0200365
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200366&usbotg_hs {
367 vbus-supply = <&vbus_otg>;
368};
369
Patrick Delaunaya6743132018-07-09 15:17:19 +0200370&usbphyc_port0 {
371 phy-supply = <&vdd_usb>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200372};
373
374&usbphyc_port1 {
375 phy-supply = <&vdd_usb>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200376};