blob: 4f0f8fc5f8bb7c103776c89459feeccf390945c4 [file] [log] [blame]
wdenk5c952cf2004-10-10 21:27:30 +00001/*
2 * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
3 * Scott McNutt <smcnutt@psyent.com>
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenk5c952cf2004-10-10 21:27:30 +00006 */
7
8#include <common.h>
Thomas Choubcae80e2015-10-21 21:34:57 +08009#include <cpu.h>
10#include <dm.h>
11#include <errno.h>
Joachim Foersterf956ad92011-10-20 10:28:10 +020012#include <asm/cache.h>
wdenk5c952cf2004-10-10 21:27:30 +000013
Thomas Chou5ff10aa2014-08-22 11:36:47 +080014DECLARE_GLOBAL_DATA_PTR;
15
Thomas Chou5ff10aa2014-08-22 11:36:47 +080016#ifdef CONFIG_DISPLAY_CPUINFO
17int print_cpuinfo(void)
wdenk5c952cf2004-10-10 21:27:30 +000018{
Thomas Chouca844dd2015-10-14 08:43:31 +080019 printf("CPU: Nios-II\n");
20 return 0;
wdenk5c952cf2004-10-10 21:27:30 +000021}
Thomas Chou5ff10aa2014-08-22 11:36:47 +080022#endif /* CONFIG_DISPLAY_CPUINFO */
wdenk5c952cf2004-10-10 21:27:30 +000023
Thomas Chou4909f0e2015-12-16 16:07:06 +080024#ifdef CONFIG_ALTERA_SYSID
25int checkboard(void)
26{
27 display_sysid();
28 return 0;
29}
30#endif
31
Mike Frysinger882b7d72010-10-20 03:41:17 -040032int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
wdenk5c952cf2004-10-10 21:27:30 +000033{
Thomas Chou7a6a7d12010-08-16 10:49:44 +080034 disable_interrupts();
35 /* indirect call to go beyond 256MB limitation of toolchain */
Thomas Chou121e36d2015-10-09 09:43:52 +080036 nios2_callr(gd->arch.reset_addr);
Thomas Chou7a6a7d12010-08-16 10:49:44 +080037 return 0;
wdenk5c952cf2004-10-10 21:27:30 +000038}
Joachim Foersterf956ad92011-10-20 10:28:10 +020039
Thomas Choub8112092015-10-06 14:09:19 +080040/*
41 * COPY EXCEPTION TRAMPOLINE -- copy the tramp to the
42 * exception address. Define CONFIG_ROM_STUBS to prevent
43 * the copy (e.g. exception in flash or in other
44 * softare/firmware component).
45 */
46#ifndef CONFIG_ROM_STUBS
47static void copy_exception_trampoline(void)
48{
49 extern int _except_start, _except_end;
50 void *except_target = (void *)gd->arch.exception_addr;
51
52 if (&_except_start != except_target) {
53 memcpy(except_target, &_except_start,
54 &_except_end - &_except_start);
55 flush_cache(gd->arch.exception_addr,
56 &_except_end - &_except_start);
57 }
58}
59#endif
60
Thomas Choubcae80e2015-10-21 21:34:57 +080061int arch_cpu_init_dm(void)
Thomas Chou5ff10aa2014-08-22 11:36:47 +080062{
Thomas Choubcae80e2015-10-21 21:34:57 +080063 struct udevice *dev;
64 int ret;
65
Simon Glass3f603cb2016-02-11 13:23:26 -070066 ret = uclass_first_device_err(UCLASS_CPU, &dev);
Thomas Choubcae80e2015-10-21 21:34:57 +080067 if (ret)
68 return ret;
Thomas Choubcae80e2015-10-21 21:34:57 +080069
Thomas Chou5ff10aa2014-08-22 11:36:47 +080070 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
Thomas Choub8112092015-10-06 14:09:19 +080071#ifndef CONFIG_ROM_STUBS
72 copy_exception_trampoline();
73#endif
Thomas Chou5ff10aa2014-08-22 11:36:47 +080074
75 return 0;
76}
Thomas Choubcae80e2015-10-21 21:34:57 +080077
78static int altera_nios2_get_desc(struct udevice *dev, char *buf, int size)
79{
80 const char *cpu_name = "Nios-II";
81
82 if (size < strlen(cpu_name))
83 return -ENOSPC;
84 strcpy(buf, cpu_name);
85
86 return 0;
87}
88
89static int altera_nios2_get_info(struct udevice *dev, struct cpu_info *info)
90{
91 info->cpu_freq = gd->cpu_clk;
92 info->features = (1 << CPU_FEAT_L1_CACHE) |
93 (gd->arch.has_mmu ? (1 << CPU_FEAT_MMU) : 0);
94
95 return 0;
96}
97
98static int altera_nios2_get_count(struct udevice *dev)
99{
100 return 1;
101}
102
103static int altera_nios2_probe(struct udevice *dev)
104{
105 const void *blob = gd->fdt_blob;
106 int node = dev->of_offset;
107
108 gd->cpu_clk = fdtdec_get_int(blob, node,
109 "clock-frequency", 0);
110 gd->arch.dcache_line_size = fdtdec_get_int(blob, node,
111 "dcache-line-size", 0);
112 gd->arch.icache_line_size = fdtdec_get_int(blob, node,
113 "icache-line-size", 0);
114 gd->arch.dcache_size = fdtdec_get_int(blob, node,
115 "dcache-size", 0);
116 gd->arch.icache_size = fdtdec_get_int(blob, node,
117 "icache-size", 0);
118 gd->arch.reset_addr = fdtdec_get_int(blob, node,
119 "altr,reset-addr", 0);
120 gd->arch.exception_addr = fdtdec_get_int(blob, node,
121 "altr,exception-addr", 0);
122 gd->arch.has_initda = fdtdec_get_int(blob, node,
123 "altr,has-initda", 0);
124 gd->arch.has_mmu = fdtdec_get_int(blob, node,
125 "altr,has-mmu", 0);
Thomas Chou1ce61cb2015-10-27 08:30:22 +0800126 gd->arch.io_region_base = gd->arch.has_mmu ? 0xe0000000 : 0x80000000;
127 gd->arch.mem_region_base = gd->arch.has_mmu ? 0xc0000000 : 0x00000000;
Thomas Chou2de48232015-10-27 09:02:17 +0800128 gd->arch.physaddr_mask = gd->arch.has_mmu ? 0x1fffffff : 0x7fffffff;
Thomas Choubcae80e2015-10-21 21:34:57 +0800129
130 return 0;
131}
132
133static const struct cpu_ops altera_nios2_ops = {
134 .get_desc = altera_nios2_get_desc,
135 .get_info = altera_nios2_get_info,
136 .get_count = altera_nios2_get_count,
137};
138
139static const struct udevice_id altera_nios2_ids[] = {
140 { .compatible = "altr,nios2-1.0" },
141 { .compatible = "altr,nios2-1.1" },
142 { }
143};
144
145U_BOOT_DRIVER(altera_nios2) = {
146 .name = "altera_nios2",
147 .id = UCLASS_CPU,
148 .of_match = altera_nios2_ids,
149 .probe = altera_nios2_probe,
150 .ops = &altera_nios2_ops,
151 .flags = DM_FLAG_PRE_RELOC,
152};