Stefan Roese | b0f80b9 | 2015-01-19 11:33:42 +0100 | [diff] [blame] | 1 | /* |
Stefan Roese | a5f8887 | 2016-01-07 14:09:09 +0100 | [diff] [blame] | 2 | * Copyright (C) 2014-2016 Stefan Roese <sr@denx.de> |
Stefan Roese | b0f80b9 | 2015-01-19 11:33:42 +0100 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
Stefan Roese | 6451223 | 2015-11-25 07:37:00 +0100 | [diff] [blame] | 8 | #include <dm.h> |
| 9 | #include <debug_uart.h> |
| 10 | #include <fdtdec.h> |
Stefan Roese | b0f80b9 | 2015-01-19 11:33:42 +0100 | [diff] [blame] | 11 | #include <spl.h> |
| 12 | #include <asm/io.h> |
| 13 | #include <asm/arch/cpu.h> |
| 14 | #include <asm/arch/soc.h> |
| 15 | |
| 16 | DECLARE_GLOBAL_DATA_PTR; |
| 17 | |
Stefan Roese | a5f8887 | 2016-01-07 14:09:09 +0100 | [diff] [blame] | 18 | static u32 get_boot_device(void) |
| 19 | { |
| 20 | u32 val; |
| 21 | u32 boot_device; |
| 22 | |
Stefan Roese | f4db6c9 | 2016-01-07 14:12:04 +0100 | [diff] [blame] | 23 | /* |
| 24 | * First check, if UART boot-mode is active. This can only |
| 25 | * be done, via the bootrom error register. Here the |
| 26 | * MSB marks if the UART mode is active. |
| 27 | */ |
| 28 | val = readl(CONFIG_BOOTROM_ERR_REG); |
| 29 | boot_device = (val & BOOTROM_ERR_MODE_MASK) >> BOOTROM_ERR_MODE_OFFS; |
| 30 | debug("BOOTROM_REG=0x%08x boot_device=0x%x\n", val, boot_device); |
| 31 | if (boot_device == BOOTROM_ERR_MODE_UART) |
| 32 | return BOOT_DEVICE_UART; |
| 33 | |
| 34 | /* |
| 35 | * Now check the SAR register for the strapped boot-device |
| 36 | */ |
Stefan Roese | a5f8887 | 2016-01-07 14:09:09 +0100 | [diff] [blame] | 37 | val = readl(CONFIG_SAR_REG); /* SAR - Sample At Reset */ |
| 38 | boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS; |
Stefan Roese | f4db6c9 | 2016-01-07 14:12:04 +0100 | [diff] [blame] | 39 | debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device); |
Stefan Roese | a5f8887 | 2016-01-07 14:09:09 +0100 | [diff] [blame] | 40 | switch (boot_device) { |
| 41 | #ifdef CONFIG_SPL_MMC_SUPPORT |
| 42 | case BOOT_FROM_MMC: |
| 43 | case BOOT_FROM_MMC_ALT: |
| 44 | return BOOT_DEVICE_MMC1; |
| 45 | #endif |
| 46 | case BOOT_FROM_UART: |
| 47 | return BOOT_DEVICE_UART; |
| 48 | case BOOT_FROM_SPI: |
| 49 | default: |
| 50 | return BOOT_DEVICE_SPI; |
| 51 | }; |
| 52 | } |
| 53 | |
Stefan Roese | b0f80b9 | 2015-01-19 11:33:42 +0100 | [diff] [blame] | 54 | u32 spl_boot_device(void) |
| 55 | { |
Stefan Roese | a5f8887 | 2016-01-07 14:09:09 +0100 | [diff] [blame] | 56 | return get_boot_device(); |
Stefan Roese | b0f80b9 | 2015-01-19 11:33:42 +0100 | [diff] [blame] | 57 | } |
| 58 | |
Stefan Roese | 8ed43b9 | 2015-07-20 11:20:36 +0200 | [diff] [blame] | 59 | #ifdef CONFIG_SPL_MMC_SUPPORT |
Marek Vasut | 2b1cdaf | 2016-05-14 23:42:07 +0200 | [diff] [blame] | 60 | u32 spl_boot_mode(const u32 boot_device) |
Stefan Roese | 8ed43b9 | 2015-07-20 11:20:36 +0200 | [diff] [blame] | 61 | { |
| 62 | return MMCSD_MODE_RAW; |
| 63 | } |
| 64 | #endif |
| 65 | |
Stefan Roese | b0f80b9 | 2015-01-19 11:33:42 +0100 | [diff] [blame] | 66 | void board_init_f(ulong dummy) |
| 67 | { |
Stefan Roese | 6451223 | 2015-11-25 07:37:00 +0100 | [diff] [blame] | 68 | int ret; |
| 69 | |
Stefan Roese | e3cccf9 | 2015-04-17 18:13:06 +0200 | [diff] [blame] | 70 | /* |
| 71 | * Pin muxing needs to be done before UART output, since |
| 72 | * on A38x the UART pins need some re-muxing for output |
| 73 | * to work. |
| 74 | */ |
| 75 | board_early_init_f(); |
| 76 | |
Stefan Roese | 6451223 | 2015-11-25 07:37:00 +0100 | [diff] [blame] | 77 | /* Example code showing how to enable the debug UART on MVEBU */ |
| 78 | #ifdef EARLY_UART |
| 79 | /* |
| 80 | * Debug UART can be used from here if required: |
| 81 | * |
| 82 | * debug_uart_init(); |
| 83 | * printch('a'); |
| 84 | * printhex8(0x1234); |
| 85 | * printascii("string"); |
| 86 | */ |
| 87 | #endif |
| 88 | |
| 89 | ret = spl_init(); |
| 90 | if (ret) { |
| 91 | debug("spl_init() failed: %d\n", ret); |
| 92 | hang(); |
| 93 | } |
| 94 | |
| 95 | /* Use special translation offset for SPL */ |
| 96 | dm_set_translation_offset(0xd0000000 - 0xf1000000); |
| 97 | |
Stefan Roese | b0f80b9 | 2015-01-19 11:33:42 +0100 | [diff] [blame] | 98 | preloader_console_init(); |
| 99 | |
Stefan Roese | ade741b | 2015-07-15 15:36:52 +0200 | [diff] [blame] | 100 | timer_init(); |
| 101 | |
Stefan Roese | 09e89ab | 2016-02-10 07:23:00 +0100 | [diff] [blame] | 102 | /* Armada 375 does not support SerDes and DDR3 init yet */ |
| 103 | #if !defined(CONFIG_ARMADA_375) |
Stefan Roese | b0f80b9 | 2015-01-19 11:33:42 +0100 | [diff] [blame] | 104 | /* First init the serdes PHY's */ |
| 105 | serdes_phy_config(); |
| 106 | |
| 107 | /* Setup DDR */ |
| 108 | ddr3_init(); |
Stefan Roese | 09e89ab | 2016-02-10 07:23:00 +0100 | [diff] [blame] | 109 | #endif |
Stefan Roese | b0f80b9 | 2015-01-19 11:33:42 +0100 | [diff] [blame] | 110 | |
Stefan Roese | 944c7a3 | 2015-08-25 13:49:41 +0200 | [diff] [blame] | 111 | /* |
| 112 | * Return to the BootROM to continue the Marvell xmodem |
| 113 | * UART boot protocol. As initiated by the kwboot tool. |
| 114 | * |
| 115 | * This can only be done by the BootROM and not by the |
| 116 | * U-Boot SPL infrastructure, since the beginning of the |
| 117 | * image is already read and interpreted by the BootROM. |
| 118 | * SPL has no chance to receive this information. So we |
| 119 | * need to return to the BootROM to enable this xmodem |
| 120 | * UART download. |
| 121 | */ |
Stefan Roese | f4db6c9 | 2016-01-07 14:12:04 +0100 | [diff] [blame] | 122 | if (get_boot_device() == BOOT_DEVICE_UART) |
| 123 | return_to_bootrom(); |
Stefan Roese | b0f80b9 | 2015-01-19 11:33:42 +0100 | [diff] [blame] | 124 | } |