wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 1 | /* |
| 2 | * armboot - Startup Code for ARM720 CPU-core |
| 3 | * |
Albert ARIBAUD | fa82f87 | 2011-08-04 18:45:45 +0200 | [diff] [blame] | 4 | * Copyright (c) 2001 Marius Gröger <mag@sysgo.de> |
| 5 | * Copyright (c) 2002 Alex Züpke <azu@sysgo.de> |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 6 | * |
| 7 | * See file CREDITS for list of people who contributed to this |
| 8 | * project. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License as |
| 12 | * published by the Free Software Foundation; either version 2 of |
| 13 | * the License, or (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
wdenk | cdc7fea | 2004-07-11 22:27:55 +0000 | [diff] [blame] | 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 23 | * MA 02111-1307 USA |
| 24 | */ |
| 25 | |
Wolfgang Denk | 25ddd1f | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 26 | #include <asm-offsets.h> |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 27 | #include <config.h> |
| 28 | #include <version.h> |
wdenk | 3953988 | 2004-07-01 16:30:44 +0000 | [diff] [blame] | 29 | #include <asm/hardware.h> |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 30 | |
| 31 | /* |
| 32 | ************************************************************************* |
| 33 | * |
| 34 | * Jump vector table as in table 3.1 in [1] |
| 35 | * |
| 36 | ************************************************************************* |
| 37 | */ |
| 38 | |
| 39 | |
| 40 | .globl _start |
wdenk | cdc7fea | 2004-07-11 22:27:55 +0000 | [diff] [blame] | 41 | _start: b reset |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 42 | ldr pc, _undefined_instruction |
| 43 | ldr pc, _software_interrupt |
| 44 | ldr pc, _prefetch_abort |
| 45 | ldr pc, _data_abort |
| 46 | ldr pc, _not_used |
| 47 | ldr pc, _irq |
| 48 | ldr pc, _fiq |
| 49 | |
Allen Martin | c7da6c6 | 2012-08-31 08:30:07 +0000 | [diff] [blame] | 50 | #ifdef CONFIG_SPL_BUILD |
| 51 | _undefined_instruction: .word _undefined_instruction |
| 52 | _software_interrupt: .word _software_interrupt |
| 53 | _prefetch_abort: .word _prefetch_abort |
| 54 | _data_abort: .word _data_abort |
| 55 | _not_used: .word _not_used |
| 56 | _irq: .word _irq |
| 57 | _fiq: .word _fiq |
Allen Martin | c037c93 | 2012-08-31 08:30:09 +0000 | [diff] [blame] | 58 | _pad: .word 0x12345678 /* now 16*4=64 */ |
Allen Martin | c7da6c6 | 2012-08-31 08:30:07 +0000 | [diff] [blame] | 59 | #else |
wdenk | cdc7fea | 2004-07-11 22:27:55 +0000 | [diff] [blame] | 60 | _undefined_instruction: .word undefined_instruction |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 61 | _software_interrupt: .word software_interrupt |
| 62 | _prefetch_abort: .word prefetch_abort |
| 63 | _data_abort: .word data_abort |
| 64 | _not_used: .word not_used |
| 65 | _irq: .word irq |
| 66 | _fiq: .word fiq |
Allen Martin | c037c93 | 2012-08-31 08:30:09 +0000 | [diff] [blame] | 67 | _pad: .word 0x12345678 /* now 16*4=64 */ |
Allen Martin | c7da6c6 | 2012-08-31 08:30:07 +0000 | [diff] [blame] | 68 | #endif /* CONFIG_SPL_BUILD */ |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 69 | |
| 70 | .balignl 16,0xdeadbeef |
| 71 | |
| 72 | |
| 73 | /* |
| 74 | ************************************************************************* |
| 75 | * |
| 76 | * Startup Code (reset vector) |
| 77 | * |
wdenk | f6e20fc | 2004-02-08 19:38:38 +0000 | [diff] [blame] | 78 | * do important init only if we don't start from RAM! |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 79 | * relocate armboot to ram |
| 80 | * setup stack |
| 81 | * jump to second stage |
| 82 | * |
| 83 | ************************************************************************* |
| 84 | */ |
| 85 | |
Heiko Schocher | abef7b8 | 2010-09-17 13:10:52 +0200 | [diff] [blame] | 86 | .globl _TEXT_BASE |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 87 | _TEXT_BASE: |
Benoît Thébaudeau | 508611b | 2013-04-11 09:35:42 +0000 | [diff] [blame] | 88 | #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE) |
Allen Martin | c037c93 | 2012-08-31 08:30:09 +0000 | [diff] [blame] | 89 | .word CONFIG_SPL_TEXT_BASE |
| 90 | #else |
Wolfgang Denk | 14d0a02 | 2010-10-07 21:51:12 +0200 | [diff] [blame] | 91 | .word CONFIG_SYS_TEXT_BASE |
Allen Martin | c037c93 | 2012-08-31 08:30:09 +0000 | [diff] [blame] | 92 | #endif |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 93 | |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 94 | /* |
wdenk | f6e20fc | 2004-02-08 19:38:38 +0000 | [diff] [blame] | 95 | * These are defined in the board-specific linker script. |
Albert Aribaud | 3336ca6 | 2010-11-25 22:45:02 +0100 | [diff] [blame] | 96 | * Subtracting _start from them lets the linker put their |
| 97 | * relative position in the executable instead of leaving |
| 98 | * them null. |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 99 | */ |
Albert Aribaud | 3336ca6 | 2010-11-25 22:45:02 +0100 | [diff] [blame] | 100 | .globl _bss_start_ofs |
| 101 | _bss_start_ofs: |
| 102 | .word __bss_start - _start |
wdenk | f6e20fc | 2004-02-08 19:38:38 +0000 | [diff] [blame] | 103 | |
Benoît Thébaudeau | 7086e91 | 2013-04-11 09:35:46 +0000 | [diff] [blame] | 104 | .globl _image_copy_end_ofs |
| 105 | _image_copy_end_ofs: |
| 106 | .word __image_copy_end - _start |
| 107 | |
Albert Aribaud | 3336ca6 | 2010-11-25 22:45:02 +0100 | [diff] [blame] | 108 | .globl _bss_end_ofs |
| 109 | _bss_end_ofs: |
Simon Glass | 3929fb0 | 2013-03-14 06:54:53 +0000 | [diff] [blame] | 110 | .word __bss_end - _start |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 111 | |
Po-Yu Chuang | f326cbb | 2011-03-01 23:02:04 +0000 | [diff] [blame] | 112 | .globl _end_ofs |
| 113 | _end_ofs: |
| 114 | .word _end - _start |
| 115 | |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 116 | #ifdef CONFIG_USE_IRQ |
| 117 | /* IRQ stack memory (calculated at run-time) */ |
| 118 | .globl IRQ_STACK_START |
| 119 | IRQ_STACK_START: |
| 120 | .word 0x0badc0de |
| 121 | |
| 122 | /* IRQ stack memory (calculated at run-time) */ |
| 123 | .globl FIQ_STACK_START |
| 124 | FIQ_STACK_START: |
| 125 | .word 0x0badc0de |
| 126 | #endif |
| 127 | |
Heiko Schocher | abef7b8 | 2010-09-17 13:10:52 +0200 | [diff] [blame] | 128 | /* IRQ stack memory (calculated at run-time) + 8 bytes */ |
| 129 | .globl IRQ_STACK_START_IN |
| 130 | IRQ_STACK_START_IN: |
| 131 | .word 0x0badc0de |
| 132 | |
Heiko Schocher | abef7b8 | 2010-09-17 13:10:52 +0200 | [diff] [blame] | 133 | /* |
| 134 | * the actual reset code |
| 135 | */ |
| 136 | |
| 137 | reset: |
| 138 | /* |
| 139 | * set the cpu to SVC32 mode |
| 140 | */ |
| 141 | mrs r0,cpsr |
| 142 | bic r0,r0,#0x1f |
| 143 | orr r0,r0,#0xd3 |
| 144 | msr cpsr,r0 |
| 145 | |
| 146 | /* |
| 147 | * we do sys-critical inits only at reboot, |
| 148 | * not when booting from ram! |
| 149 | */ |
| 150 | #ifndef CONFIG_SKIP_LOWLEVEL_INIT |
| 151 | bl cpu_init_crit |
| 152 | #endif |
| 153 | |
Albert ARIBAUD | e05e5de | 2013-01-08 10:18:02 +0000 | [diff] [blame] | 154 | bl _main |
Heiko Schocher | abef7b8 | 2010-09-17 13:10:52 +0200 | [diff] [blame] | 155 | |
| 156 | /*------------------------------------------------------------------------------*/ |
| 157 | |
| 158 | /* |
Benoît Thébaudeau | 5c6db12 | 2013-04-11 09:35:53 +0000 | [diff] [blame] | 159 | * void relocate_code(addr_moni) |
Heiko Schocher | abef7b8 | 2010-09-17 13:10:52 +0200 | [diff] [blame] | 160 | * |
Benoît Thébaudeau | 959eaa7 | 2013-04-11 09:35:43 +0000 | [diff] [blame] | 161 | * This function relocates the monitor code. |
Heiko Schocher | abef7b8 | 2010-09-17 13:10:52 +0200 | [diff] [blame] | 162 | */ |
| 163 | .globl relocate_code |
| 164 | relocate_code: |
Benoît Thébaudeau | 5c6db12 | 2013-04-11 09:35:53 +0000 | [diff] [blame] | 165 | mov r6, r0 /* save addr of destination */ |
Heiko Schocher | abef7b8 | 2010-09-17 13:10:52 +0200 | [diff] [blame] | 166 | |
Heiko Schocher | abef7b8 | 2010-09-17 13:10:52 +0200 | [diff] [blame] | 167 | adr r0, _start |
Benoît Thébaudeau | 4b3db1c | 2013-04-11 09:35:45 +0000 | [diff] [blame] | 168 | subs r9, r6, r0 /* r9 <- relocation offset */ |
Albert ARIBAUD | e05e5de | 2013-01-08 10:18:02 +0000 | [diff] [blame] | 169 | beq relocate_done /* skip relocation */ |
Andreas Bießmann | a78fb68 | 2010-12-01 00:58:33 +0100 | [diff] [blame] | 170 | mov r1, r6 /* r1 <- scratch for copy_loop */ |
Benoît Thébaudeau | 7086e91 | 2013-04-11 09:35:46 +0000 | [diff] [blame] | 171 | ldr r3, _image_copy_end_ofs |
Albert Aribaud | 3336ca6 | 2010-11-25 22:45:02 +0100 | [diff] [blame] | 172 | add r2, r0, r3 /* r2 <- source end address */ |
Heiko Schocher | abef7b8 | 2010-09-17 13:10:52 +0200 | [diff] [blame] | 173 | |
Heiko Schocher | abef7b8 | 2010-09-17 13:10:52 +0200 | [diff] [blame] | 174 | copy_loop: |
Benoît Thébaudeau | 4b3db1c | 2013-04-11 09:35:45 +0000 | [diff] [blame] | 175 | ldmia r0!, {r10-r11} /* copy from source address [r0] */ |
| 176 | stmia r1!, {r10-r11} /* copy to target address [r1] */ |
Albert Aribaud | da90d4c | 2010-10-05 16:06:39 +0200 | [diff] [blame] | 177 | cmp r0, r2 /* until source end address [r2] */ |
| 178 | blo copy_loop |
Heiko Schocher | abef7b8 | 2010-09-17 13:10:52 +0200 | [diff] [blame] | 179 | |
Aneesh V | 401bb30 | 2011-07-13 05:11:07 +0000 | [diff] [blame] | 180 | #ifndef CONFIG_SPL_BUILD |
Albert Aribaud | 3336ca6 | 2010-11-25 22:45:02 +0100 | [diff] [blame] | 181 | /* |
| 182 | * fix .rel.dyn relocations |
| 183 | */ |
| 184 | ldr r0, _TEXT_BASE /* r0 <- Text base */ |
Albert Aribaud | 3336ca6 | 2010-11-25 22:45:02 +0100 | [diff] [blame] | 185 | ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ |
| 186 | add r10, r10, r0 /* r10 <- sym table in FLASH */ |
| 187 | ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ |
| 188 | add r2, r2, r0 /* r2 <- rel dyn start in FLASH */ |
| 189 | ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */ |
| 190 | add r3, r3, r0 /* r3 <- rel dyn end in FLASH */ |
Heiko Schocher | abef7b8 | 2010-09-17 13:10:52 +0200 | [diff] [blame] | 191 | fixloop: |
Albert Aribaud | 3336ca6 | 2010-11-25 22:45:02 +0100 | [diff] [blame] | 192 | ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ |
| 193 | add r0, r0, r9 /* r0 <- location to fix up in RAM */ |
| 194 | ldr r1, [r2, #4] |
Andreas Bießmann | 1f52d89 | 2010-12-01 00:58:35 +0100 | [diff] [blame] | 195 | and r7, r1, #0xff |
| 196 | cmp r7, #23 /* relative fixup? */ |
Albert Aribaud | 3336ca6 | 2010-11-25 22:45:02 +0100 | [diff] [blame] | 197 | beq fixrel |
Andreas Bießmann | 1f52d89 | 2010-12-01 00:58:35 +0100 | [diff] [blame] | 198 | cmp r7, #2 /* absolute fixup? */ |
Albert Aribaud | 3336ca6 | 2010-11-25 22:45:02 +0100 | [diff] [blame] | 199 | beq fixabs |
| 200 | /* ignore unknown type of fixup */ |
| 201 | b fixnext |
| 202 | fixabs: |
| 203 | /* absolute fix: set location to (offset) symbol value */ |
| 204 | mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ |
| 205 | add r1, r10, r1 /* r1 <- address of symbol in table */ |
| 206 | ldr r1, [r1, #4] /* r1 <- symbol value */ |
Wolfgang Denk | 3600945 | 2010-12-09 11:26:24 +0100 | [diff] [blame] | 207 | add r1, r1, r9 /* r1 <- relocated sym addr */ |
Albert Aribaud | 3336ca6 | 2010-11-25 22:45:02 +0100 | [diff] [blame] | 208 | b fixnext |
| 209 | fixrel: |
| 210 | /* relative fix: increase location by offset */ |
| 211 | ldr r1, [r0] |
| 212 | add r1, r1, r9 |
| 213 | fixnext: |
| 214 | str r1, [r0] |
| 215 | add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ |
Heiko Schocher | abef7b8 | 2010-09-17 13:10:52 +0200 | [diff] [blame] | 216 | cmp r2, r3 |
Wolfgang Denk | 79e6313 | 2010-10-23 23:22:38 +0200 | [diff] [blame] | 217 | blo fixloop |
Heiko Schocher | abef7b8 | 2010-09-17 13:10:52 +0200 | [diff] [blame] | 218 | #endif |
Heiko Schocher | abef7b8 | 2010-09-17 13:10:52 +0200 | [diff] [blame] | 219 | |
Albert ARIBAUD | e05e5de | 2013-01-08 10:18:02 +0000 | [diff] [blame] | 220 | relocate_done: |
Heiko Schocher | abef7b8 | 2010-09-17 13:10:52 +0200 | [diff] [blame] | 221 | |
Heiko Schocher | abef7b8 | 2010-09-17 13:10:52 +0200 | [diff] [blame] | 222 | mov pc, lr |
| 223 | |
Albert Aribaud | 3336ca6 | 2010-11-25 22:45:02 +0100 | [diff] [blame] | 224 | _rel_dyn_start_ofs: |
| 225 | .word __rel_dyn_start - _start |
| 226 | _rel_dyn_end_ofs: |
| 227 | .word __rel_dyn_end - _start |
| 228 | _dynsym_start_ofs: |
| 229 | .word __dynsym_start - _start |
Heiko Schocher | abef7b8 | 2010-09-17 13:10:52 +0200 | [diff] [blame] | 230 | |
Albert ARIBAUD | e05e5de | 2013-01-08 10:18:02 +0000 | [diff] [blame] | 231 | .globl c_runtime_cpu_setup |
| 232 | c_runtime_cpu_setup: |
| 233 | |
| 234 | mov pc, lr |
| 235 | |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 236 | /* |
| 237 | ************************************************************************* |
| 238 | * |
| 239 | * CPU_init_critical registers |
| 240 | * |
| 241 | * setup important registers |
| 242 | * setup memory timing |
| 243 | * |
| 244 | ************************************************************************* |
| 245 | */ |
| 246 | |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 247 | cpu_init_crit: |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 248 | |
Marek Vasut | 6f62f42 | 2012-10-03 08:54:08 +0000 | [diff] [blame] | 249 | #if !defined(CONFIG_TEGRA) |
Wolfgang Denk | 87cb686 | 2005-10-06 17:08:18 +0200 | [diff] [blame] | 250 | mov ip, lr |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 251 | /* |
| 252 | * before relocating, we have to setup RAM timing |
wdenk | f6e20fc | 2004-02-08 19:38:38 +0000 | [diff] [blame] | 253 | * because memory timing is board-dependent, you will |
wdenk | 400558b | 2005-04-02 23:52:25 +0000 | [diff] [blame] | 254 | * find a lowlevel_init.S in your board directory. |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 255 | */ |
wdenk | 400558b | 2005-04-02 23:52:25 +0000 | [diff] [blame] | 256 | bl lowlevel_init |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 257 | mov lr, ip |
Gary Jennejohn | 6bd2447 | 2007-01-24 12:16:56 +0100 | [diff] [blame] | 258 | #endif |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 259 | |
| 260 | mov pc, lr |
| 261 | |
| 262 | |
Allen Martin | c7da6c6 | 2012-08-31 08:30:07 +0000 | [diff] [blame] | 263 | #ifndef CONFIG_SPL_BUILD |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 264 | /* |
| 265 | ************************************************************************* |
| 266 | * |
| 267 | * Interrupt handling |
| 268 | * |
| 269 | ************************************************************************* |
| 270 | */ |
| 271 | |
| 272 | @ |
| 273 | @ IRQ stack frame. |
| 274 | @ |
| 275 | #define S_FRAME_SIZE 72 |
| 276 | |
| 277 | #define S_OLD_R0 68 |
| 278 | #define S_PSR 64 |
| 279 | #define S_PC 60 |
| 280 | #define S_LR 56 |
| 281 | #define S_SP 52 |
| 282 | |
| 283 | #define S_IP 48 |
| 284 | #define S_FP 44 |
| 285 | #define S_R10 40 |
| 286 | #define S_R9 36 |
| 287 | #define S_R8 32 |
| 288 | #define S_R7 28 |
| 289 | #define S_R6 24 |
| 290 | #define S_R5 20 |
| 291 | #define S_R4 16 |
| 292 | #define S_R3 12 |
| 293 | #define S_R2 8 |
| 294 | #define S_R1 4 |
| 295 | #define S_R0 0 |
| 296 | |
| 297 | #define MODE_SVC 0x13 |
| 298 | #define I_BIT 0x80 |
| 299 | |
| 300 | /* |
| 301 | * use bad_save_user_regs for abort/prefetch/undef/swi ... |
| 302 | * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling |
| 303 | */ |
| 304 | |
| 305 | .macro bad_save_user_regs |
| 306 | sub sp, sp, #S_FRAME_SIZE |
| 307 | stmia sp, {r0 - r12} @ Calling r0-r12 |
wdenk | cdc7fea | 2004-07-11 22:27:55 +0000 | [diff] [blame] | 308 | add r8, sp, #S_PC |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 309 | |
Heiko Schocher | abef7b8 | 2010-09-17 13:10:52 +0200 | [diff] [blame] | 310 | ldr r2, IRQ_STACK_START_IN |
wdenk | cdc7fea | 2004-07-11 22:27:55 +0000 | [diff] [blame] | 311 | ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0 |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 312 | add r0, sp, #S_FRAME_SIZE @ restore sp_SVC |
| 313 | |
| 314 | add r5, sp, #S_SP |
| 315 | mov r1, lr |
wdenk | cdc7fea | 2004-07-11 22:27:55 +0000 | [diff] [blame] | 316 | stmia r5, {r0 - r4} @ save sp_SVC, lr_SVC, pc, cpsr, old_r |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 317 | mov r0, sp |
| 318 | .endm |
| 319 | |
| 320 | .macro irq_save_user_regs |
| 321 | sub sp, sp, #S_FRAME_SIZE |
| 322 | stmia sp, {r0 - r12} @ Calling r0-r12 |
wdenk | cdc7fea | 2004-07-11 22:27:55 +0000 | [diff] [blame] | 323 | add r8, sp, #S_PC |
| 324 | stmdb r8, {sp, lr}^ @ Calling SP, LR |
| 325 | str lr, [r8, #0] @ Save calling PC |
| 326 | mrs r6, spsr |
| 327 | str r6, [r8, #4] @ Save CPSR |
| 328 | str r0, [r8, #8] @ Save OLD_R0 |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 329 | mov r0, sp |
| 330 | .endm |
| 331 | |
| 332 | .macro irq_restore_user_regs |
| 333 | ldmia sp, {r0 - lr}^ @ Calling r0 - lr |
| 334 | mov r0, r0 |
| 335 | ldr lr, [sp, #S_PC] @ Get PC |
| 336 | add sp, sp, #S_FRAME_SIZE |
| 337 | subs pc, lr, #4 @ return & move spsr_svc into cpsr |
| 338 | .endm |
| 339 | |
| 340 | .macro get_bad_stack |
Heiko Schocher | abef7b8 | 2010-09-17 13:10:52 +0200 | [diff] [blame] | 341 | ldr r13, IRQ_STACK_START_IN @ setup our mode stack |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 342 | |
| 343 | str lr, [r13] @ save caller lr / spsr |
| 344 | mrs lr, spsr |
wdenk | cdc7fea | 2004-07-11 22:27:55 +0000 | [diff] [blame] | 345 | str lr, [r13, #4] |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 346 | |
| 347 | mov r13, #MODE_SVC @ prepare SVC-Mode |
| 348 | msr spsr_c, r13 |
| 349 | mov lr, pc |
| 350 | movs pc, lr |
| 351 | .endm |
| 352 | |
| 353 | .macro get_irq_stack @ setup IRQ stack |
| 354 | ldr sp, IRQ_STACK_START |
| 355 | .endm |
| 356 | |
| 357 | .macro get_fiq_stack @ setup FIQ stack |
| 358 | ldr sp, FIQ_STACK_START |
| 359 | .endm |
| 360 | |
| 361 | /* |
| 362 | * exception handlers |
| 363 | */ |
wdenk | cdc7fea | 2004-07-11 22:27:55 +0000 | [diff] [blame] | 364 | .align 5 |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 365 | undefined_instruction: |
| 366 | get_bad_stack |
| 367 | bad_save_user_regs |
wdenk | cdc7fea | 2004-07-11 22:27:55 +0000 | [diff] [blame] | 368 | bl do_undefined_instruction |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 369 | |
| 370 | .align 5 |
| 371 | software_interrupt: |
| 372 | get_bad_stack |
| 373 | bad_save_user_regs |
wdenk | cdc7fea | 2004-07-11 22:27:55 +0000 | [diff] [blame] | 374 | bl do_software_interrupt |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 375 | |
| 376 | .align 5 |
| 377 | prefetch_abort: |
| 378 | get_bad_stack |
| 379 | bad_save_user_regs |
wdenk | cdc7fea | 2004-07-11 22:27:55 +0000 | [diff] [blame] | 380 | bl do_prefetch_abort |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 381 | |
| 382 | .align 5 |
| 383 | data_abort: |
| 384 | get_bad_stack |
| 385 | bad_save_user_regs |
wdenk | cdc7fea | 2004-07-11 22:27:55 +0000 | [diff] [blame] | 386 | bl do_data_abort |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 387 | |
| 388 | .align 5 |
| 389 | not_used: |
| 390 | get_bad_stack |
| 391 | bad_save_user_regs |
wdenk | cdc7fea | 2004-07-11 22:27:55 +0000 | [diff] [blame] | 392 | bl do_not_used |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 393 | |
| 394 | #ifdef CONFIG_USE_IRQ |
| 395 | |
| 396 | .align 5 |
| 397 | irq: |
| 398 | get_irq_stack |
| 399 | irq_save_user_regs |
wdenk | cdc7fea | 2004-07-11 22:27:55 +0000 | [diff] [blame] | 400 | bl do_irq |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 401 | irq_restore_user_regs |
| 402 | |
| 403 | .align 5 |
| 404 | fiq: |
| 405 | get_fiq_stack |
| 406 | /* someone ought to write a more effiction fiq_save_user_regs */ |
| 407 | irq_save_user_regs |
wdenk | cdc7fea | 2004-07-11 22:27:55 +0000 | [diff] [blame] | 408 | bl do_fiq |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 409 | irq_restore_user_regs |
| 410 | |
| 411 | #else |
| 412 | |
| 413 | .align 5 |
| 414 | irq: |
| 415 | get_bad_stack |
| 416 | bad_save_user_regs |
wdenk | cdc7fea | 2004-07-11 22:27:55 +0000 | [diff] [blame] | 417 | bl do_irq |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 418 | |
| 419 | .align 5 |
| 420 | fiq: |
| 421 | get_bad_stack |
| 422 | bad_save_user_regs |
wdenk | cdc7fea | 2004-07-11 22:27:55 +0000 | [diff] [blame] | 423 | bl do_fiq |
wdenk | fe8c280 | 2002-11-03 00:38:21 +0000 | [diff] [blame] | 424 | |
| 425 | #endif |
Allen Martin | c7da6c6 | 2012-08-31 08:30:07 +0000 | [diff] [blame] | 426 | #endif /* CONFIG_SPL_BUILD */ |