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wdenk3d3befa2004-03-14 15:06:13 +00001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * (C) Copyright 2002
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
8 *
9 * (C) Copyright 2003
10 * Texas Instruments, <www.ti.com>
11 * Kshitij Gupta <Kshitij@ti.com>
12 *
13 * (C) Copyright 2004
14 * ARM Ltd.
15 * Philippe Robin, <philippe.robin@arm.com>
16 *
17 * See file CREDITS for list of people who contributed to this
18 * project.
19 *
20 * This program is free software; you can redistribute it and/or
21 * modify it under the terms of the GNU General Public License as
22 * published by the Free Software Foundation; either version 2 of
23 * the License, or (at your option) any later version.
24 *
25 * This program is distributed in the hope that it will be useful,
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of
Wolfgang Denkfe7eb5d2005-09-25 02:00:47 +020027 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
wdenk3d3befa2004-03-14 15:06:13 +000028 * GNU General Public License for more details.
29 *
30 * You should have received a copy of the GNU General Public License
31 * along with this program; if not, write to the Free Software
32 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 * MA 02111-1307 USA
34 */
35
36#include <common.h>
Jean-Christophe PLAGNIOL-VILLARD576afd42009-05-17 00:58:37 +020037#ifdef CONFIG_PCI
Ben Warren10efa022008-08-31 20:37:00 -070038#include <netdev.h>
Jean-Christophe PLAGNIOL-VILLARD576afd42009-05-17 00:58:37 +020039#endif
Ben Warren10efa022008-08-31 20:37:00 -070040
Wolfgang Denkd87080b2006-03-31 18:32:53 +020041DECLARE_GLOBAL_DATA_PTR;
42
wdenk3d3befa2004-03-14 15:06:13 +000043void peripheral_power_enable (void);
44
45#if defined(CONFIG_SHOW_BOOT_PROGRESS)
46void show_boot_progress(int progress)
47{
Wolfgang Denk716c1dc2005-09-25 18:49:35 +020048 printf("Boot reached stage %d\n", progress);
wdenk3d3befa2004-03-14 15:06:13 +000049}
50#endif
51
52#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
53
wdenk3d3befa2004-03-14 15:06:13 +000054/*
55 * Miscellaneous platform dependent initialisations
56 */
57
58int board_init (void)
59{
wdenk3d3befa2004-03-14 15:06:13 +000060 /* arch number of Integrator Board */
Jean-Christophe PLAGNIOL-VILLARD576afd42009-05-17 00:58:37 +020061#ifdef CONFIG_ARCH_CINTEGRATOR
62 gd->bd->bi_arch_number = MACH_TYPE_CINTEGRATOR;
63#else
wdenk731215e2004-10-10 18:41:04 +000064 gd->bd->bi_arch_number = MACH_TYPE_INTEGRATOR;
Jean-Christophe PLAGNIOL-VILLARD576afd42009-05-17 00:58:37 +020065#endif
wdenk3d3befa2004-03-14 15:06:13 +000066
67 /* adress of boot parameters */
68 gd->bd->bi_boot_params = 0x00000100;
69
wdenkbc54f302004-07-11 18:10:30 +000070 gd->flags = 0;
71
Wolfgang Denk0148e8c2005-09-25 16:22:14 +020072#ifdef CONFIG_CM_REMAP
73extern void cm_remap(void);
74 cm_remap(); /* remaps writeable memory to 0x00000000 */
75#endif
Wolfgang Denk716c1dc2005-09-25 18:49:35 +020076
wdenk3d3befa2004-03-14 15:06:13 +000077 icache_enable ();
78
wdenk3d3befa2004-03-14 15:06:13 +000079 return 0;
80}
81
wdenk3d3befa2004-03-14 15:06:13 +000082int misc_init_r (void)
83{
84#ifdef CONFIG_PCI
85 pci_init();
86#endif
87 setenv("verify", "n");
88 return (0);
89}
90
wdenk3d3befa2004-03-14 15:06:13 +000091/******************************
92 Routine:
93 Description:
94******************************/
95int dram_init (void)
96{
Wolfgang Denk0148e8c2005-09-25 16:22:14 +020097 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
Wolfgang Denk716c1dc2005-09-25 18:49:35 +020098 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
Wolfgang Denk0148e8c2005-09-25 16:22:14 +020099
100#ifdef CONFIG_CM_SPD_DETECT
101 {
102extern void dram_query(void);
103 unsigned long cm_reg_sdram;
104 unsigned long sdram_shift;
105
106 dram_query(); /* Assembler accesses to CM registers */
Wolfgang Denk716c1dc2005-09-25 18:49:35 +0200107 /* Queries the SPD values */
Wolfgang Denk0148e8c2005-09-25 16:22:14 +0200108
109 /* Obtain the SDRAM size from the CM SDRAM register */
110
111 cm_reg_sdram = *(volatile ulong *)(CM_BASE + OS_SDRAM);
Wolfgang Denk716c1dc2005-09-25 18:49:35 +0200112 /* Register SDRAM size
Wolfgang Denk0148e8c2005-09-25 16:22:14 +0200113 *
Wolfgang Denk716c1dc2005-09-25 18:49:35 +0200114 * 0xXXXXXXbbb000bb 16 MB
115 * 0xXXXXXXbbb001bb 32 MB
116 * 0xXXXXXXbbb010bb 64 MB
117 * 0xXXXXXXbbb011bb 128 MB
118 * 0xXXXXXXbbb100bb 256 MB
119 *
Wolfgang Denk0148e8c2005-09-25 16:22:14 +0200120 */
Wolfgang Denk716c1dc2005-09-25 18:49:35 +0200121 sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
122 gd->bd->bi_dram[0].size = 0x01000000 << sdram_shift;
Wolfgang Denk0148e8c2005-09-25 16:22:14 +0200123
124 }
125#endif /* CM_SPD_DETECT */
126
wdenk3d3befa2004-03-14 15:06:13 +0000127 return 0;
128}
Wolfgang Denk74f43042005-09-25 01:48:28 +0200129
Jean-Christophe PLAGNIOL-VILLARD576afd42009-05-17 00:58:37 +0200130#ifdef CONFIG_PCI
Ben Warren10efa022008-08-31 20:37:00 -0700131int board_eth_init(bd_t *bis)
132{
133 return pci_eth_init(bis);
134}
Jean-Christophe PLAGNIOL-VILLARD576afd42009-05-17 00:58:37 +0200135#endif