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gerrit.cesnet.cz / github / trini / u-boot / 57285737cbae4638112a96e4b3ee78eda6182b6e / . / arch / arm / dts / imx8mq-librem5.dtsi
blob: ae08556b2ef2f0140f06a2027743a49c54c89023 [file] [log] [blame]
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018-2020 Purism SPC
4 */
5
6/dts-v1/;
7
8#include "dt-bindings/input/input.h"
9#include <dt-bindings/interrupt-controller/irq.h>
Marcel Ziswilercb9b70f2022-11-07 22:22:38 +0100[diff] [blame]10#include <dt-bindings/leds/common.h>
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]11#include "dt-bindings/pwm/pwm.h"
12#include "dt-bindings/usb/pd.h"
13#include "imx8mq.dtsi"
14
15/ {
16 model = "Purism Librem 5";
17 compatible = "purism,librem5", "fsl,imx8mq";
Marcel Ziswilercb9b70f2022-11-07 22:22:38 +0100[diff] [blame]18 chassis-type = "handset";
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]19
20 backlight_dsi: backlight-dsi {
21 compatible = "led-backlight";
22 leds = <&led_backlight>;
23 };
24
25 pmic_osc: clock-pmic {
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <32768>;
29 clock-output-names = "pmic_osc";
30 };
31
32 chosen {
33 stdout-path = &uart1;
34 };
35
36 gpio-keys {
37 compatible = "gpio-keys";
38 pinctrl-names = "default";
39 pinctrl-0 = <&pinctrl_keys>;
40
Marcel Ziswilercb9b70f2022-11-07 22:22:38 +0100[diff] [blame]41 key-vol-down {
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]42 label = "VOL_DOWN";
43 gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
44 linux,code = <KEY_VOLUMEDOWN>;
45 debounce-interval = <50>;
Marcel Ziswilercb9b70f2022-11-07 22:22:38 +0100[diff] [blame]46 wakeup-source;
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]47 };
48
Marcel Ziswilercb9b70f2022-11-07 22:22:38 +0100[diff] [blame]49 key-vol-up {
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]50 label = "VOL_UP";
51 gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
52 linux,code = <KEY_VOLUMEUP>;
53 debounce-interval = <50>;
Marcel Ziswilercb9b70f2022-11-07 22:22:38 +0100[diff] [blame]54 wakeup-source;
55 };
56 };
57
58 led-controller {
59 compatible = "pwm-leds";
60
61 led-0 {
62 function = LED_FUNCTION_STATUS;
63 color = <LED_COLOR_ID_BLUE>;
64 max-brightness = <248>;
65 pwms = <&pwm2 0 50000 0>;
66 };
67
68 led-1 {
69 function = LED_FUNCTION_STATUS;
70 color = <LED_COLOR_ID_GREEN>;
71 max-brightness = <248>;
72 pwms = <&pwm4 0 50000 0>;
73 };
74
75 led-2 {
76 function = LED_FUNCTION_STATUS;
77 color = <LED_COLOR_ID_RED>;
78 max-brightness = <248>;
79 pwms = <&pwm3 0 50000 0>;
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]80 };
81 };
82
83 reg_aud_1v8: regulator-audio-1v8 {
84 compatible = "regulator-fixed";
85 pinctrl-names = "default";
86 pinctrl-0 = <&pinctrl_audiopwr>;
87 regulator-name = "AUDIO_PWR_EN";
88 regulator-min-microvolt = <1800000>;
89 regulator-max-microvolt = <1800000>;
90 gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
91 enable-active-high;
92 };
93
Marcel Ziswilercb9b70f2022-11-07 22:22:38 +0100[diff] [blame]94 /*
95 * the pinctrl for reg_csi_1v8 and reg_vcam_1v8 is added to the PMIC
96 * since we can't have it twice in the 2 different regulator nodes.
97 */
98 reg_csi_1v8: regulator-csi-1v8 {
99 compatible = "regulator-fixed";
100 regulator-name = "CAMERA_VDDIO_1V8";
101 regulator-min-microvolt = <1800000>;
102 regulator-max-microvolt = <1800000>;
103 vin-supply = <&reg_vdd_3v3>;
104 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
105 enable-active-high;
106 };
107
108 /* controlled by the CAMERA_POWER_KEY HKS */
109 reg_vcam_1v2: regulator-vcam-1v2 {
110 compatible = "regulator-fixed";
111 regulator-name = "CAMERA_VDDD_1V2";
112 regulator-min-microvolt = <1200000>;
113 regulator-max-microvolt = <1200000>;
114 vin-supply = <&reg_vdd_1v8>;
115 enable-active-high;
116 };
117
118 reg_vcam_2v8: regulator-vcam-2v8 {
119 compatible = "regulator-fixed";
120 regulator-name = "CAMERA_VDDA_2V8";
121 regulator-min-microvolt = <2800000>;
122 regulator-max-microvolt = <2800000>;
123 vin-supply = <&reg_vdd_3v3>;
124 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
125 enable-active-high;
126 };
127
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]128 reg_gnss: regulator-gnss {
129 compatible = "regulator-fixed";
130 pinctrl-names = "default";
131 pinctrl-0 = <&pinctrl_gnsspwr>;
132 regulator-name = "GNSS";
133 regulator-min-microvolt = <3300000>;
134 regulator-max-microvolt = <3300000>;
135 gpio = <&gpio3 12 GPIO_ACTIVE_HIGH>;
136 enable-active-high;
137 };
138
139 reg_hub: regulator-hub {
140 compatible = "regulator-fixed";
141 pinctrl-names = "default";
142 pinctrl-0 = <&pinctrl_hub_pwr>;
143 regulator-name = "HUB";
144 regulator-min-microvolt = <3300000>;
145 regulator-max-microvolt = <3300000>;
146 gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
147 enable-active-high;
148 };
149
150 reg_lcd_1v8: regulator-lcd-1v8 {
151 compatible = "regulator-fixed";
152 pinctrl-names = "default";
153 pinctrl-0 = <&pinctrl_dsien>;
154 regulator-name = "LCD_1V8";
155 regulator-min-microvolt = <1800000>;
156 regulator-max-microvolt = <1800000>;
157 vin-supply = <&reg_vdd_1v8>;
158 gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
159 enable-active-high;
160 /* Otherwise i2c3 is not functional */
161 regulator-always-on;
162 };
163
164 reg_lcd_3v4: regulator-lcd-3v4 {
165 compatible = "regulator-fixed";
166 regulator-name = "LCD_3V4";
167 pinctrl-names = "default";
168 pinctrl-0 = <&pinctrl_dsibiasen>;
169 vin-supply = <&reg_vsys_3v4>;
170 gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>;
171 enable-active-high;
172 };
173
174 reg_vdd_sen: regulator-vdd-sen {
175 compatible = "regulator-fixed";
176 regulator-name = "VDD_SEN";
177 regulator-min-microvolt = <3300000>;
178 regulator-max-microvolt = <3300000>;
179 };
180
181 reg_vdd_1v8: regulator-vdd-1v8 {
182 compatible = "regulator-fixed";
183 regulator-name = "VDD_1V8";
184 regulator-min-microvolt = <1800000>;
185 regulator-max-microvolt = <1800000>;
186 vin-supply = <&buck7_reg>;
187 };
188
189 reg_vdd_3v3: regulator-vdd-3v3 {
190 compatible = "regulator-fixed";
191 regulator-name = "VDD_3V3";
192 regulator-min-microvolt = <3300000>;
193 regulator-max-microvolt = <3300000>;
194 };
195
196 reg_vsys_3v4: regulator-vsys-3v4 {
197 compatible = "regulator-fixed";
198 regulator-name = "VSYS_3V4";
199 regulator-min-microvolt = <3400000>;
200 regulator-max-microvolt = <3400000>;
201 regulator-always-on;
202 };
203
204 reg_wifi_3v3: regulator-wifi-3v3 {
205 compatible = "regulator-fixed";
206 pinctrl-names = "default";
207 pinctrl-0 = <&pinctrl_wifi_pwr>;
208 regulator-name = "3V3_WIFI";
209 regulator-min-microvolt = <3300000>;
210 regulator-max-microvolt = <3300000>;
211 gpio = <&gpio3 10 GPIO_ACTIVE_HIGH>;
212 enable-active-high;
213 vin-supply = <&reg_vdd_3v3>;
214 };
215
216 sound {
217 compatible = "simple-audio-card";
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_hp>;
220 simple-audio-card,name = "Librem 5";
221 simple-audio-card,format = "i2s";
222 simple-audio-card,widgets =
223 "Headphone", "Headphones",
224 "Microphone", "Headset Mic",
225 "Microphone", "Digital Mic",
226 "Speaker", "Speaker";
227 simple-audio-card,routing =
228 "Headphones", "HPOUTL",
229 "Headphones", "HPOUTR",
230 "Speaker", "SPKOUTL",
231 "Speaker", "SPKOUTR",
232 "Headset Mic", "MICBIAS",
233 "IN3R", "Headset Mic",
234 "DMICDAT", "Digital Mic";
235 simple-audio-card,hp-det-gpio = <&gpio3 9 GPIO_ACTIVE_HIGH>;
236
237 simple-audio-card,cpu {
238 sound-dai = <&sai2>;
239 };
240
241 simple-audio-card,codec {
242 sound-dai = <&codec>;
243 clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
244 frame-master;
245 bitclock-master;
246 };
247 };
248
249 sound-wwan {
250 compatible = "simple-audio-card";
251 simple-audio-card,name = "Modem";
252 simple-audio-card,format = "i2s";
253
254 simple-audio-card,cpu {
255 sound-dai = <&sai6>;
256 frame-inversion;
257 };
258
259 simple-audio-card,codec {
260 sound-dai = <&bm818_codec>;
261 frame-master;
262 bitclock-master;
263 };
264 };
265
266 usdhc2_pwrseq: pwrseq {
267 pinctrl-names = "default";
268 pinctrl-0 = <&pinctrl_bt>, <&pinctrl_wifi_disable>;
269 compatible = "mmc-pwrseq-simple";
270 reset-gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>,
271 <&gpio4 29 GPIO_ACTIVE_HIGH>;
272 };
273
274 bm818_codec: sound-wwan-codec {
275 compatible = "broadmobi,bm818", "option,gtm601";
276 #sound-dai-cells = <0>;
277 };
278
279 vibrator {
280 compatible = "pwm-vibrator";
281 pwms = <&pwm1 0 1000000000 0>;
282 pwm-names = "enable";
283 vcc-supply = <&reg_vdd_3v3>;
284 };
285};
286
287&A53_0 {
288 cpu-supply = <&buck2_reg>;
289};
290
291&A53_1 {
292 cpu-supply = <&buck2_reg>;
293};
294
295&A53_2 {
296 cpu-supply = <&buck2_reg>;
297};
298
299&A53_3 {
300 cpu-supply = <&buck2_reg>;
301};
302
Marcel Ziswilercb9b70f2022-11-07 22:22:38 +0100[diff] [blame]303&csi1 {
304 status = "okay";
305};
306
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]307&ddrc {
308 operating-points-v2 = <&ddrc_opp_table>;
Marcel Ziswilercb9b70f2022-11-07 22:22:38 +0100[diff] [blame]309 status = "okay";
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]310
311 ddrc_opp_table: opp-table {
312 compatible = "operating-points-v2";
313
314 opp-25M {
315 opp-hz = /bits/ 64 <25000000>;
316 };
317
318 opp-100M {
319 opp-hz = /bits/ 64 <100000000>;
320 };
321
322 opp-800M {
323 opp-hz = /bits/ 64 <800000000>;
324 };
325 };
326};
327
328&dphy {
329 status = "okay";
330};
331
332&ecspi1 {
333 pinctrl-names = "default";
334 pinctrl-0 = <&pinctrl_ecspi1>;
335 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
336 #address-cells = <1>;
337 #size-cells = <0>;
338 status = "okay";
339
340 nor_flash: flash@0 {
341 compatible = "jedec,spi-nor";
342 reg = <0>;
343 spi-max-frequency = <1000000>;
344 #address-cells = <1>;
345 #size-cells = <1>;
346
347 partition@0 {
348 label = "protected0";
349 reg = <0x0 0x30000>;
350 read-only;
351 };
352
353 partition@30000 {
Marcel Ziswilercb9b70f2022-11-07 22:22:38 +0100[diff] [blame]354 label = "firmware";
355 reg = <0x30000 0x1d0000>;
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]356 read-only;
357 };
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]358 };
359};
360
361&gpio1 {
362 pinctrl-names = "default";
363 pinctrl-0 = <&pinctrl_pmic_5v>;
364
365 pmic-5v-hog {
366 gpio-hog;
367 gpios = <1 GPIO_ACTIVE_HIGH>;
368 input;
369 lane-mapping = "pmic-5v";
370 };
371};
372
373&iomuxc {
374 pinctrl_audiopwr: audiopwrgrp {
375 fsl,pins = <
376 /* AUDIO_POWER_EN_3V3 */
377 MX8MQ_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x83
378 >;
379 };
380
381 pinctrl_bl: blgrp {
382 fsl,pins = <
383 /* BACKLINGE_EN */
384 MX8MQ_IOMUXC_NAND_DQS_GPIO3_IO14 0x83
385 >;
386 };
387
388 pinctrl_bt: btgrp {
389 fsl,pins = <
390 /* BT_REG_ON */
391 MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x83
392 >;
393 };
394
Marcel Ziswilercb9b70f2022-11-07 22:22:38 +0100[diff] [blame]395 pinctrl_camera_pwr: camerapwrgrp {
396 fsl,pins = <
397 /* CAMERA_PWR_EN_3V3 */
398 MX8MQ_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x83
399 >;
400 };
401
402 pinctrl_csi1: csi1grp {
403 fsl,pins = <
404 /* CSI1_NRST */
405 MX8MQ_IOMUXC_ENET_RXC_GPIO1_IO25 0x83
406 >;
407 };
408
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]409 pinctrl_charger_in: chargeringrp {
410 fsl,pins = <
411 /* CHRG_INT */
412 MX8MQ_IOMUXC_NAND_CE2_B_GPIO3_IO3 0x80
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]413 >;
414 };
415
416 pinctrl_dsibiasen: dsibiasengrp {
417 fsl,pins = <
418 /* DSI_BIAS_EN */
419 MX8MQ_IOMUXC_ENET_TD1_GPIO1_IO20 0x83
420 >;
421 };
422
423 pinctrl_dsien: dsiengrp {
424 fsl,pins = <
425 /* DSI_EN_3V3 */
426 MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x83
427 >;
428 };
429
430 pinctrl_dsirst: dsirstgrp {
431 fsl,pins = <
432 /* DSI_RST */
433 MX8MQ_IOMUXC_ENET_RD3_GPIO1_IO29 0x83
434 /* DSI_TE */
435 MX8MQ_IOMUXC_ENET_RD2_GPIO1_IO28 0x83
436 /* TP_RST */
437 MX8MQ_IOMUXC_ENET_RX_CTL_GPIO1_IO24 0x83
438 >;
439 };
440
441 pinctrl_ecspi1: ecspigrp {
442 fsl,pins = <
443 MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x83
444 MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x83
445 MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19
446 MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x83
447 >;
448 };
449
450 pinctrl_gauge: gaugegrp {
451 fsl,pins = <
452 /* BAT_LOW */
453 MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20 0x80
454 >;
455 };
456
457 pinctrl_gnsspwr: gnsspwrgrp {
458 fsl,pins = <
459 /* GPS3V3_EN */
460 MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12 0x83
461 >;
462 };
463
464 pinctrl_haptic: hapticgrp {
465 fsl,pins = <
466 /* MOTO */
467 MX8MQ_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT 0x83
468 >;
469 };
470
471 pinctrl_hp: hpgrp {
472 fsl,pins = <
473 /* HEADPHONE_DET_1V8 */
474 MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9 0x180
475 >;
476 };
477
478 pinctrl_hub_pwr: hubpwrgrp {
479 fsl,pins = <
480 /* HUB_PWR_3V3_EN */
481 MX8MQ_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x83
482 >;
483 };
484
485 pinctrl_i2c1: i2c1grp {
486 fsl,pins = <
487 MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x40000026
488 MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x40000026
489 >;
490 };
491
492 pinctrl_i2c2: i2c2grp {
493 fsl,pins = <
494 MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x40000026
495 MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA 0x40000026
496 >;
497 };
498
499 pinctrl_i2c3: i2c3grp {
500 fsl,pins = <
501 MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x40000026
502 MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x40000026
503 >;
504 };
505
506 pinctrl_i2c4: i2c4grp {
507 fsl,pins = <
508 MX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL 0x40000026
509 MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA 0x40000026
510 >;
511 };
512
513 pinctrl_keys: keysgrp {
514 fsl,pins = <
515 /* VOL- */
516 MX8MQ_IOMUXC_ENET_MDIO_GPIO1_IO17 0x01C0
517 /* VOL+ */
518 MX8MQ_IOMUXC_ENET_MDC_GPIO1_IO16 0x01C0
519 >;
520 };
521
522 pinctrl_led_b: ledbgrp {
523 fsl,pins = <
524 /* LED_B */
525 MX8MQ_IOMUXC_GPIO1_IO13_PWM2_OUT 0x06
526 >;
527 };
528
529 pinctrl_led_g: ledggrp {
530 fsl,pins = <
531 /* LED_G */
532 MX8MQ_IOMUXC_SAI3_MCLK_PWM4_OUT 0x06
533 >;
534 };
535
536 pinctrl_led_r: ledrgrp {
537 fsl,pins = <
538 /* LED_R */
539 MX8MQ_IOMUXC_SPDIF_TX_PWM3_OUT 0x06
540 >;
541 };
542
543 pinctrl_mag: maggrp {
544 fsl,pins = <
545 /* INT_MAG */
546 MX8MQ_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x80
547 >;
548 };
549
550 pinctrl_pmic: pmicgrp {
551 fsl,pins = <
552 /* PMIC_NINT */
553 MX8MQ_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x80
554 >;
555 };
556
557 pinctrl_pmic_5v: pmic5vgrp {
558 fsl,pins = <
559 /* PMIC_5V */
560 MX8MQ_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x80
561 >;
562 };
563
564 pinctrl_prox: proxgrp {
565 fsl,pins = <
566 /* INT_LIGHT */
567 MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7 0x80
568 >;
569 };
570
571 pinctrl_rtc: rtcgrp {
572 fsl,pins = <
573 /* RTC_INT */
574 MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x80
575 >;
576 };
577
578 pinctrl_sai2: sai2grp {
579 fsl,pins = <
580 MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6
581 MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6
582 MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK 0xd6
583 MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6
584 MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6
585 >;
586 };
587
588 pinctrl_sai6: sai6grp {
589 fsl,pins = <
590 MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0 0xd6
591 MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC 0xd6
592 MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK 0xd6
593 MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0 0xd6
594 >;
595 };
596
597 pinctrl_tcpc: tcpcgrp {
598 fsl,pins = <
599 /* TCPC_INT */
600 MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x01C0
601 >;
602 };
603
604 pinctrl_touch: touchgrp {
605 fsl,pins = <
606 /* TP_INT */
607 MX8MQ_IOMUXC_ENET_RD1_GPIO1_IO27 0x80
608 >;
609 };
610
611 pinctrl_typec: typecgrp {
612 fsl,pins = <
613 /* TYPEC_MUX_EN */
614 MX8MQ_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x83
615 >;
616 };
617
618 pinctrl_uart1: uart1grp {
619 fsl,pins = <
620 MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49
621 MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49
622 >;
623 };
624
625 pinctrl_uart2: uart2grp {
626 fsl,pins = <
627 MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x49
628 MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x49
629 >;
630 };
631
632 pinctrl_uart3: uart3grp {
633 fsl,pins = <
634 MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49
635 MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49
636 >;
637 };
638
639 pinctrl_uart4: uart4grp {
640 fsl,pins = <
641 MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x49
642 MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x49
643 MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x49
644 MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x49
645 >;
646 };
647
648 pinctrl_usdhc1: usdhc1grp {
649 fsl,pins = <
650 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83
651 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3
652 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3
653 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3
654 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3
655 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3
656 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3
657 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3
658 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3
659 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3
660 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x83
661 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
662 >;
663 };
664
665 pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
666 fsl,pins = <
667 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d
668 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd
669 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xcd
670 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xcd
671 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xcd
672 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xcd
673 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xcd
674 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xcd
675 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xcd
676 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xcd
677 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x8d
678 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
679 >;
680 };
681
682 pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
683 fsl,pins = <
684 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f
685 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf
686 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xdf
687 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xdf
688 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xdf
689 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xdf
690 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xdf
691 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xdf
692 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xdf
693 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xdf
694 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x9f
695 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
696 >;
697 };
698
699 pinctrl_usdhc2: usdhc2grp {
700 fsl,pins = <
701 MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80
702 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83
703 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3
704 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3
705 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3
706 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3
707 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3
708 MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
709 >;
710 };
711
712 pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
713 fsl,pins = <
714 MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80
715 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x8d
716 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcd
717 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcd
718 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcd
719 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcd
720 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcd
721 MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
722 >;
723 };
724
725 pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
726 fsl,pins = <
727 MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80
728 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x9f
729 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcf
730 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcf
731 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcf
732 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcf
733 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcf
734 MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
735 >;
736 };
737
738 pinctrl_wifi_disable: wifidisablegrp {
739 fsl,pins = <
740 /* WIFI_REG_ON */
741 MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29 0x83
742 >;
743 };
744
745 pinctrl_wifi_pwr: wifipwrgrp {
746 fsl,pins = <
747 /* WIFI3V3_EN */
748 MX8MQ_IOMUXC_NAND_DATA04_GPIO3_IO10 0x83
749 >;
750 };
751
752 pinctrl_wdog: wdoggrp {
753 fsl,pins = <
754 /* nWDOG */
755 MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x1f
756 >;
757 };
758};
759
760&i2c1 {
761 clock-frequency = <387000>;
762 pinctrl-names = "default";
763 pinctrl-0 = <&pinctrl_i2c1>;
764 status = "okay";
765
766 typec_pd: usb-pd@3f {
767 compatible = "ti,tps6598x";
768 reg = <0x3f>;
769 pinctrl-names = "default";
770 pinctrl-0 = <&pinctrl_typec>, <&pinctrl_tcpc>;
771 interrupt-parent = <&gpio1>;
772 interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
773 interrupt-names = "irq";
774
775 connector {
Marcel Ziswilercb9b70f2022-11-07 22:22:38 +0100[diff] [blame]776 compatible = "usb-c-connector";
777 label = "USB-C";
778 data-role = "dual";
779
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]780 ports {
781 #address-cells = <1>;
782 #size-cells = <0>;
783
784 port@0 {
785 reg = <0>;
786
787 usb_con_hs: endpoint {
788 remote-endpoint = <&typec_hs>;
789 };
790 };
791
792 port@1 {
793 reg = <1>;
794
795 usb_con_ss: endpoint {
796 remote-endpoint = <&typec_ss>;
797 };
798 };
799 };
800 };
801 };
802
803 pmic: pmic@4b {
804 compatible = "rohm,bd71837";
805 reg = <0x4b>;
806 pinctrl-names = "default";
Marcel Ziswilercb9b70f2022-11-07 22:22:38 +0100[diff] [blame]807 pinctrl-0 = <&pinctrl_pmic>, <&pinctrl_camera_pwr>;
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]808 clocks = <&pmic_osc>;
809 clock-names = "osc";
810 clock-output-names = "pmic_clk";
811 interrupt-parent = <&gpio1>;
812 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
813 rohm,reset-snvs-powered;
814
815 regulators {
816 buck1_reg: BUCK1 {
817 regulator-name = "buck1";
818 regulator-min-microvolt = <700000>;
819 regulator-max-microvolt = <1300000>;
820 regulator-boot-on;
821 regulator-ramp-delay = <1250>;
822 rohm,dvs-run-voltage = <900000>;
823 rohm,dvs-idle-voltage = <850000>;
824 rohm,dvs-suspend-voltage = <800000>;
825 regulator-always-on;
826 };
827
828 buck2_reg: BUCK2 {
829 regulator-name = "buck2";
830 regulator-min-microvolt = <700000>;
831 regulator-max-microvolt = <1300000>;
832 regulator-boot-on;
833 regulator-ramp-delay = <1250>;
834 rohm,dvs-run-voltage = <1000000>;
835 rohm,dvs-idle-voltage = <900000>;
836 regulator-always-on;
837 };
838
839 buck3_reg: BUCK3 {
840 regulator-name = "buck3";
841 regulator-min-microvolt = <700000>;
842 regulator-max-microvolt = <1300000>;
843 regulator-boot-on;
844 rohm,dvs-run-voltage = <900000>;
845 };
846
847 buck4_reg: BUCK4 {
848 regulator-name = "buck4";
849 regulator-min-microvolt = <700000>;
850 regulator-max-microvolt = <1300000>;
851 rohm,dvs-run-voltage = <1000000>;
852 };
853
854 buck5_reg: BUCK5 {
855 regulator-name = "buck5";
856 regulator-min-microvolt = <700000>;
857 regulator-max-microvolt = <1350000>;
858 regulator-boot-on;
859 regulator-always-on;
860 };
861
862 buck6_reg: BUCK6 {
863 regulator-name = "buck6";
864 regulator-min-microvolt = <3000000>;
865 regulator-max-microvolt = <3300000>;
866 regulator-boot-on;
867 regulator-always-on;
868 };
869
870 buck7_reg: BUCK7 {
871 regulator-name = "buck7";
872 regulator-min-microvolt = <1605000>;
873 regulator-max-microvolt = <1995000>;
874 regulator-boot-on;
875 regulator-always-on;
876 };
877
878 buck8_reg: BUCK8 {
879 regulator-name = "buck8";
880 regulator-min-microvolt = <800000>;
881 regulator-max-microvolt = <1400000>;
882 regulator-boot-on;
883 regulator-always-on;
884 };
885
886 ldo1_reg: LDO1 {
887 regulator-name = "ldo1";
888 regulator-min-microvolt = <3000000>;
889 regulator-max-microvolt = <3300000>;
890 regulator-boot-on;
891 /* leave on for snvs power button */
892 regulator-always-on;
893 };
894
895 ldo2_reg: LDO2 {
896 regulator-name = "ldo2";
897 regulator-min-microvolt = <900000>;
898 regulator-max-microvolt = <900000>;
899 regulator-boot-on;
900 /* leave on for snvs power button */
901 regulator-always-on;
902 };
903
904 ldo3_reg: LDO3 {
905 regulator-name = "ldo3";
906 regulator-min-microvolt = <1800000>;
907 regulator-max-microvolt = <3300000>;
908 regulator-boot-on;
909 regulator-always-on;
910 };
911
912 ldo4_reg: LDO4 {
913 regulator-name = "ldo4";
914 regulator-min-microvolt = <900000>;
915 regulator-max-microvolt = <1800000>;
916 regulator-boot-on;
917 regulator-always-on;
918 };
919
920 ldo5_reg: LDO5 {
921 /* VDD_PHY_0V9 - MIPI and HDMI domains */
922 regulator-name = "ldo5";
923 regulator-min-microvolt = <1800000>;
924 regulator-max-microvolt = <3300000>;
925 regulator-always-on;
926 };
927
928 ldo6_reg: LDO6 {
929 /* VDD_PHY_0V9 - MIPI, HDMI and USB domains */
930 regulator-name = "ldo6";
931 regulator-min-microvolt = <900000>;
932 regulator-max-microvolt = <1800000>;
933 regulator-boot-on;
934 regulator-always-on;
935 };
936
937 ldo7_reg: LDO7 {
938 /* VDD_PHY_3V3 - USB domain */
939 regulator-name = "ldo7";
940 regulator-min-microvolt = <1800000>;
941 regulator-max-microvolt = <3300000>;
942 regulator-boot-on;
943 regulator-always-on;
944 };
945 };
946 };
947
948 rtc@68 {
949 compatible = "microcrystal,rv4162";
950 reg = <0x68>;
951 pinctrl-names = "default";
952 pinctrl-0 = <&pinctrl_rtc>;
953 interrupt-parent = <&gpio1>;
954 interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
955 };
956};
957
958&i2c2 {
959 clock-frequency = <387000>;
960 pinctrl-names = "default";
961 pinctrl-0 = <&pinctrl_i2c2>;
962 status = "okay";
963
964 magnetometer@1e {
965 compatible = "st,lsm9ds1-magn";
966 reg = <0x1e>;
967 pinctrl-names = "default";
968 pinctrl-0 = <&pinctrl_mag>;
969 interrupt-parent = <&gpio3>;
970 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
971 vdd-supply = <&reg_vdd_sen>;
972 vddio-supply = <&reg_vdd_1v8>;
973 };
974
975 regulator@3e {
976 compatible = "tps65132";
977 reg = <0x3e>;
978
979 reg_lcd_avdd: outp {
980 regulator-name = "LCD_AVDD";
981 vin-supply = <&reg_lcd_3v4>;
982 };
983
984 reg_lcd_avee: outn {
985 regulator-name = "LCD_AVEE";
986 vin-supply = <&reg_lcd_3v4>;
987 };
988 };
989
990 proximity: prox@60 {
991 compatible = "vishay,vcnl4040";
992 reg = <0x60>;
993 pinctrl-names = "default";
994 pinctrl-0 = <&pinctrl_prox>;
995 interrupt-parent = <&gpio3>;
996 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
997 };
998
999 accel_gyro: accel-gyro@6a {
1000 compatible = "st,lsm9ds1-imu";
1001 reg = <0x6a>;
1002 vdd-supply = <&reg_vdd_sen>;
1003 vddio-supply = <&reg_vdd_1v8>;
1004 };
1005};
1006
1007&i2c3 {
1008 clock-frequency = <387000>;
1009 pinctrl-names = "default";
1010 pinctrl-0 = <&pinctrl_i2c3>;
1011 status = "okay";
1012
1013 codec: audio-codec@1a {
1014 compatible = "wlf,wm8962";
1015 reg = <0x1a>;
1016 clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
1017 assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
1018 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
1019 assigned-clock-rates = <24576000>;
1020 #sound-dai-cells = <0>;
1021 mic-cfg = <0x200>;
1022 DCVDD-supply = <&reg_aud_1v8>;
1023 DBVDD-supply = <&reg_aud_1v8>;
1024 AVDD-supply = <&reg_aud_1v8>;
1025 CPVDD-supply = <&reg_aud_1v8>;
1026 MICVDD-supply = <&reg_aud_1v8>;
1027 PLLVDD-supply = <&reg_aud_1v8>;
1028 SPKVDD1-supply = <&reg_vsys_3v4>;
1029 SPKVDD2-supply = <&reg_vsys_3v4>;
1030 gpio-cfg = <
1031 0x0000 /* n/c */
1032 0x0001 /* gpio2, 1: default */
1033 0x0013 /* gpio3, 2: dmicclk */
1034 0x0000 /* n/c, 3: default */
1035 0x8014 /* gpio5, 4: dmic_dat */
1036 0x0000 /* gpio6, 5: default */
1037 >;
1038 };
1039
Marcel Ziswilercb9b70f2022-11-07 22:22:38 +0100[diff] [blame]1040 camera_front: camera@20 {
1041 compatible = "hynix,hi846";
1042 reg = <0x20>;
1043 pinctrl-names = "default";
1044 pinctrl-0 = <&pinctrl_csi1>;
1045 clocks = <&clk IMX8MQ_CLK_CLKO2>;
1046 assigned-clocks = <&clk IMX8MQ_CLK_CLKO2>;
1047 assigned-clock-rates = <25000000>;
1048 reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
1049 vdda-supply = <&reg_vcam_2v8>;
1050 vddd-supply = <&reg_vcam_1v2>;
1051 vddio-supply = <&reg_csi_1v8>;
1052 rotation = <90>;
1053 orientation = <0>;
1054
1055 port {
1056 camera1_ep: endpoint {
1057 data-lanes = <1 2>;
1058 link-frequencies = /bits/ 64
1059 <80000000 200000000 300000000>;
1060 remote-endpoint = <&mipi1_sensor_ep>;
1061 };
1062 };
1063 };
1064
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]1065 backlight@36 {
1066 compatible = "ti,lm36922";
1067 reg = <0x36>;
1068 pinctrl-names = "default";
1069 pinctrl-0 = <&pinctrl_bl>;
1070 #address-cells = <1>;
1071 #size-cells = <0>;
1072 enable-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
1073 vled-supply = <&reg_vsys_3v4>;
1074 ti,ovp-microvolt = <25000000>;
1075
1076 led_backlight: led@0 {
1077 reg = <0>;
1078 label = ":backlight";
1079 linux,default-trigger = "backlight";
1080 led-max-microamp = <20000>;
1081 };
1082 };
1083
1084 touchscreen@38 {
1085 compatible = "edt,edt-ft5506";
1086 reg = <0x38>;
1087 pinctrl-names = "default";
1088 pinctrl-0 = <&pinctrl_touch>;
1089 interrupt-parent = <&gpio1>;
1090 interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
1091 touchscreen-size-x = <720>;
1092 touchscreen-size-y = <1440>;
1093 vcc-supply = <&reg_lcd_1v8>;
1094 };
1095};
1096
1097&i2c4 {
1098 clock-frequency = <387000>;
1099 pinctrl-names = "default";
1100 pinctrl-0 = <&pinctrl_i2c4>;
1101 status = "okay";
1102
Marcel Ziswilercb9b70f2022-11-07 22:22:38 +0100[diff] [blame]1103 vcm@c {
1104 compatible = "dongwoon,dw9714";
1105 reg = <0x0c>;
1106 vcc-supply = <&reg_csi_1v8>;
1107 };
1108
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]1109 bat: fuel-gauge@36 {
1110 compatible = "maxim,max17055";
1111 reg = <0x36>;
1112 interrupt-parent = <&gpio3>;
1113 interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
1114 pinctrl-names = "default";
1115 pinctrl-0 = <&pinctrl_gauge>;
Marcel Ziswilercb9b70f2022-11-07 22:22:38 +0100[diff] [blame]1116 power-supplies = <&bq25895>;
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]1117 maxim,over-heat-temp = <700>;
1118 maxim,over-volt = <4500>;
1119 maxim,rsns-microohm = <5000>;
1120 };
1121
1122 bq25895: charger@6a {
1123 compatible = "ti,bq25895", "ti,bq25890";
1124 reg = <0x6a>;
1125 pinctrl-names = "default";
1126 pinctrl-0 = <&pinctrl_charger_in>;
1127 interrupt-parent = <&gpio3>;
1128 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
1129 phys = <&usb3_phy0>;
1130 ti,precharge-current = <130000>; /* uA */
1131 ti,minimum-sys-voltage = <3700000>; /* uV */
1132 ti,boost-voltage = <5000000>; /* uV */
Marcel Ziswilercb9b70f2022-11-07 22:22:38 +0100[diff] [blame]1133 ti,boost-max-current = <1500000>; /* uA */
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]1134 ti,use-vinmin-threshold = <1>; /* enable VINDPM */
1135 ti,vinmin-threshold = <3900000>; /* uV */
1136 monitored-battery = <&bat>;
1137 power-supplies = <&typec_pd>;
1138 };
1139};
1140
1141&lcdif {
1142 status = "okay";
1143};
1144
Marcel Ziswilercb9b70f2022-11-07 22:22:38 +0100[diff] [blame]1145&mipi_csi1 {
1146 status = "okay";
1147
1148 ports {
1149 port@0 {
1150 reg = <0>;
1151
1152 mipi1_sensor_ep: endpoint {
1153 remote-endpoint = <&camera1_ep>;
1154 data-lanes = <1 2>;
1155 };
1156 };
1157 };
1158};
1159
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]1160&mipi_dsi {
1161 #address-cells = <1>;
1162 #size-cells = <0>;
1163 status = "okay";
1164
1165 lcd_panel: panel@0 {
1166 compatible = "mantix,mlaf057we51-x";
1167 reg = <0>;
1168 pinctrl-names = "default";
1169 pinctrl-0 = <&pinctrl_dsirst>;
1170 avdd-supply = <&reg_lcd_avdd>;
1171 avee-supply = <&reg_lcd_avee>;
1172 vddi-supply = <&reg_lcd_1v8>;
1173 backlight = <&backlight_dsi>;
1174 reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
1175 mantix,tp-rstn-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
1176
1177 port {
1178 panel_in: endpoint {
1179 remote-endpoint = <&mipi_dsi_out>;
1180 };
1181 };
1182 };
1183
1184 ports {
1185 port@1 {
1186 reg = <1>;
1187
1188 mipi_dsi_out: endpoint {
1189 remote-endpoint = <&panel_in>;
1190 };
1191 };
1192 };
1193};
1194
1195&pgc_gpu {
1196 power-supply = <&buck3_reg>;
1197};
1198
1199&pgc_mipi {
1200 power-supply = <&ldo5_reg>;
1201};
1202
1203&pgc_vpu {
1204 power-supply = <&buck4_reg>;
1205};
1206
1207&pwm1 {
1208 pinctrl-names = "default";
1209 pinctrl-0 = <&pinctrl_haptic>;
1210 status = "okay";
1211};
1212
1213&pwm2 {
1214 pinctrl-names = "default";
1215 pinctrl-0 = <&pinctrl_led_b>;
1216 status = "okay";
1217};
1218
1219&pwm3 {
1220 pinctrl-names = "default";
1221 pinctrl-0 = <&pinctrl_led_r>;
1222 status = "okay";
1223};
1224
1225&pwm4 {
1226 pinctrl-names = "default";
1227 pinctrl-0 = <&pinctrl_led_g>;
1228 status = "okay";
1229};
1230
1231&sai2 {
1232 pinctrl-names = "default";
1233 pinctrl-0 = <&pinctrl_sai2>;
1234 assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
1235 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
1236 assigned-clock-rates = <24576000>;
1237 status = "okay";
1238};
1239
1240&sai6 {
1241 pinctrl-names = "default";
1242 pinctrl-0 = <&pinctrl_sai6>;
1243 assigned-clocks = <&clk IMX8MQ_CLK_SAI6>;
1244 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
1245 assigned-clock-rates = <24576000>;
1246 fsl,sai-synchronous-rx;
1247 status = "okay";
1248};
1249
1250&snvs_pwrkey {
1251 status = "okay";
1252};
1253
1254&snvs_rtc {
1255 status = "disabled";
1256};
1257
1258&uart1 { /* console */
1259 pinctrl-names = "default";
1260 pinctrl-0 = <&pinctrl_uart1>;
1261 status = "okay";
1262};
1263
1264&uart2 { /* TPS - GPS - DEBUG */
1265 pinctrl-names = "default";
1266 pinctrl-0 = <&pinctrl_uart2>;
1267 status = "okay";
1268
1269 gnss {
1270 compatible = "globaltop,pa6h";
1271 vcc-supply = <&reg_gnss>;
1272 current-speed = <9600>;
1273 };
1274};
1275
1276&uart3 { /* SMC */
1277 pinctrl-names = "default";
1278 pinctrl-0 = <&pinctrl_uart3>;
1279 status = "okay";
1280};
1281
1282&uart4 { /* BT */
1283 pinctrl-names = "default";
1284 pinctrl-0 = <&pinctrl_uart4>;
1285 uart-has-rtscts;
1286 status = "okay";
1287};
1288
1289&usb3_phy0 {
1290 status = "okay";
1291};
1292
1293&usb3_phy1 {
1294 vbus-supply = <&reg_hub>;
1295 status = "okay";
1296};
1297
1298&usb_dwc3_0 {
1299 #address-cells = <1>;
1300 #size-cells = <0>;
1301 dr_mode = "otg";
1302 snps,dis_u3_susphy_quirk;
Marcel Ziswilercb9b70f2022-11-07 22:22:38 +0100[diff] [blame]1303 usb-role-switch;
Angus Ainslie466a9ea2022-08-25 06:46:02 -0700[diff] [blame]1304 status = "okay";
1305
1306 port@0 {
1307 reg = <0>;
1308
1309 typec_hs: endpoint {
1310 remote-endpoint = <&usb_con_hs>;
1311 };
1312 };
1313
1314 port@1 {
1315 reg = <1>;
1316
1317 typec_ss: endpoint {
1318 remote-endpoint = <&usb_con_ss>;
1319 };
1320 };
1321};
1322
1323&usb_dwc3_1 {
1324 dr_mode = "host";
1325 status = "okay";
1326 #address-cells = <1>;
1327 #size-cells = <0>;
1328
1329 /* Microchip USB2642 */
1330 hub@1 {
1331 compatible = "usb424,2640";
1332 reg = <1>;
1333 #address-cells = <1>;
1334 #size-cells = <0>;
1335
1336 mass-storage@1 {
1337 compatible = "usb424,4041";
1338 reg = <1>;
1339 };
1340 };
1341};
1342
1343&usdhc1 {
1344 assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
1345 assigned-clock-rates = <400000000>;
1346 pinctrl-names = "default", "state_100mhz", "state_200mhz";
1347 pinctrl-0 = <&pinctrl_usdhc1>;
1348 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
1349 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
1350 bus-width = <8>;
1351 vmmc-supply = <&reg_vdd_3v3>;
1352 power-supply = <&reg_vdd_1v8>;
1353 non-removable;
1354 status = "okay";
1355};
1356
1357&usdhc2 {
1358 assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
1359 assigned-clock-rates = <200000000>;
1360 pinctrl-names = "default", "state_100mhz", "state_200mhz";
1361 pinctrl-0 = <&pinctrl_usdhc2>;
1362 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
1363 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
1364 bus-width = <4>;
1365 vmmc-supply = <&reg_wifi_3v3>;
1366 mmc-pwrseq = <&usdhc2_pwrseq>;
1367 post-power-on-delay-ms = <1000>;
1368 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
1369 max-frequency = <50000000>;
1370 disable-wp;
1371 cap-sdio-irq;
1372 keep-power-in-suspend;
1373 wakeup-source;
1374 status = "okay";
1375};
1376
1377&wdog1 {
1378 pinctrl-names = "default";
1379 pinctrl-0 = <&pinctrl_wdog>;
1380 fsl,ext-reset-output;
1381 status = "okay";
1382};