blob: d684ffe9d02052628f60785084cc77277cf80c87 [file] [log] [blame]
TsiChungLiew570c0182008-01-15 13:37:34 -06001/*
2 *
3 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
4 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25/* CPU specific interrupt routine */
26#include <common.h>
27#include <asm/immap.h>
28
29int interrupt_init(void)
30{
31 volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
32
33 /* Make sure all interrupts are disabled */
34 intp->imrh0 |= 0xFFFFFFFF;
35 intp->imrl0 |= 0xFFFFFFFF;
36
37 enable_interrupts();
38
39 return 0;
40}
41
42#if defined(CONFIG_SLTTMR)
43void dtimer_intr_setup(void)
44{
45 volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
46
47 intp->icr0[CFG_TMRINTR_NO] = CFG_TMRINTR_PRI;
48 intp->imrh0 &= ~CFG_TMRINTR_MASK;
49}
50#endif