Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 1 | /* Configuration header file for LEON2 GRSIM. |
| 2 | * |
| 3 | * (C) Copyright 2003-2005 |
| 4 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 5 | * |
| 6 | * (C) Copyright 2007 |
| 7 | * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com. |
| 8 | * |
| 9 | * See file CREDITS for list of people who contributed to this |
| 10 | * project. |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or |
| 13 | * modify it under the terms of the GNU General Public License as |
| 14 | * published by the Free Software Foundation; either version 2 of |
| 15 | * the License, or (at your option) any later version. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License |
| 23 | * along with this program; if not, write to the Free Software |
| 24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 25 | * MA 02111-1307 USA |
| 26 | */ |
| 27 | |
| 28 | #ifndef __CONFIG_H__ |
| 29 | #define __CONFIG_H__ |
| 30 | |
| 31 | /* |
| 32 | * High Level Configuration Options |
| 33 | * (easy to change) |
| 34 | * |
| 35 | * Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1. |
| 36 | * |
| 37 | * TSIM command |
| 38 | * tsim-leon -sdram 0 -ram 32000 -rom 8192 -mmu |
| 39 | * |
| 40 | */ |
| 41 | |
| 42 | #define CONFIG_LEON2 /* This is an LEON2 CPU */ |
| 43 | #define CONFIG_LEON 1 /* This is an LEON CPU */ |
| 44 | #define CONFIG_GRSIM 0 /* ... not running on GRSIM */ |
| 45 | #define CONFIG_TSIM 1 /* ... running on TSIM */ |
| 46 | |
| 47 | /* CPU / AMBA BUS configuration */ |
Wolfgang Denk | 53677ef | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 48 | #define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */ |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 49 | |
| 50 | /* Number of SPARC register windows */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 51 | #define CONFIG_SYS_SPARC_NWINDOWS 8 |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 52 | |
| 53 | /* |
| 54 | * Serial console configuration |
| 55 | */ |
| 56 | #define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 57 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 58 | |
| 59 | /* Partitions */ |
| 60 | #define CONFIG_DOS_PARTITION |
| 61 | #define CONFIG_MAC_PARTITION |
| 62 | #define CONFIG_ISO_PARTITION |
| 63 | |
| 64 | /* |
| 65 | * Supported commands |
| 66 | */ |
Wolfgang Denk | 74de7ae | 2009-04-01 23:34:12 +0200 | [diff] [blame] | 67 | #define CONFIG_CMD_BDI /* bdinfo */ |
| 68 | #define CONFIG_CMD_CONSOLE /* coninfo */ |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 69 | #define CONFIG_CMD_DIAG |
Wolfgang Denk | 74de7ae | 2009-04-01 23:34:12 +0200 | [diff] [blame] | 70 | #define CONFIG_CMD_ECHO /* echo arguments */ |
| 71 | #define CONFIG_CMD_FPGA /* FPGA configuration Support */ |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 72 | #define CONFIG_CMD_IRQ |
Wolfgang Denk | 74de7ae | 2009-04-01 23:34:12 +0200 | [diff] [blame] | 73 | #define CONFIG_CMD_ITEST /* Integer (and string) test */ |
| 74 | #define CONFIG_CMD_LOADB /* loadb */ |
| 75 | #define CONFIG_CMD_LOADS /* loads */ |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 76 | #define CONFIG_CMD_MISC /* Misc functions like sleep etc */ |
| 77 | #define CONFIG_CMD_REGINFO |
Wolfgang Denk | 74de7ae | 2009-04-01 23:34:12 +0200 | [diff] [blame] | 78 | #define CONFIG_CMD_RUN /* run command in env variable */ |
| 79 | #define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ |
| 80 | #define CONFIG_CMD_SOURCE /* "source" command support */ |
| 81 | #define CONFIG_CMD_XIMG /* Load part of Multi Image */ |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 82 | |
| 83 | /* |
| 84 | * Autobooting |
| 85 | */ |
| 86 | #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ |
| 87 | |
| 88 | #define CONFIG_PREBOOT "echo;" \ |
| 89 | "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ |
| 90 | "echo" |
| 91 | |
| 92 | #undef CONFIG_BOOTARGS |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 93 | /*#define CONFIG_SYS_HUSH_PARSER 0*/ |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 94 | |
| 95 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 96 | "netdev=eth0\0" \ |
| 97 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ |
| 98 | "nfsroot=${serverip}:${rootpath}\0" \ |
| 99 | "ramargs=setenv bootargs root=/dev/ram rw\0" \ |
| 100 | "addip=setenv bootargs ${bootargs} " \ |
| 101 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ |
| 102 | ":${hostname}:${netdev}:off panic=1\0" \ |
| 103 | "flash_nfs=run nfsargs addip;" \ |
| 104 | "bootm ${kernel_addr}\0" \ |
| 105 | "flash_self=run ramargs addip;" \ |
| 106 | "bootm ${kernel_addr} ${ramdisk_addr}\0" \ |
| 107 | "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \ |
| 108 | "rootpath=/export/roofs\0" \ |
| 109 | "scratch=40000000\0" \ |
Mike Frysinger | 3a2b9f2 | 2011-10-12 19:47:51 +0000 | [diff] [blame] | 110 | "getkernel=tftpboot $(scratch) $(bootfile)\0" \ |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 111 | "ethaddr=00:00:7A:CC:00:12\0" \ |
| 112 | "bootargs=console=ttyS0,38400" \ |
| 113 | "" |
| 114 | #define CONFIG_NETMASK 255.255.255.0 |
| 115 | #define CONFIG_GATEWAYIP 192.168.0.1 |
| 116 | #define CONFIG_SERVERIP 192.168.0.81 |
| 117 | #define CONFIG_IPADDR 192.168.0.80 |
Joe Hershberger | 8b3637c | 2011-10-13 13:03:47 +0000 | [diff] [blame] | 118 | #define CONFIG_ROOTPATH "/export/rootfs" |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 119 | #define CONFIG_HOSTNAME grxc3s1500 |
Joe Hershberger | b3f44c2 | 2011-10-13 13:03:48 +0000 | [diff] [blame] | 120 | #define CONFIG_BOOTFILE "/uImage" |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 121 | |
| 122 | #define CONFIG_BOOTCOMMAND "run flash_self" |
| 123 | |
| 124 | /* Memory MAP |
| 125 | * |
| 126 | * Flash: |
| 127 | * |--------------------------------| |
| 128 | * | 0x00000000 Text & Data & BSS | * |
| 129 | * | for Monitor | * |
| 130 | * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| * |
| 131 | * | UNUSED / Growth | * 256kb |
| 132 | * |--------------------------------| |
| 133 | * | 0x00050000 Base custom area | * |
| 134 | * | kernel / FS | * |
| 135 | * | | * Rest of Flash |
| 136 | * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| |
| 137 | * | END-0x00008000 Environment | * 32kb |
| 138 | * |--------------------------------| |
| 139 | * |
| 140 | * |
| 141 | * |
| 142 | * Main Memory: |
| 143 | * |--------------------------------| |
| 144 | * | UNUSED / scratch area | |
| 145 | * | | |
| 146 | * | | |
| 147 | * | | |
| 148 | * | | |
| 149 | * |--------------------------------| |
| 150 | * | Monitor .Text / .DATA / .BSS | * 256kb |
| 151 | * | Relocated! | * |
| 152 | * |--------------------------------| |
| 153 | * | Monitor Malloc | * 128kb (contains relocated environment) |
| 154 | * |--------------------------------| |
| 155 | * | Monitor/kernel STACK | * 64kb |
| 156 | * |--------------------------------| |
| 157 | * | Page Table for MMU systems | * 2k |
| 158 | * |--------------------------------| |
| 159 | * | PROM Code accessed from Linux | * 6kb-128b |
| 160 | * |--------------------------------| |
| 161 | * | Global data (avail from kernel)| * 128b |
| 162 | * |--------------------------------| |
| 163 | * |
| 164 | */ |
| 165 | |
| 166 | /* |
| 167 | * Flash configuration (8,16 or 32 MB) |
| 168 | * TEXT base always at 0xFFF00000 |
| 169 | * ENV_ADDR always at 0xFFF40000 |
| 170 | * FLASH_BASE at 0xFC000000 for 64 MB |
| 171 | * 0xFE000000 for 32 MB |
| 172 | * 0xFF000000 for 16 MB |
| 173 | * 0xFF800000 for 8 MB |
| 174 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 175 | #define CONFIG_SYS_NO_FLASH 1 |
| 176 | #define CONFIG_SYS_FLASH_BASE 0x00000000 |
| 177 | #define CONFIG_SYS_FLASH_SIZE 0x00800000 |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 178 | #define CONFIG_ENV_SIZE 0x8000 |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 179 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 180 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE) |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 181 | |
| 182 | #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 183 | #define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */ |
| 184 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */ |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 185 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 186 | #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ |
| 187 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ |
| 188 | #define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */ |
| 189 | #define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */ |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 190 | |
| 191 | #ifdef ENABLE_FLASH_SUPPORT |
| 192 | /* For use with grsim FLASH emulation extension */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 193 | #define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 194 | |
| 195 | #undef CONFIG_FLASH_8BIT /* Flash is 32-bit */ |
| 196 | |
| 197 | /*** CFI CONFIG ***/ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 198 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT |
Jean-Christophe PLAGNIOL-VILLARD | 00b1883 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 199 | #define CONFIG_FLASH_CFI_DRIVER |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 200 | #define CONFIG_SYS_FLASH_CFI |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 201 | #endif |
| 202 | |
| 203 | /* |
| 204 | * Environment settings |
| 205 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 93f6d72 | 2008-09-10 22:48:00 +0200 | [diff] [blame] | 206 | #define CONFIG_ENV_IS_NOWHERE 1 |
Jean-Christophe PLAGNIOL-VILLARD | 5a1aceb | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 207 | /*#define CONFIG_ENV_IS_IN_FLASH*/ |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 208 | /*#define CONFIG_ENV_SIZE 0x8000*/ |
| 209 | #define CONFIG_ENV_SECT_SIZE 0x40000 |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 210 | #define CONFIG_ENV_OVERWRITE 1 |
| 211 | |
| 212 | /* |
| 213 | * Memory map |
| 214 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 215 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
| 216 | #define CONFIG_SYS_SDRAM_SIZE 0x00800000 |
| 217 | #define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE) |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 218 | |
| 219 | /* no SRAM available */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 220 | #undef CONFIG_SYS_SRAM_BASE |
| 221 | #undef CONFIG_SYS_SRAM_SIZE |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 222 | |
| 223 | |
| 224 | /* Always Run U-Boot from SDRAM */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 225 | #define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE |
| 226 | #define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE |
| 227 | #define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 228 | |
Wolfgang Denk | 25ddd1f | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 229 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE) |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 230 | |
Wolfgang Denk | 25ddd1f | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 231 | #define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 232 | #define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE) |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 233 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 234 | #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32) |
| 235 | #define CONFIG_SYS_STACK_SIZE (0x10000-32) |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 236 | |
Wolfgang Denk | 14d0a02 | 2010-10-07 21:51:12 +0200 | [diff] [blame] | 237 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 238 | #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) |
| 239 | # define CONFIG_SYS_RAMBOOT 1 |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 240 | #endif |
| 241 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 242 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ |
| 243 | #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ |
| 244 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 245 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 246 | #define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE) |
| 247 | #define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN) |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 248 | |
| 249 | /* relocated monitor area */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 250 | #define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE |
| 251 | #define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN) |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 252 | |
| 253 | /* make un relocated address from relocated address */ |
Wolfgang Denk | 14d0a02 | 2010-10-07 21:51:12 +0200 | [diff] [blame] | 254 | #define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)) |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 255 | |
| 256 | /* |
| 257 | * Ethernet configuration |
| 258 | */ |
| 259 | /*#define CONFIG_GRETH 1*/ |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 260 | |
| 261 | /* Default HARDWARE address */ |
| 262 | #define GRETH_HWADDR_0 0x00 |
| 263 | #define GRETH_HWADDR_1 0x00 |
| 264 | #define GRETH_HWADDR_2 0x7A |
| 265 | #define GRETH_HWADDR_3 0xcc |
| 266 | #define GRETH_HWADDR_4 0x00 |
| 267 | #define GRETH_HWADDR_5 0x12 |
| 268 | |
| 269 | #define CONFIG_ETHADDR 00:00:7a:cc:00:12 |
| 270 | |
| 271 | /* |
| 272 | * Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s |
| 273 | */ |
| 274 | /* #define CONFIG_GRETH_10MBIT 1 */ |
| 275 | #define CONFIG_PHY_ADDR 0x00 |
| 276 | |
| 277 | /* |
| 278 | * Miscellaneous configurable options |
| 279 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 280 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 281 | #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 282 | #if defined(CONFIG_CMD_KGDB) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 283 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 284 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 285 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 286 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 287 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
| 288 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 289 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 290 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 291 | #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ |
| 292 | #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 293 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 294 | #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 295 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 296 | #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 297 | |
| 298 | /***** Gaisler GRLIB IP-Cores Config ********/ |
| 299 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 300 | #define CONFIG_SYS_GRLIB_SDRAM 0 |
| 301 | #define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11)) |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 302 | #if CONFIG_GRSIM |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 303 | #define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000 |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 304 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 305 | #define CONFIG_SYS_GRLIB_MEMCFG2 0x00001820 |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 306 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 307 | #define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000 |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 308 | |
| 309 | /*** LEON2 UART 1 ***/ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 310 | #define CONFIG_SYS_LEON2_UART1_SCALER \ |
Wolfgang Denk | 1aeed8d | 2008-04-13 09:59:26 -0700 | [diff] [blame] | 311 | ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10) |
| 312 | |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 313 | /* UART1 Define to 1 or 0 */ |
| 314 | #define LEON2_UART1_LOOPBACK_ENABLE 0 |
| 315 | #define LEON2_UART1_FLOWCTRL_ENABLE 0 |
| 316 | #define LEON2_UART1_PARITY_ENABLE 0 |
| 317 | #define LEON2_UART1_ODDPAR_ENABLE 0 |
| 318 | |
| 319 | /*** LEON2 UART 2 ***/ |
| 320 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 321 | #define CONFIG_SYS_LEON2_UART2_SCALER \ |
Wolfgang Denk | 1aeed8d | 2008-04-13 09:59:26 -0700 | [diff] [blame] | 322 | ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10) |
Daniel Hellstrom | ab68f92 | 2008-03-28 10:20:43 +0100 | [diff] [blame] | 323 | |
| 324 | /* UART2 Define to 1 or 0 */ |
| 325 | #define LEON2_UART2_LOOPBACK_ENABLE 0 |
| 326 | #define LEON2_UART2_FLOWCTRL_ENABLE 0 |
| 327 | #define LEON2_UART2_PARITY_ENABLE 0 |
| 328 | #define LEON2_UART2_ODDPAR_ENABLE 0 |
| 329 | |
| 330 | #define LEON_CONSOLE_UART1 1 |
| 331 | #define LEON_CONSOLE_UART2 2 |
| 332 | |
| 333 | /* Use UART2 as console */ |
| 334 | #define LEON2_CONSOLE_SELECT LEON_CONSOLE_UART1 |
| 335 | |
| 336 | /* LEON2 I/O Port */ |
| 337 | /*#define LEON2_IO_PORT_DIR 0x0000aa00*/ |
| 338 | |
| 339 | /* default kernel command line */ |
| 340 | #define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0" |
| 341 | |
| 342 | #define CONFIG_IDENT_STRING "Gaisler GRSIM LEON2" |
| 343 | |
| 344 | #endif /* __CONFIG_H */ |